mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 06:57:57 +00:00
30 lines
972 B
Diff
30 lines
972 B
Diff
|
From 0d98479738b950e30bb4f782d60099d44076ad67 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Icenowy Zheng <icenowy@aosc.io>
|
||
|
|
Date: Wed, 5 Apr 2017 22:30:34 +0800
|
||
|
|
Subject: arm64: allwinner: a64: add pmu0 regs for USB PHY
|
||
|
|
|
||
|
|
The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
|
||
|
|
controller pair that can be connected to the PHY0.
|
||
|
|
|
||
|
|
Add the MMIO region for PHY node.
|
||
|
|
|
||
|
|
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
|
||
|
|
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
||
|
|
---
|
||
|
|
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
|
||
|
|
1 file changed, 2 insertions(+)
|
||
|
|
|
||
|
|
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||
|
|
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||
|
|
@@ -184,8 +184,10 @@
|
||
|
|
usbphy: phy@01c19400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-usb-phy";
|
||
|
|
reg = <0x01c19400 0x14>,
|
||
|
|
+ <0x01c1a800 0x4>,
|
||
|
|
<0x01c1b800 0x4>;
|
||
|
|
reg-names = "phy_ctrl",
|
||
|
|
+ "pmu0",
|
||
|
|
"pmu1";
|
||
|
|
clocks = <&ccu CLK_USB_PHY0>,
|
||
|
|
<&ccu CLK_USB_PHY1>;
|