2022-09-09 13:08:16 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "rtl8380_zyxel_gs1900.dtsi"
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/ {
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compatible = "zyxel,gs1900-24e", "realtek,rtl838x-soc";
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2024-06-07 12:42:32 +00:00
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model = "Zyxel GS1900-24E";
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2022-09-09 13:08:16 +00:00
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};
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&mdio {
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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};
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&switch0 {
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ports {
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SWITCH_PORT(1, 1, qsgmii)
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SWITCH_PORT(0, 2, qsgmii)
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SWITCH_PORT(3, 3, qsgmii)
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SWITCH_PORT(2, 4, qsgmii)
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SWITCH_PORT(5, 5, qsgmii)
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SWITCH_PORT(4, 6, qsgmii)
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SWITCH_PORT(7, 7, qsgmii)
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SWITCH_PORT(6, 8, qsgmii)
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SWITCH_PORT(9, 9, internal)
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SWITCH_PORT(8, 10, internal)
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SWITCH_PORT(11, 11, internal)
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SWITCH_PORT(10, 12, internal)
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SWITCH_PORT(13, 13, internal)
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SWITCH_PORT(12, 14, internal)
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SWITCH_PORT(15, 15, internal)
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SWITCH_PORT(14, 16, internal)
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SWITCH_PORT(17, 17, qsgmii)
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SWITCH_PORT(16, 18, qsgmii)
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SWITCH_PORT(19, 19, qsgmii)
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SWITCH_PORT(18, 20, qsgmii)
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SWITCH_PORT(21, 21, qsgmii)
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SWITCH_PORT(20, 22, qsgmii)
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SWITCH_PORT(23, 23, qsgmii)
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SWITCH_PORT(22, 24, qsgmii)
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};
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};
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&gpio1 {
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/delete-node/ poe_enable;
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};
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