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51 lines
2.0 KiB
Diff
51 lines
2.0 KiB
Diff
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From 85a9cab9b9bb471eae016cdbfabd928585c23cce Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Mon, 4 Jul 2022 13:33:18 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC node
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The ARM timer is usually considered not part of SoC node, just like
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other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
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arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
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From schema: dtschema/schemas/simple-bus.yaml
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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[bjorn: Moved node after "soc" for alphabetical ordering]
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -654,14 +654,6 @@
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};
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};
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- timer {
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- compatible = "arm,armv8-timer";
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- interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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- };
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-
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watchdog: watchdog@b017000 {
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compatible = "qcom,kpss-wdt";
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reg = <0xb017000 0x1000>;
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@@ -853,4 +845,12 @@
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status = "disabled";
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};
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};
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+
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+ timer {
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+ compatible = "arm,armv8-timer";
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+ interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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+ };
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};
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