2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_ARCH_BINFMT_ELF_STATE=y
|
|
|
|
|
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
|
|
|
|
CONFIG_ARCH_DISCARD_MEMBLOCK=y
|
|
|
|
|
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
|
|
|
|
# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
|
|
|
|
|
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
|
|
|
|
|
# CONFIG_ARCH_HAS_SG_CHAIN is not set
|
2018-10-15 08:49:55 +00:00
|
|
|
# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
|
|
|
|
|
# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
|
|
|
|
|
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
|
|
|
|
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
|
|
|
|
|
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
|
|
|
|
|
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
|
|
|
|
|
# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
|
|
|
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
|
|
|
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
|
|
|
|
|
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
|
|
|
|
CONFIG_BLK_MQ_PCI=y
|
|
|
|
|
CONFIG_BOARD_SCACHE=y
|
|
|
|
|
CONFIG_BOUNCE=y
|
|
|
|
|
CONFIG_CEVT_R4K=y
|
|
|
|
|
# CONFIG_CEVT_SYSTICK_QUIRK is not set
|
|
|
|
|
CONFIG_CLKDEV_LOOKUP=y
|
|
|
|
|
CONFIG_CLKSRC_MIPS_GIC=y
|
|
|
|
|
CONFIG_CLONE_BACKWARDS=y
|
|
|
|
|
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
|
|
|
|
|
CONFIG_CMDLINE_BOOL=y
|
|
|
|
|
# CONFIG_CMDLINE_OVERRIDE is not set
|
|
|
|
|
CONFIG_COMMON_CLK=y
|
|
|
|
|
# CONFIG_COMMON_CLK_BOSTON is not set
|
|
|
|
|
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
|
|
|
|
CONFIG_CPU_HAS_PREFETCH=y
|
|
|
|
|
CONFIG_CPU_HAS_RIXI=y
|
|
|
|
|
CONFIG_CPU_HAS_SYNC=y
|
|
|
|
|
CONFIG_CPU_LITTLE_ENDIAN=y
|
|
|
|
|
CONFIG_CPU_MIPS32=y
|
|
|
|
|
# CONFIG_CPU_MIPS32_R1 is not set
|
|
|
|
|
CONFIG_CPU_MIPS32_R2=y
|
|
|
|
|
CONFIG_CPU_MIPSR2=y
|
|
|
|
|
CONFIG_CPU_MIPSR2_IRQ_EI=y
|
|
|
|
|
CONFIG_CPU_MIPSR2_IRQ_VI=y
|
|
|
|
|
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
|
|
|
|
|
CONFIG_CPU_R4K_CACHE_TLB=y
|
|
|
|
|
CONFIG_CPU_R4K_FPU=y
|
|
|
|
|
CONFIG_CPU_RMAP=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
|
|
|
|
CONFIG_CPU_SUPPORTS_MSA=y
|
|
|
|
|
CONFIG_CRC16=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_CRYPTO_ACOMP2=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_CRYPTO_AEAD=y
|
|
|
|
|
CONFIG_CRYPTO_AEAD2=y
|
|
|
|
|
CONFIG_CRYPTO_DEFLATE=y
|
|
|
|
|
CONFIG_CRYPTO_HASH2=y
|
|
|
|
|
CONFIG_CRYPTO_LZO=y
|
|
|
|
|
CONFIG_CRYPTO_MANAGER=y
|
|
|
|
|
CONFIG_CRYPTO_MANAGER2=y
|
|
|
|
|
CONFIG_CRYPTO_NULL2=y
|
|
|
|
|
CONFIG_CRYPTO_RNG2=y
|
|
|
|
|
CONFIG_CRYPTO_WORKQUEUE=y
|
|
|
|
|
CONFIG_CSRC_R4K=y
|
|
|
|
|
CONFIG_DEBUG_PINCTRL=y
|
|
|
|
|
CONFIG_DMA_NONCOHERENT=y
|
|
|
|
|
CONFIG_DTB_RT_NONE=y
|
|
|
|
|
CONFIG_DTC=y
|
|
|
|
|
CONFIG_EARLY_PRINTK=y
|
|
|
|
|
CONFIG_FIXED_PHY=y
|
|
|
|
|
CONFIG_GENERIC_ATOMIC64=y
|
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_GENERIC_CMOS_UPDATE=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_GENERIC_IO=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_CHIP=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_GENERIC_IRQ_IPI=y
|
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW=y
|
|
|
|
|
CONFIG_GENERIC_PCI_IOMAP=y
|
|
|
|
|
CONFIG_GENERIC_SCHED_CLOCK=y
|
|
|
|
|
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
|
|
|
|
CONFIG_GENERIC_TIME_VSYSCALL=y
|
|
|
|
|
CONFIG_GPIOLIB=y
|
|
|
|
|
CONFIG_GPIO_MT7621=y
|
|
|
|
|
# CONFIG_GPIO_RALINK is not set
|
|
|
|
|
CONFIG_GPIO_SYSFS=y
|
ramips: add support for ALFA Network Quad-E4G
ALFA Network Quad-E4G is a universal Wi-Fi/4G platform, which offers
three miniPCIe (PCIe, USB 2.0, SIM) and a single M.2 B-key (dual-SIM,
USB 3.0) slots, RTC and five Gigabit Ethernet ports with PoE support.
Specification:
- MT7621A (880 MHz)
- 256/512 MB of RAM (DDR3)
- 16/32+ MB of FLASH (SPI NOR)
- optional second SPI flash (8-pin WSON/SOIC)
- 1x microSD (SDXC) flash card reader
- 5x 10/100/100 Mbps Ethernet, with passive PoE support (24 V) in LAN1
- optional 802.3at/af PoE module for WAN
- 3x miniPCIe slot (with PCIe and USB 2.0 buses, micro SIM and 5 V)
- 1x M.2/NGFF B-key 3042 (USB 3.0/2.0, mini + micro SIM)
- RTC (TI BQ32002, I2C bus) with backup battery (CR2032)
- external hardware watchdog (EM Microelectronic EM6324)
- 1x USB 2.0 Type-A
- 1x micro USB Type-B for system serial console (Holtek HT42B534)
- 11x LED (5 for Ethernet, 5 driven by GPIO, 1x power indicator)
- 3x button (reset, user1, user2)
- 1x I2C (4-pin, 2.54 mm pitch) header on PCB
- 4x SIM (6-pin, 2.00 mm pitch) headers on PCB
- 2x UART2/3 (4-pin, 2.54 mm pitch) headers on PCB
- 1x mechanical power switch
- 1x DC jack with lock (24 V)
Other:
- U-Boot selects default SIM slot, based on value of 'default_sim' env
variable: '1' or unset -> SIM1 (mini), '2' -> SIM2 (micro). This board
has additional logic circuit for M.2 SIM switching. The 'sim-select'
will work only if both SIM slots are occupied. Otherwise, always slot
with SIM inside is selected, no matter 'sim-select' value.
- U-Boot enables power in all three miniPCIe and M.2 slots before
loading the kernel
- this board supports 'dual image' feature (controlled by 'dual_image'
U-Boot environment variable)
- all three miniPCIe slots have additional 5 V supply on pins 47 and 49
- the board allows to install up to two oversized miniPCIe cards (vendor
has dedicated MediaTek MT7615N/D cards for this board)
- this board has additional logic circuit controlling PERSTn pins inside
miniPCIe slots. By default, PERSTn (GPIO19) is routed to all miniPCIe
slots but setting GPIO22 to high allows PERSTn control per slot, using
GPIO23-25 (value is inverted)
You can use the 'sysupgrade' image directly in vendor firmware which is
based on OpenWrt (make sure to not preserve settings - use 'sysupgrade
-n -F ...' command). Alternatively, use web recovery mode in U-Boot:
1. Power the device with reset button pressed, the modem LED will start
blinking slowly and after ~3 seconds, when it starts blinking faster,
you can release the button.
2. Setup static IP 192.168.1.2/24 on your PC.
3. Go to 192.168.1.1 in browser and upload 'sysupgrade' image.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2019-11-03 11:12:44 +00:00
|
|
|
CONFIG_GPIO_WATCHDOG=y
|
|
|
|
|
# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
|
2018-10-15 08:49:55 +00:00
|
|
|
# CONFIG_GRO_CELLS is not set
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_HANDLE_DOMAIN_IRQ=y
|
|
|
|
|
CONFIG_HARDWARE_WATCHPOINTS=y
|
|
|
|
|
CONFIG_HAS_DMA=y
|
|
|
|
|
CONFIG_HAS_IOMEM=y
|
|
|
|
|
CONFIG_HAS_IOPORT_MAP=y
|
|
|
|
|
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
|
|
|
|
|
# CONFIG_HAVE_ARCH_BITREVERSE is not set
|
2019-11-01 20:40:37 +00:00
|
|
|
CONFIG_HAVE_ARCH_COMPILER_H=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
|
|
|
|
CONFIG_HAVE_ARCH_KGDB=y
|
|
|
|
|
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
|
|
|
|
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
|
|
|
|
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
|
|
|
|
|
CONFIG_HAVE_CBPF_JIT=y
|
|
|
|
|
CONFIG_HAVE_CC_STACKPROTECTOR=y
|
|
|
|
|
CONFIG_HAVE_CLK=y
|
|
|
|
|
CONFIG_HAVE_CLK_PREPARE=y
|
|
|
|
|
CONFIG_HAVE_CONTEXT_TRACKING=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_HAVE_COPY_THREAD_TLS=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_HAVE_C_RECORDMCOUNT=y
|
|
|
|
|
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
|
|
|
|
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
|
|
|
|
|
CONFIG_HAVE_DMA_API_DEBUG=y
|
|
|
|
|
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
|
|
|
|
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
|
|
|
|
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
|
|
|
|
CONFIG_HAVE_FUNCTION_TRACER=y
|
|
|
|
|
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
|
|
|
|
CONFIG_HAVE_IDE=y
|
|
|
|
|
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
|
|
|
|
|
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
|
|
|
|
CONFIG_HAVE_KVM=y
|
|
|
|
|
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
|
|
|
|
CONFIG_HAVE_MEMBLOCK=y
|
|
|
|
|
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
|
|
|
|
|
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
|
|
|
|
CONFIG_HAVE_NET_DSA=y
|
|
|
|
|
CONFIG_HAVE_OPROFILE=y
|
|
|
|
|
CONFIG_HAVE_PERF_EVENTS=y
|
|
|
|
|
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
|
|
|
|
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
|
|
|
|
CONFIG_HIGHMEM=y
|
|
|
|
|
CONFIG_HW_HAS_PCI=y
|
|
|
|
|
CONFIG_HZ_PERIODIC=y
|
|
|
|
|
CONFIG_I2C=y
|
|
|
|
|
CONFIG_I2C_BOARDINFO=y
|
|
|
|
|
CONFIG_I2C_MT7621=y
|
|
|
|
|
CONFIG_INITRAMFS_SOURCE=""
|
|
|
|
|
CONFIG_IRQCHIP=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN=y
|
|
|
|
|
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
|
|
|
|
CONFIG_IRQ_FORCED_THREADING=y
|
|
|
|
|
CONFIG_IRQ_MIPS_CPU=y
|
|
|
|
|
CONFIG_IRQ_WORK=y
|
|
|
|
|
CONFIG_LIBFDT=y
|
|
|
|
|
CONFIG_LZO_COMPRESS=y
|
|
|
|
|
CONFIG_LZO_DECOMPRESS=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_MDIO_BUS=y
|
|
|
|
|
CONFIG_MDIO_DEVICE=y
|
|
|
|
|
CONFIG_MIGRATION=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_MIPS=y
|
|
|
|
|
CONFIG_MIPS_ASID_BITS=8
|
|
|
|
|
CONFIG_MIPS_ASID_SHIFT=0
|
2019-11-01 20:40:37 +00:00
|
|
|
CONFIG_MIPS_CBPF_JIT=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_MIPS_CLOCK_VSYSCALL=y
|
|
|
|
|
CONFIG_MIPS_CM=y
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
|
|
|
|
|
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
|
|
|
|
|
CONFIG_MIPS_CMDLINE_FROM_DTB=y
|
|
|
|
|
CONFIG_MIPS_CPC=y
|
|
|
|
|
CONFIG_MIPS_CPS=y
|
|
|
|
|
# CONFIG_MIPS_CPS_NS16550 is not set
|
|
|
|
|
CONFIG_MIPS_CPU_SCACHE=y
|
|
|
|
|
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
|
|
|
|
|
CONFIG_MIPS_GIC=y
|
|
|
|
|
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
|
|
|
|
|
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
|
|
|
|
# CONFIG_MIPS_MACHINE is not set
|
|
|
|
|
CONFIG_MIPS_MT=y
|
|
|
|
|
CONFIG_MIPS_MT_FPAFF=y
|
|
|
|
|
CONFIG_MIPS_MT_SMP=y
|
2019-06-27 12:44:27 +00:00
|
|
|
# CONFIG_MIPS_NO_APPENDED_DTB is not set
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
|
2019-06-27 12:44:27 +00:00
|
|
|
CONFIG_MIPS_RAW_APPENDED_DTB=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_MIPS_SPRAM=y
|
|
|
|
|
# CONFIG_MIPS_VPE_LOADER is not set
|
|
|
|
|
CONFIG_MODULES_USE_ELF_REL=y
|
|
|
|
|
CONFIG_MT7621_WDT=y
|
|
|
|
|
# CONFIG_MTD_CFI_INTELEXT is not set
|
|
|
|
|
CONFIG_MTD_CMDLINE_PARTS=y
|
|
|
|
|
CONFIG_MTD_M25P80=y
|
|
|
|
|
CONFIG_MTD_NAND=y
|
|
|
|
|
CONFIG_MTD_NAND_ECC=y
|
|
|
|
|
CONFIG_MTD_PHYSMAP=y
|
|
|
|
|
CONFIG_MTD_SPI_NOR=y
|
ramips: Add support for Mikrotik RouterBOARD RBM33g
This commit adds support for the Mikrotik RouterBOARD RBM33g.
=Hardware=
The RBM33g is a mt7621 based device featuring three gigabit ports, 2
miniPCIe slots with sim card sockets, 1 M.2 slot, 1 USB 3.0 port and a male
onboard RS-232 serial port. Additionally there are a lot of accessible
GPIO ports and additional buses like i2c, mdio, spi and uart.
==Switch==
The three Ethernet ports are all connected to the internal switch of the
mt7621 SoC:
port 0: Ethernet Port next to barrel jack with PoE printed on it
port 1: Innermost Ethernet Port on opposite side of RS-232 port
port 2: Outermost Ethernet Port on opposite side of RS-232 port
port 6: CPU
==Flash==
The device has two spi flash chips. The first flash chips is rather small
(512 kB), connected to CS0 by default and contains only the RouterBOOT
bootloader and some factory information (e.g. mac address).
The second chip has a size of 16 MB, is by default connected to CS1 and
contains the firmware image.
==PCIe==
The board features three PCIe-enabled slots. Two of them are miniPCIe
slots (PCIe0, PCIe1) and one is a M.2 (Key M) slot (PCIe2).
Each of the miniPCIe slots is connected to a dedicated mini SIM socket
on the back of the board.
Power to all three PCIe-enabled slots is controlled via GPIOs on the
mt7621 SoC:
PCIe0: GPIO9
PCIe1: GPIO10
PCIe2: GPIO11
==USB==
The board has one external USB 3.0 port at the rear. Additionally PCIe
port 0 has a permanently enabled USB interface. PCIe slot 1 shares its
USB interface with the rear USB port. Thus only either the rear USB port
or the USB interface of PCIe slot 1 can be active at the same time. The
jumper next to the rear USB port controls which one is active:
open: USB on PCIe 1 is active
closed: USB on rear USB port is active
==Power==
The board can accept both, passive PoE and external power via a 2.1 mm
barrel jack. The input voltage range is 11-32 V.
=Installation=
==Prerequisites==
A USB -> RS-232 Adapter and a null modem cable are required for
installation.
To install an OpenWRT image to the device two components must be built:
1. A openwrt initramfs image
2. A openwrt sysupgrade image
===initramfs & sysupgrade image===
Select target devices "Mikrotik RBM33G" in
openwrt menuconfig and build the images. This will create the images
"openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin" and
"openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin" in the output
directory.
==Installing==
**Make sure to back up your RouterOS license in case you do ever want to
go back to RouterOS using "/system license output" and back up the created
license file.**
Serial settings: 115200 8N1
The installation is a two-step process. First the
"openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin" must be booted
via tftp:
1. Set up a dhcp server that points the bootfile to tftp server serving
the "openwrt-ramips-mt7621-mikrotik_rbm33g-initramfs-kernel.bin"
initramfs image
2. Connect to WAN port (left side, next to sys-LED and power indicator)
3. Connect to serial port of board
4. Power on board and enter RouterBOOT setup menu
5. Set boot device to "boot over ethernet"
6. Set boot protocol to "dhcp protocol" (can be omitted if DHCP server
allows dynamic bootp)
6. Save config
7. Wait for board to boot via Ethernet
On the serial port you should now be presented with the OpenWRT boot log.
The next steps will install OpenWRT persistently.
1. Copy "openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin" to the device
using scp.
2. Write openwrt to flash using "sysupgrade
openwrt-ramips-mt7621-mikrotik_rbm33g-squashfs-sysupgrade.bin"
Once the flashing completes reboot the router and let it boot from flash.
It should boot straight to OpenWRT.
Signed-off-by: Tobias Schramm <tobleminer@gmail.com>
2018-05-04 01:47:23 +00:00
|
|
|
CONFIG_MTD_SPLIT_MINOR_FW=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_MTD_SPLIT_SEAMA_FW=y
|
|
|
|
|
CONFIG_MTD_SPLIT_TPLINK_FW=y
|
|
|
|
|
CONFIG_MTD_SPLIT_TRX_FW=y
|
|
|
|
|
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
|
|
|
|
CONFIG_MTD_UBI=y
|
|
|
|
|
CONFIG_MTD_UBI_BEB_LIMIT=20
|
|
|
|
|
CONFIG_MTD_UBI_BLOCK=y
|
|
|
|
|
# CONFIG_MTD_UBI_FASTMAP is not set
|
|
|
|
|
# CONFIG_MTD_UBI_GLUEBI is not set
|
|
|
|
|
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
|
|
|
|
CONFIG_MTK_MTD_NAND=y
|
|
|
|
|
CONFIG_NEED_DMA_MAP_STATE=y
|
|
|
|
|
CONFIG_NET_FLOW_LIMIT=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_GSW_MT7621=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_MDIO=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_MDIO_MT7620=y
|
|
|
|
|
CONFIG_NET_MEDIATEK_MT7621=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_NET_MEDIATEK_OFFLOAD=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_NET_MEDIATEK_SOC=y
|
|
|
|
|
CONFIG_NET_VENDOR_MEDIATEK=y
|
|
|
|
|
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
|
|
|
|
# CONFIG_NO_IOPORT_MAP is not set
|
|
|
|
|
CONFIG_NR_CPUS=4
|
|
|
|
|
CONFIG_OF=y
|
|
|
|
|
CONFIG_OF_ADDRESS=y
|
|
|
|
|
CONFIG_OF_ADDRESS_PCI=y
|
|
|
|
|
CONFIG_OF_EARLY_FLATTREE=y
|
|
|
|
|
CONFIG_OF_FLATTREE=y
|
|
|
|
|
CONFIG_OF_GPIO=y
|
|
|
|
|
CONFIG_OF_IRQ=y
|
|
|
|
|
CONFIG_OF_MDIO=y
|
|
|
|
|
CONFIG_OF_NET=y
|
|
|
|
|
CONFIG_OF_PCI=y
|
|
|
|
|
CONFIG_OF_PCI_IRQ=y
|
|
|
|
|
CONFIG_PADATA=y
|
|
|
|
|
CONFIG_PCI=y
|
|
|
|
|
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
|
|
|
|
CONFIG_PCI_DOMAINS=y
|
|
|
|
|
CONFIG_PCI_DRIVERS_LEGACY=y
|
|
|
|
|
CONFIG_PERF_USE_VMALLOC=y
|
|
|
|
|
CONFIG_PGTABLE_LEVELS=2
|
|
|
|
|
CONFIG_PHYLIB=y
|
|
|
|
|
# CONFIG_PHY_RALINK_USB is not set
|
|
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
|
CONFIG_PINCTRL_RT2880=y
|
|
|
|
|
# CONFIG_PINCTRL_SINGLE is not set
|
|
|
|
|
CONFIG_POWER_RESET=y
|
|
|
|
|
CONFIG_POWER_RESET_GPIO=y
|
|
|
|
|
CONFIG_POWER_SUPPLY=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_QUEUED_RWLOCKS=y
|
|
|
|
|
CONFIG_QUEUED_SPINLOCKS=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_RALINK=y
|
|
|
|
|
# CONFIG_RALINK_WDT is not set
|
|
|
|
|
CONFIG_RATIONAL=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_RCU_NEED_SEGCBLIST=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_RCU_STALL_COMMON=y
|
|
|
|
|
CONFIG_REGMAP=y
|
|
|
|
|
CONFIG_REGMAP_I2C=y
|
|
|
|
|
CONFIG_REGMAP_SPI=y
|
2018-06-07 16:33:57 +00:00
|
|
|
CONFIG_REGULATOR=y
|
|
|
|
|
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_RESET_CONTROLLER=y
|
|
|
|
|
CONFIG_RFS_ACCEL=y
|
|
|
|
|
CONFIG_RPS=y
|
|
|
|
|
CONFIG_RTC_CLASS=y
|
ramips: add support for ALFA Network Quad-E4G
ALFA Network Quad-E4G is a universal Wi-Fi/4G platform, which offers
three miniPCIe (PCIe, USB 2.0, SIM) and a single M.2 B-key (dual-SIM,
USB 3.0) slots, RTC and five Gigabit Ethernet ports with PoE support.
Specification:
- MT7621A (880 MHz)
- 256/512 MB of RAM (DDR3)
- 16/32+ MB of FLASH (SPI NOR)
- optional second SPI flash (8-pin WSON/SOIC)
- 1x microSD (SDXC) flash card reader
- 5x 10/100/100 Mbps Ethernet, with passive PoE support (24 V) in LAN1
- optional 802.3at/af PoE module for WAN
- 3x miniPCIe slot (with PCIe and USB 2.0 buses, micro SIM and 5 V)
- 1x M.2/NGFF B-key 3042 (USB 3.0/2.0, mini + micro SIM)
- RTC (TI BQ32002, I2C bus) with backup battery (CR2032)
- external hardware watchdog (EM Microelectronic EM6324)
- 1x USB 2.0 Type-A
- 1x micro USB Type-B for system serial console (Holtek HT42B534)
- 11x LED (5 for Ethernet, 5 driven by GPIO, 1x power indicator)
- 3x button (reset, user1, user2)
- 1x I2C (4-pin, 2.54 mm pitch) header on PCB
- 4x SIM (6-pin, 2.00 mm pitch) headers on PCB
- 2x UART2/3 (4-pin, 2.54 mm pitch) headers on PCB
- 1x mechanical power switch
- 1x DC jack with lock (24 V)
Other:
- U-Boot selects default SIM slot, based on value of 'default_sim' env
variable: '1' or unset -> SIM1 (mini), '2' -> SIM2 (micro). This board
has additional logic circuit for M.2 SIM switching. The 'sim-select'
will work only if both SIM slots are occupied. Otherwise, always slot
with SIM inside is selected, no matter 'sim-select' value.
- U-Boot enables power in all three miniPCIe and M.2 slots before
loading the kernel
- this board supports 'dual image' feature (controlled by 'dual_image'
U-Boot environment variable)
- all three miniPCIe slots have additional 5 V supply on pins 47 and 49
- the board allows to install up to two oversized miniPCIe cards (vendor
has dedicated MediaTek MT7615N/D cards for this board)
- this board has additional logic circuit controlling PERSTn pins inside
miniPCIe slots. By default, PERSTn (GPIO19) is routed to all miniPCIe
slots but setting GPIO22 to high allows PERSTn control per slot, using
GPIO23-25 (value is inverted)
You can use the 'sysupgrade' image directly in vendor firmware which is
based on OpenWrt (make sure to not preserve settings - use 'sysupgrade
-n -F ...' command). Alternatively, use web recovery mode in U-Boot:
1. Power the device with reset button pressed, the modem LED will start
blinking slowly and after ~3 seconds, when it starts blinking faster,
you can release the button.
2. Setup static IP 192.168.1.2/24 on your PC.
3. Go to 192.168.1.1 in browser and upload 'sysupgrade' image.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2019-11-03 11:12:44 +00:00
|
|
|
CONFIG_RTC_DRV_BQ32K=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_RTC_DRV_PCF8563=y
|
|
|
|
|
CONFIG_RTC_I2C_AND_SPI=y
|
|
|
|
|
CONFIG_RTC_MC146818_LIB=y
|
|
|
|
|
# CONFIG_SCHED_INFO is not set
|
|
|
|
|
CONFIG_SCHED_SMT=y
|
|
|
|
|
# CONFIG_SCSI_DMA is not set
|
|
|
|
|
# CONFIG_SERIAL_8250_FSL is not set
|
|
|
|
|
CONFIG_SERIAL_8250_NR_UARTS=3
|
|
|
|
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
|
|
|
|
CONFIG_SERIAL_OF_PLATFORM=y
|
|
|
|
|
CONFIG_SMP=y
|
|
|
|
|
CONFIG_SMP_UP=y
|
|
|
|
|
# CONFIG_SOC_MT7620 is not set
|
|
|
|
|
CONFIG_SOC_MT7621=y
|
|
|
|
|
# CONFIG_SOC_RT288X is not set
|
|
|
|
|
# CONFIG_SOC_RT305X is not set
|
|
|
|
|
# CONFIG_SOC_RT3883 is not set
|
|
|
|
|
CONFIG_SPI=y
|
|
|
|
|
CONFIG_SPI_MASTER=y
|
|
|
|
|
CONFIG_SPI_MT7621=y
|
|
|
|
|
# CONFIG_SPI_RT2880 is not set
|
|
|
|
|
CONFIG_SRCU=y
|
|
|
|
|
CONFIG_SWCONFIG=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_SWCONFIG_LEDS=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_SWPHY=y
|
|
|
|
|
CONFIG_SYNC_R4K=y
|
|
|
|
|
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
|
|
|
|
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_HIGHMEM=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_MIPS16=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
|
|
|
|
|
CONFIG_SYS_SUPPORTS_SMP=y
|
|
|
|
|
CONFIG_TICK_CPU_ACCOUNTING=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_TIMER_OF=y
|
|
|
|
|
CONFIG_TIMER_PROBE=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_TREE_RCU=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_TREE_SRCU=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_UBIFS_FS=y
|
|
|
|
|
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
|
|
|
|
CONFIG_UBIFS_FS_LZO=y
|
|
|
|
|
CONFIG_UBIFS_FS_ZLIB=y
|
|
|
|
|
CONFIG_USB_SUPPORT=y
|
|
|
|
|
CONFIG_USE_OF=y
|
|
|
|
|
CONFIG_WATCHDOG_CORE=y
|
|
|
|
|
CONFIG_WEAK_ORDERING=y
|
2018-10-15 08:49:55 +00:00
|
|
|
CONFIG_WEAK_REORDERING_BEYOND_LLSC=y
|
2018-01-16 22:07:58 +00:00
|
|
|
CONFIG_XPS=y
|
|
|
|
|
CONFIG_ZLIB_DEFLATE=y
|
|
|
|
|
CONFIG_ZLIB_INFLATE=y
|
