mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
73 lines
2.6 KiB
Diff
73 lines
2.6 KiB
Diff
|
From 02a0988b98930491db95966fb8086072e47dabb6 Mon Sep 17 00:00:00 2001
|
||
|
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
|
||
|
Date: Mon, 15 Nov 2021 10:00:32 +0000
|
||
|
Subject: [PATCH] net: mvneta: use phylink_generic_validate()
|
||
|
|
||
|
Convert mvneta to use phylink_generic_validate() for the bulk of its
|
||
|
validate() implementation. This network adapter has a restriction
|
||
|
that for 802.3z links, autonegotiation must be enabled.
|
||
|
|
||
|
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
|
||
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||
|
---
|
||
|
drivers/net/ethernet/marvell/mvneta.c | 34 ++++-----------------------
|
||
|
1 file changed, 4 insertions(+), 30 deletions(-)
|
||
|
|
||
|
--- a/drivers/net/ethernet/marvell/mvneta.c
|
||
|
+++ b/drivers/net/ethernet/marvell/mvneta.c
|
||
|
@@ -3824,8 +3824,6 @@ static void mvneta_validate(struct phyli
|
||
|
unsigned long *supported,
|
||
|
struct phylink_link_state *state)
|
||
|
{
|
||
|
- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
|
||
|
-
|
||
|
/* We only support QSGMII, SGMII, 802.3z and RGMII modes.
|
||
|
* When in 802.3z mode, we must have AN enabled:
|
||
|
* "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
|
||
|
@@ -3837,34 +3835,7 @@ static void mvneta_validate(struct phyli
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
- /* Allow all the expected bits */
|
||
|
- phylink_set(mask, Autoneg);
|
||
|
- phylink_set_port_modes(mask);
|
||
|
-
|
||
|
- /* Asymmetric pause is unsupported */
|
||
|
- phylink_set(mask, Pause);
|
||
|
-
|
||
|
- /* Half-duplex at speeds higher than 100Mbit is unsupported */
|
||
|
- if (state->interface != PHY_INTERFACE_MODE_2500BASEX) {
|
||
|
- phylink_set(mask, 1000baseT_Full);
|
||
|
- phylink_set(mask, 1000baseX_Full);
|
||
|
- }
|
||
|
-
|
||
|
- if (state->interface == PHY_INTERFACE_MODE_2500BASEX) {
|
||
|
- phylink_set(mask, 2500baseT_Full);
|
||
|
- phylink_set(mask, 2500baseX_Full);
|
||
|
- }
|
||
|
-
|
||
|
- if (!phy_interface_mode_is_8023z(state->interface)) {
|
||
|
- /* 10M and 100M are only supported in non-802.3z mode */
|
||
|
- phylink_set(mask, 10baseT_Half);
|
||
|
- phylink_set(mask, 10baseT_Full);
|
||
|
- phylink_set(mask, 100baseT_Half);
|
||
|
- phylink_set(mask, 100baseT_Full);
|
||
|
- }
|
||
|
-
|
||
|
- linkmode_and(supported, supported, mask);
|
||
|
- linkmode_and(state->advertising, state->advertising, mask);
|
||
|
+ phylink_generic_validate(config, supported, state);
|
||
|
}
|
||
|
|
||
|
static void mvneta_mac_pcs_get_state(struct phylink_config *config,
|
||
|
@@ -5167,6 +5138,9 @@ static int mvneta_probe(struct platform_
|
||
|
|
||
|
pp->phylink_config.dev = &dev->dev;
|
||
|
pp->phylink_config.type = PHYLINK_NETDEV;
|
||
|
+ pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |
|
||
|
+ MAC_100 | MAC_1000FD | MAC_2500FD;
|
||
|
+
|
||
|
phy_interface_set_rgmii(pp->phylink_config.supported_interfaces);
|
||
|
__set_bit(PHY_INTERFACE_MODE_QSGMII,
|
||
|
pp->phylink_config.supported_interfaces);
|