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openwrt/target/linux/generic/pending-5.4/770-13-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch

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ramips/mediatek: improve GRO performance, fix PPE packet parsing Backport upstream changes to initialize GDM settings and reset PPE Allow GMAC to recognize the special tag to fix PPE packet parsing Improve GRO performance by passing PPE L4 hash as skb hash Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-09-13 07:34:37 +00:00
From: Felix Fietkau <nbd@nbd.name>
Date: Sun, 13 Sep 2020 08:17:02 +0200
Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
When using DSA, set the special tag in GDM ingress control to allow the MAC
to parse packets properly earlier. This affects rx DMA source port reporting.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -19,6 +19,7 @@
#include <linux/interrupt.h>
#include <linux/pinctrl/devinfo.h>
#include <linux/phylink.h>
+#include <net/dsa.h>
#include "mtk_eth_soc.h"
kernel: bump 5.4 to 5.4.203 Merged upstream: bcm27xx/patches-5.4/950-1014-Revert-mailbox-avoid-timer-start-from-callback.patch generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch Manually adapted: layerscape/patches-5.4/801-audio-0005-Revert-ASoC-fsl_sai-Add-support-for-SAI-new-version.patch oxnas/patches-5.4/100-oxnas-clk-plla-pllb.patch Compile-tested: lantiq/xrx200 Run-tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2022-07-03 16:46:35 +00:00
@@ -1291,13 +1292,12 @@ static int mtk_poll_rx(struct napi_struc
ramips/mediatek: improve GRO performance, fix PPE packet parsing Backport upstream changes to initialize GDM settings and reset PPE Allow GMAC to recognize the special tag to fix PPE packet parsing Improve GRO performance by passing PPE L4 hash as skb hash Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-09-13 07:34:37 +00:00
break;
/* find out which mac the packet come from. values start at 1 */
- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
mediatek: rewrite flow offload code The code is now much cleaner and works better than the old code. Preparation for submitting it upstream (though with a different API) Also add back MT7621 support and fix flow table coherence issues on MT7622 Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-10-08 11:44:33 +00:00
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) ||
+ (trxd.rxd4 & RX_DMA_SPECIAL_TAG))
ramips/mediatek: improve GRO performance, fix PPE packet parsing Backport upstream changes to initialize GDM settings and reset PPE Allow GMAC to recognize the special tag to fix PPE packet parsing Improve GRO performance by passing PPE L4 hash as skb hash Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-09-13 07:34:37 +00:00
mac = 0;
- } else {
- mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
- RX_DMA_FPORT_MASK;
- mac--;
- }
+ else
+ mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
+ RX_DMA_FPORT_MASK) - 1;
if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
!eth->netdev[mac]))
kernel: bump 5.4 to 5.4.203 Merged upstream: bcm27xx/patches-5.4/950-1014-Revert-mailbox-avoid-timer-start-from-callback.patch generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch Manually adapted: layerscape/patches-5.4/801-audio-0005-Revert-ASoC-fsl_sai-Add-support-for-SAI-new-version.patch oxnas/patches-5.4/100-oxnas-clk-plla-pllb.patch Compile-tested: lantiq/xrx200 Run-tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2022-07-03 16:46:35 +00:00
@@ -2288,6 +2288,9 @@ static void mtk_gdm_config(struct mtk_et
ramips/mediatek: improve GRO performance, fix PPE packet parsing Backport upstream changes to initialize GDM settings and reset PPE Allow GMAC to recognize the special tag to fix PPE packet parsing Improve GRO performance by passing PPE L4 hash as skb hash Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-09-13 07:34:37 +00:00
val |= config;
+ if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
+ val |= MTK_GDMA_SPECIAL_TAG;
+
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
}
/* Reset and enable PSE */
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -82,6 +82,7 @@
/* GDM Exgress Control Register */
#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
+#define MTK_GDMA_SPECIAL_TAG BIT(24)
#define MTK_GDMA_ICS_EN BIT(22)
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)
kernel: bump 5.4 to 5.4.124 Manually rebased generic/hack-5.4/662-remove_pfifo_fast.patch ramips/patches-5.4/0048-asoc-add-mt7620-support.patch All others updated automatically. Compile-tested on: armvirt/64, x86/generic, ath79/generic, ramips/mt7621 Runtime-tested on: armvirt/64, x86/generic, ath79/generic Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2021-06-04 23:08:30 +00:00
@@ -324,6 +325,7 @@
mediatek: rewrite flow offload code The code is now much cleaner and works better than the old code. Preparation for submitting it upstream (though with a different API) Also add back MT7621 support and fix flow table coherence issues on MT7622 Signed-off-by: Felix Fietkau <nbd@nbd.name>
2020-10-08 11:44:33 +00:00
#define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
#define RX_DMA_FPORT_SHIFT 19
#define RX_DMA_FPORT_MASK 0x7
+#define RX_DMA_SPECIAL_TAG BIT(22)
/* PHY Indirect Access Control registers */
#define MTK_PHY_IAC 0x10004
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