openwrt/target/linux/mediatek/dts/mt7622-linksys-e8450.dts

// SPDX-License-Identifier: (GPL-2.0-only OR MIT)

/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

#include "mt7622.dtsi"
#include "mt6380.dtsi"

/ {
	model = "Linksys E8450";
	compatible = "linksys,e8450", "mediatek,mt7622";

	aliases {
		serial0 = &uart0;
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
	};

	cpus {
		cpu@0 {
			proc-supply = <&mt6380_vcpu_reg>;
			sram-supply = <&mt6380_vm_reg>;
		};

		cpu@1 {
			proc-supply = <&mt6380_vcpu_reg>;
			sram-supply = <&mt6380_vm_reg>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		factory {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
		};

		wps {
			label = "wps";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		led_power: power_blue {
			label = "power:blue";
			gpios = <&pio 95 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		power_orange {
			label = "power:orange";
			gpios = <&pio 96 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		inet_blue {
			label = "inet:blue";
			gpios = <&pio 97 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		inet_orange {
			label = "inet:orange";
			gpios = <&pio 98 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	memory {
		reg = <0 0x40000000 0 0x40000000>;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&bch {
	status = "okay";
};

&btif {
	status = "okay";
};

&cir {
	pinctrl-names = "default";
	pinctrl-0 = <&irrx_pins>;
	status = "okay";
};

&eth {
	pinctrl-names = "default";
	pinctrl-0 = <&eth_pins>;
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};

	mdio-bus {
		#address-cells = <1>;
		#size-cells = <0>;

		switch@0 {
			compatible = "mediatek,mt7531";
			reg = <0>;
			reset-gpios = <&pio 54 0>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "lan1";
				};

				port@1 {
					reg = <1>;
					label = "lan2";
				};

				port@2 {
					reg = <2>;
					label = "lan3";
				};

				port@3 {
					reg = <3>;
					label = "lan4";
				};

				port@4 {
					reg = <4>;
					label = "wan";
				};

				port@6 {
					reg = <6>;
					label = "cpu";
					ethernet = <&gmac0>;
					phy-mode = "2500base-x";

					fixed-link {
						speed = <2500>;
						full-duplex;
						pause;
					};
				};
			};
		};

	};
};

&pcie0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie0_pins>;
	status = "okay";
};

&pcie1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pcie1_pins>;
	status = "okay";
};

&slot0 {
	mt7915@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x05000>;
	};
};

&pio {
	/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
	 */
//	asm_sel {
//		gpio-hog;
//		gpios = <90 GPIO_ACTIVE_HIGH>;
//		output-high;
//	};

	eth_pins: eth-pins {
		mux {
			function = "eth";
			groups = "mdc_mdio", "rgmii_via_gmac2";
		};
	};

	irrx_pins: irrx-pins {
		mux {
			function = "ir";
			groups =  "ir_1_rx";
		};
	};

	irtx_pins: irtx-pins {
		mux {
			function = "ir";
			groups =  "ir_1_tx";
		};
	};

	pcie0_pins: pcie0-pins {
		mux {
			function = "pcie";
			groups = "pcie0_pad_perst",
				 "pcie0_1_waken",
				 "pcie0_1_clkreq";
		};
	};

	pcie1_pins: pcie1-pins {
		mux {
			function = "pcie";
			groups = "pcie1_pad_perst",
				 "pcie1_0_waken",
				 "pcie1_0_clkreq";
		};
	};

	pmic_bus_pins: pmic-bus-pins {
		mux {
			function = "pmic";
			groups = "pmic_bus";
		};
	};

	pwm7_pins: pwm1-2-pins {
		mux {
			function = "pwm";
			groups = "pwm_ch7_2";
		};
	};

	wled_pins: wled-pins {
		mux {
			function = "led";
			groups = "wled";
		};
	};

	/* Serial NAND is shared pin with SPI-NOR */
	serial_nand_pins: serial-nand-pins {
		mux {
			function = "flash";
			groups = "snfi";
		};
	};

	spic0_pins: spic0-pins {
		mux {
			function = "spi";
			groups = "spic0_0";
		};
	};

	spic1_pins: spic1-pins {
		mux {
			function = "spi";
			groups = "spic1_0";
		};
	};

	uart0_pins: uart0-pins {
		mux {
			function = "uart";
			groups = "uart0_0_tx_rx" ;
		};
	};

	uart2_pins: uart2-pins {
		mux {
			function = "uart";
			groups = "uart2_1_tx_rx" ;
		};
	};

	watchdog_pins: watchdog-pins {
		mux {
			function = "watchdog";
			groups = "watchdog";
		};
	};
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm7_pins>;
	status = "okay";
};

&pwrap {
	pinctrl-names = "default";
	pinctrl-0 = <&pmic_bus_pins>;

	status = "okay";
};

&sata {
	status = "disabled";
};

&sata_phy {
	status = "disabled";
};

&snfi {
	pinctrl-names = "default";
	pinctrl-0 = <&serial_nand_pins>;
	status = "okay";

	spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		spi-max-frequency = <104000000>;
		reg = <0>;

		mediatek,bmt-v2;
		mediatek,bmt-table-size = <0x1000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "Preloader";
				reg = <0x00000 0x0080000>;
				read-only;
			};

			partition@80000 {
				label = "ATF";
				reg = <0x80000 0x0040000>;
			};

			partition@c0000 {
				label = "u-boot";
				reg = <0xc0000 0x0080000>;
			};

			partition@140000 {
				label = "u-boot-env";
				reg = <0x140000 0x0080000>;
			};

			factory: partition@1c0000 {
				label = "factory";
				reg = <0x1c0000 0x0100000>;
			};

			partition@300000 {
				label = "devinfo";
				reg = <0x300000 0x020000>;
			};

			partition@320000 {
				label = "senv";
				reg = <0x320000 0x020000>;
			};

			partition@360000 {
				label = "bootseq";
				reg = <0x360000 0x020000>;
			};

			partition@500000 {
				label = "firmware1";
				compatible = "denx,fit";
				openwrt,cmdline-match = "mtdparts=master";
				reg = <0x500000 0x1E00000>;
			};

			partition@2300000 {
				label = "firmware2";
				compatible = "denx,fit";
				openwrt,cmdline-match = "mtdparts=slave";
				reg = <0x2300000 0x1E00000>;
			};

			partition@4100000 {
				label = "data";
				reg = <0x4100000 0x1900000>;
			};

			partition@5100000 {
				label = "mfg";
				reg = <0x5a00000 0x1400000>;
			};
		};
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic0_pins>;
	status = "okay";
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic1_pins>;
	status = "okay";
};

&ssusb {
	vusb33-supply = <&reg_3p3v>;
	vbus-supply = <&reg_5v>;
	status = "okay";
};

&u3phy {
	status = "okay";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&watchdog {
	pinctrl-names = "default";
	pinctrl-0 = <&watchdog_pins>;
	status = "okay";
};

&wmac {
	mediatek,mtd-eeprom = <&factory 0x0000>;
	status = "okay";
};