2022-07-25 00:31:20 +00:00
|
|
|
From 1c2211cb15dd3957fb26c0e1615eceb5db851ad6 Mon Sep 17 00:00:00 2001
|
|
|
|
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
|
|
|
|
Date: Mon, 11 Apr 2022 10:46:22 +0100
|
|
|
|
Subject: [PATCH 06/13] net: dsa: mt7530: switch to use phylink_get_linkmodes()
|
|
|
|
MIME-Version: 1.0
|
|
|
|
Content-Type: text/plain; charset=UTF-8
|
|
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
|
|
|
|
Switch mt7530 to use phylink_get_linkmodes() to generate the ethtool
|
|
|
|
linkmodes that can be supported. We are unable to use the generic
|
|
|
|
helper for this as pause modes are dependent on the interface as
|
|
|
|
the Autoneg bit depends on the interface mode.
|
|
|
|
|
|
|
|
Tested-by: Marek Behún <kabel@kernel.org>
|
|
|
|
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
|
|
|
|
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
|
|
|
---
|
|
|
|
drivers/net/dsa/mt7530.c | 57 ++++------------------------------------
|
|
|
|
1 file changed, 5 insertions(+), 52 deletions(-)
|
|
|
|
|
|
|
|
--- a/drivers/net/dsa/mt7530.c
|
|
|
|
+++ b/drivers/net/dsa/mt7530.c
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -2586,19 +2586,6 @@ static int mt7531_rgmii_setup(struct mt7
|
2022-07-25 00:31:20 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
-static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port,
|
|
|
|
- phy_interface_t interface,
|
|
|
|
- unsigned long *supported)
|
|
|
|
-{
|
|
|
|
- /* Port5 supports ethier RGMII or SGMII.
|
|
|
|
- * Port6 supports SGMII only.
|
|
|
|
- */
|
|
|
|
- if (port == 6 && interface == PHY_INTERFACE_MODE_2500BASEX) {
|
|
|
|
- phylink_set(supported, 2500baseX_Full);
|
|
|
|
- phylink_set(supported, 2500baseT_Full);
|
|
|
|
- }
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
static void
|
|
|
|
mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
|
|
|
|
unsigned int mode, phy_interface_t interface,
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -2965,51 +2952,21 @@ static void mt753x_phylink_get_caps(stru
|
2022-07-25 00:31:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
-mt7530_mac_port_validate(struct dsa_switch *ds, int port,
|
|
|
|
- phy_interface_t interface,
|
|
|
|
- unsigned long *supported)
|
|
|
|
-{
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void mt7531_mac_port_validate(struct dsa_switch *ds, int port,
|
|
|
|
- phy_interface_t interface,
|
|
|
|
- unsigned long *supported)
|
|
|
|
-{
|
|
|
|
- struct mt7530_priv *priv = ds->priv;
|
|
|
|
-
|
|
|
|
- mt7531_sgmii_validate(priv, port, interface, supported);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void
|
|
|
|
mt753x_phylink_validate(struct dsa_switch *ds, int port,
|
|
|
|
unsigned long *supported,
|
|
|
|
struct phylink_link_state *state)
|
|
|
|
{
|
|
|
|
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
|
|
|
|
- struct mt7530_priv *priv = ds->priv;
|
|
|
|
+ u32 caps;
|
|
|
|
+
|
|
|
|
+ caps = dsa_to_port(ds, port)->pl_config.mac_capabilities;
|
|
|
|
|
|
|
|
phylink_set_port_modes(mask);
|
|
|
|
+ phylink_get_linkmodes(mask, state->interface, caps);
|
|
|
|
|
|
|
|
if (state->interface != PHY_INTERFACE_MODE_TRGMII &&
|
|
|
|
- !phy_interface_mode_is_8023z(state->interface)) {
|
|
|
|
- phylink_set(mask, 10baseT_Half);
|
|
|
|
- phylink_set(mask, 10baseT_Full);
|
|
|
|
- phylink_set(mask, 100baseT_Half);
|
|
|
|
- phylink_set(mask, 100baseT_Full);
|
|
|
|
+ !phy_interface_mode_is_8023z(state->interface))
|
|
|
|
phylink_set(mask, Autoneg);
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- /* This switch only supports 1G full-duplex. */
|
|
|
|
- if (state->interface != PHY_INTERFACE_MODE_MII &&
|
|
|
|
- state->interface != PHY_INTERFACE_MODE_2500BASEX) {
|
|
|
|
- phylink_set(mask, 1000baseT_Full);
|
|
|
|
- phylink_set(mask, 1000baseX_Full);
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- priv->info->mac_port_validate(ds, port, state->interface, mask);
|
|
|
|
-
|
|
|
|
- phylink_set(mask, Pause);
|
|
|
|
- phylink_set(mask, Asym_Pause);
|
|
|
|
|
|
|
|
linkmode_and(supported, supported, mask);
|
|
|
|
linkmode_and(state->advertising, state->advertising, mask);
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -3210,7 +3167,6 @@ static const struct mt753x_info mt753x_t
|
2022-07-25 00:31:20 +00:00
|
|
|
.phy_write = mt7530_phy_write,
|
|
|
|
.pad_setup = mt7530_pad_clk_setup,
|
|
|
|
.mac_port_get_caps = mt7530_mac_port_get_caps,
|
|
|
|
- .mac_port_validate = mt7530_mac_port_validate,
|
|
|
|
.mac_port_get_state = mt7530_phylink_mac_link_state,
|
|
|
|
.mac_port_config = mt7530_mac_config,
|
|
|
|
},
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -3221,7 +3177,6 @@ static const struct mt753x_info mt753x_t
|
2022-07-25 00:31:20 +00:00
|
|
|
.phy_write = mt7530_phy_write,
|
|
|
|
.pad_setup = mt7530_pad_clk_setup,
|
|
|
|
.mac_port_get_caps = mt7530_mac_port_get_caps,
|
|
|
|
- .mac_port_validate = mt7530_mac_port_validate,
|
|
|
|
.mac_port_get_state = mt7530_phylink_mac_link_state,
|
|
|
|
.mac_port_config = mt7530_mac_config,
|
|
|
|
},
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -3233,7 +3188,6 @@ static const struct mt753x_info mt753x_t
|
2022-07-25 00:31:20 +00:00
|
|
|
.pad_setup = mt7531_pad_setup,
|
|
|
|
.cpu_port_config = mt7531_cpu_port_config,
|
|
|
|
.mac_port_get_caps = mt7531_mac_port_get_caps,
|
|
|
|
- .mac_port_validate = mt7531_mac_port_validate,
|
|
|
|
.mac_port_get_state = mt7531_phylink_mac_link_state,
|
|
|
|
.mac_port_config = mt7531_mac_config,
|
|
|
|
.mac_pcs_an_restart = mt7531_sgmii_restart_an,
|
2023-06-28 10:53:45 +00:00
|
|
|
@@ -3295,7 +3249,6 @@ mt7530_probe(struct mdio_device *mdiodev
|
2022-07-25 00:31:20 +00:00
|
|
|
if (!priv->info->sw_setup || !priv->info->pad_setup ||
|
|
|
|
!priv->info->phy_read || !priv->info->phy_write ||
|
|
|
|
!priv->info->mac_port_get_caps ||
|
|
|
|
- !priv->info->mac_port_validate ||
|
|
|
|
!priv->info->mac_port_get_state || !priv->info->mac_port_config)
|
|
|
|
return -EINVAL;
|
|
|
|
|