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30 lines
1.2 KiB
Diff
30 lines
1.2 KiB
Diff
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From 92c2dc96af79b2f181cc97157ce3ef2be5b48f4c Mon Sep 17 00:00:00 2001
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From: Walker Chen <walker.chen@starfivetech.com>
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Date: Wed, 22 Mar 2023 17:48:19 +0800
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Subject: [PATCH 113/122] dmaengine: dw-axi-dmac: Increase polling time to DMA
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transmission completion status
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The bit DMAC_CHEN[0] is automatically cleared by hardware to disable the
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channel after the last AMBA transfer of the DMA transfer to the
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destination has completed. Software can therefore poll this bit to
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determine when this channel is free for a new DMA transfer.
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This time requires at least 40 milliseconds on JH7110 SoC, otherwise an
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error message 'failed to stop' will be reported.
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Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
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---
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drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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@@ -1147,7 +1147,7 @@ static int dma_chan_terminate_all(struct
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axi_chan_disable(chan);
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ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val,
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- !(val & chan_active), 1000, 10000);
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+ !(val & chan_active), 1000, 50000);
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if (ret == -ETIMEDOUT)
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dev_warn(dchan2dev(dchan),
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"%s failed to stop\n", axi_chan_name(chan));
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