2021-08-21 08:54:34 +00:00
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From be6ae78e28ff92b6da6af988f3013420af957481 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.org>
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Date: Mon, 26 Oct 2020 14:03:35 +0000
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Subject: [PATCH] xhci: quirks: add link TRB quirk for VL805
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The VL805 controller can't cope with the TR Dequeue Pointer for an endpoint
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being set to a Link TRB. The hardware-maintained endpoint context ends up
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stuck at the address of the Link TRB, leading to erroneous ring expansion
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events whenever the enqueue pointer wraps to the dequeue position.
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If the search for the end of the current TD and ring cycle state lands on
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a Link TRB, move to the next segment.
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See: https://github.com/raspberrypi/linux/issues/3919
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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drivers/usb/host/xhci-pci.c | 1 +
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drivers/usb/host/xhci-ring.c | 10 ++++++++++
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drivers/usb/host/xhci.h | 1 +
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3 files changed, 12 insertions(+)
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--- a/drivers/usb/host/xhci-pci.c
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+++ b/drivers/usb/host/xhci-pci.c
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@@ -277,6 +277,7 @@ static void xhci_pci_quirks(struct devic
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if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
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xhci->quirks |= XHCI_LPM_SUPPORT;
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xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
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+ xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
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}
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if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
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--- a/drivers/usb/host/xhci-ring.c
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+++ b/drivers/usb/host/xhci-ring.c
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@@ -653,6 +653,16 @@ void xhci_find_new_dequeue_state(struct
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} while (!cycle_found || !td_last_trb_found);
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+ /*
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+ * Quirk: the xHC does not correctly parse link TRBs if the HW Dequeue
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+ * pointer is set to one. Advance to the next TRB (and next segment).
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+ */
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+ if (xhci->quirks & XHCI_AVOID_DQ_ON_LINK && trb_is_link(new_deq)) {
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+ if (link_trb_toggles_cycle(new_deq))
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+ state->new_cycle_state ^= 0x1;
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+ next_trb(xhci, ep_ring, &new_seg, &new_deq);
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+ }
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+
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state->new_deq_seg = new_seg;
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state->new_deq_ptr = new_deq;
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--- a/drivers/usb/host/xhci.h
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+++ b/drivers/usb/host/xhci.h
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2021-09-12 08:54:32 +00:00
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@@ -1885,6 +1885,7 @@ struct xhci_hcd {
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2021-08-21 08:54:34 +00:00
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#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
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#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
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#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(41)
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+#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(42)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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