2020-06-04 12:20:34 +00:00
|
|
|
--- a/drivers/crypto/inside-secure/safexcel.c
|
|
|
|
|
+++ b/drivers/crypto/inside-secure/safexcel.c
|
2020-06-09 12:18:25 +00:00
|
|
|
@@ -595,6 +595,14 @@ static int safexcel_hw_init(struct safex
|
2020-06-04 12:20:34 +00:00
|
|
|
val |= EIP197_MST_CTRL_TX_MAX_CMD(5);
|
|
|
|
|
writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
|
|
|
|
|
}
|
|
|
|
|
+ /*
|
2020-07-16 07:14:49 +00:00
|
|
|
+ * Set maximum number of TX commands to 2^4 = 16 for EIP97 HW2.1/HW2.3
|
2020-06-04 12:20:34 +00:00
|
|
|
+ */
|
|
|
|
|
+ else {
|
|
|
|
|
+ val = 0;
|
2020-07-16 07:14:49 +00:00
|
|
|
+ val |= EIP97_MST_CTRL_TX_MAX_CMD(4);
|
2020-06-04 12:20:34 +00:00
|
|
|
+ writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
|
|
|
|
|
+ }
|
|
|
|
|
|
|
|
|
|
/* Configure wr/rd cache values */
|
|
|
|
|
writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) |
|
|
|
|
|
--- a/drivers/crypto/inside-secure/safexcel.h
|
|
|
|
|
+++ b/drivers/crypto/inside-secure/safexcel.h
|
|
|
|
|
@@ -306,6 +306,7 @@
|
|
|
|
|
#define EIP197_MST_CTRL_RD_CACHE(n) (((n) & 0xf) << 0)
|
|
|
|
|
#define EIP197_MST_CTRL_WD_CACHE(n) (((n) & 0xf) << 4)
|
|
|
|
|
#define EIP197_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 20)
|
|
|
|
|
+#define EIP97_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 4)
|
|
|
|
|
#define EIP197_MST_CTRL_BYTE_SWAP BIT(24)
|
|
|
|
|
#define EIP197_MST_CTRL_NO_BYTE_SWAP BIT(25)
|
|
|
|
|
#define EIP197_MST_CTRL_BYTE_SWAP_BITS GENMASK(25, 24)
|
