openwrt/target/linux/layerscape/patches-5.15/702-phy-Add-2.5G-SGMII-interface-mode.patch

From c918c472546afa83a619ae3cb1a9d7d346c6e288 Mon Sep 17 00:00:00 2001
From: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Date: Wed, 29 Nov 2017 15:27:57 +0530
Subject: [PATCH 154/173] phy: Add 2.5G SGMII interface mode

Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
in existing phy_interface list

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
---
 include/linux/phy.h | 3 +++
 1 file changed, 3 insertions(+)

--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -136,6 +136,7 @@ int phy_interface_num_ports(phy_interfac
 	case PHY_INTERFACE_MODE_RXAUI:
 	case PHY_INTERFACE_MODE_XAUI:
 	case PHY_INTERFACE_MODE_1000BASEKX:
+	case PHY_INTERFACE_MODE_2500SGMII:
 		return 1;
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -400,6 +400,7 @@ void phylink_get_linkmodes(unsigned long
 		caps |= MAC_1000FD;
 		break;
 
+	case PHY_INTERFACE_MODE_2500SGMII:
 	case PHY_INTERFACE_MODE_2500BASEX:
 		caps |= MAC_2500FD;
 		break;
@@ -654,6 +655,10 @@ static int phylink_parse_mode(struct phy
 			phylink_set(pl->supported, 2500baseX_Full);
 			break;
 
+		case PHY_INTERFACE_MODE_2500SGMII:
+			phylink_set(pl->supported, 2500baseT_Full);
+			break;
+
 		case PHY_INTERFACE_MODE_5GBASER:
 			phylink_set(pl->supported, 5000baseT_Full);
 			break;
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -157,6 +157,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_10GKR,
 	PHY_INTERFACE_MODE_QUSGMII,
 	PHY_INTERFACE_MODE_1000BASEKX,
+	PHY_INTERFACE_MODE_2500SGMII,
 	PHY_INTERFACE_MODE_MAX,
 } phy_interface_t;
 
@@ -276,6 +277,8 @@ static inline const char *phy_modes(phy_
 		return "100base-x";
 	case PHY_INTERFACE_MODE_QUSGMII:
 		return "qusgmii";
+	case PHY_INTERFACE_MODE_2500SGMII:
+		return "sgmii-2500";
 	default:
 		return "unknown";
 	}