2022-07-02 20:18:59 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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2024-02-07 13:48:43 +00:00
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#include <dt-bindings/leds/common.h>
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2022-07-02 20:18:59 +00:00
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/ {
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compatible = "netgear,wax202", "mediatek,mt7621-soc";
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model = "Netgear WAX202";
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_orange;
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led-running = &led_power_green;
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led-upgrade = &led_power_orange;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power_green: power_green {
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2024-02-07 13:48:43 +00:00
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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2022-07-02 20:18:59 +00:00
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gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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};
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led_power_orange: power_orange {
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2024-02-07 13:48:43 +00:00
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_ORANGE>;
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2022-07-02 20:18:59 +00:00
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gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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};
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led_net_green: net_green {
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label = "green:net";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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};
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led_net_blue: net_blue {
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label = "blue:net";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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led_lan1_orange: lan1_orange {
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label = "orange:lan1";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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led_lan2_orange: lan2_orange {
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label = "orange:lan2";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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led_lan3_orange: lan3_orange {
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label = "orange:lan3";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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led_wifi2g_green: wifi2g_green {
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label = "green:wifi2g";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0radio";
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};
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led_wifi2g_blue: wifi2g_blue {
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label = "blue:wifi2g";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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};
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led_wifi5g_green: wifi5g_green {
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label = "green:wifi5g";
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1radio";
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};
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led_wifi5g_blue: wifi5g_blue {
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label = "blue:wifi5g";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "Config";
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reg = <0x80000 0x80000>;
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read-only;
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};
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2024-02-17 14:10:10 +00:00
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partition@100000 {
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2022-07-02 20:18:59 +00:00
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label = "Factory";
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reg = <0x100000 0x80000>;
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read-only;
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2023-10-02 02:12:02 +00:00
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2023-11-07 23:55:58 +00:00
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0xe00>;
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};
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2023-10-02 02:12:02 +00:00
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};
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2022-07-02 20:18:59 +00:00
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};
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partition@180000 {
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label = "firmware";
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reg = <0x180000 0x2600000>;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x400000>;
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};
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partition@400000 {
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label = "ubi";
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reg = <0x400000 0x2200000>;
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};
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};
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partition@2780000 {
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label = "firmware_backup";
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reg = <0x2780000 0x2600000>;
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read-only;
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};
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partition@4d80000 {
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label = "CFG";
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reg = <0x4d80000 0x800000>;
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read-only;
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};
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partition@5580000 {
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label = "RAE";
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reg = <0x5580000 0x400000>;
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read-only;
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};
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partition@5980000 {
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label = "POT";
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reg = <0x5980000 0x100000>;
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read-only;
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};
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partition@5a80000 {
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label = "Language";
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reg = <0x5a80000 0x400000>;
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read-only;
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};
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partition@5e80000 {
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label = "Traffic";
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reg = <0x5e80000 0x200000>;
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read-only;
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};
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partition@6080000 {
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label = "Cert";
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reg = <0x6080000 0x100000>;
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read-only;
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};
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partition@6180000 {
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label = "NTGRcryptK";
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reg = <0x6180000 0x100000>;
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read-only;
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};
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partition@6280000 {
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label = "NTGRcryptD";
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reg = <0x6280000 0x500000>;
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read-only;
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};
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partition@6780000 {
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label = "LOG";
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reg = <0x6780000 0x100000>;
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read-only;
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};
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partition@6880000 {
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label = "User_data";
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reg = <0x6880000 0x640000>;
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read-only;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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2023-10-02 02:12:02 +00:00
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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2022-07-02 20:18:59 +00:00
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};
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};
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&state_default {
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gpio {
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groups = "uart3", "uart2", "jtag", "wdt";
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function = "gpio";
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};
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};
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2022-07-05 22:20:32 +00:00
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&gmac1 {
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status = "okay";
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label = "wan";
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phy-handle = <ðphy0>;
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};
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ramips: mt7621-dts: describe switch PHYs and adjust PHY muxing
Currently, the MT7530 DSA subdriver configures the MT7530 switch to provide
direct access to switch PHYs, meaning, the switch PHYs listen on the MDIO
bus the switch listens on. The PHY muxing feature makes use of this.
This is problematic as the PHY may be attached before the switch is
initialised, in which case, the PHY will fail to be attached.
Since commit 91374ba537bd ("net: dsa: mt7530: support OF-based registration
of switch MDIO bus") on mainline Linux, we can describe the switch PHYs on
the MDIO bus of the switch on the device tree.
When the PHY is described this way, the switch will be initialised first,
then the switch MDIO bus will be registered. Only after these steps, the
PHY will be attached.
Describe the switch PHYs on mt7621.dtsi and remove defining the switch PHY
on the SoC's mdio bus node. When the PHY muxing is in use, the interrupts
for the muxed PHY won't work, therefore delete the "interrupts" property on
the devices where the PHY muxing feature is in use.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
2024-04-28 19:52:51 +00:00
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ðphy0 {
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/delete-property/ interrupts;
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2022-07-05 22:20:32 +00:00
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};
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2022-07-02 20:18:59 +00:00
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&switch0 {
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ports {
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port@1 {
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status = "okay";
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label = "lan1";
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};
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port@2 {
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status = "okay";
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label = "lan2";
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};
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/* port@3 is not used */
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port@4 {
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status = "okay";
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label = "lan3";
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};
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};
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};
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&xhci {
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status = "disabled";
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};
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