openwrt/package/kernel/mac80211/patches/ath5k/201-ath5k-WAR-for-AR71xx-PCI-bug.patch

--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -62,8 +62,14 @@ static const struct ath5k_ini ar5210_ini
 	{ AR5K_IMR,		0 },
 	{ AR5K_IER,		AR5K_IER_DISABLE },
 	{ AR5K_BSR,		0, AR5K_INI_READ },
+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
 	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
 	{ AR5K_RXCFG,		AR5K_DMASIZE_128B },
+#else
+	/* WAR for AR71xx PCI bug */
+	{ AR5K_TXCFG,		AR5K_DMASIZE_128B },
+	{ AR5K_RXCFG,		AR5K_DMASIZE_4B },
+#endif
 	{ AR5K_CFG,		AR5K_INIT_CFG },
 	{ AR5K_TOPS,		8 },
 	{ AR5K_RXNOFRM,		8 },
--- a/drivers/net/wireless/ath/ath5k/dma.c
+++ b/drivers/net/wireless/ath/ath5k/dma.c
@@ -869,10 +869,18 @@ ath5k_hw_dma_init(struct ath5k_hw *ah)
 	 * guess we can tweak it and see how it goes ;-)
 	 */
 	if (ah->ah_version != AR5K_AR5210) {
+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)
 		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
 			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
 		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
 			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
+#else
+		/* WAR for AR71xx PCI bug */
+		AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
+			AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
+		AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
+			AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);
+#endif
 	}
 
 	/* Pre-enable interrupts on 5211/5212*/
mac80211: update to wireless-testing 2010-11-30 SVN-Revision: 24235 2010-12-04 01:32:04 +00:00			`--- a/drivers/net/wireless/ath/ath5k/initvals.c`
			`+++ b/drivers/net/wireless/ath/ath5k/initvals.c`
mac80211: update to wireless-testing 2013-06-13 + latest backport infrastructure Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 36939 2013-06-15 20:14:06 +00:00			`@@ -62,8 +62,14 @@ static const struct ath5k_ini ar5210_ini`
mac80211: update to wireless-testing 2010-11-30 SVN-Revision: 24235 2010-12-04 01:32:04 +00:00			`{ AR5K_IMR, 0 },`
			`{ AR5K_IER, AR5K_IER_DISABLE },`
			`{ AR5K_BSR, 0, AR5K_INI_READ },`
package/mac80211: apply AR71XX PCI workaround on ATH79 as well SVN-Revision: 30413 2012-02-10 13:16:49 +00:00			`+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)`
mac80211: update to wireless-testing 2010-11-30 SVN-Revision: 24235 2010-12-04 01:32:04 +00:00			`{ AR5K_TXCFG, AR5K_DMASIZE_128B },`
			`{ AR5K_RXCFG, AR5K_DMASIZE_128B },`
			`+#else`
			`+ /* WAR for AR71xx PCI bug */`
mac80211: Improve ath5k/ar71xx PCI bug WAR It has been confirmed by Atheros that this PCI bug affects the RX side only, so we can keep the 128B DMA size for TX. With this change we can double the thruput of ath5k from 15Mps to 30Mbps. We have been using this patch since more than 6 month in a production environment without problems and a significant performance improvement. It has also been said to fix HW encryption: http://www.mail-archive.com/ath5k-devel@lists.ath5k.org/msg04311.html Patch from: kentarou matsuyama <matsuyama@thinktube.com> SVN-Revision: 25104 2011-01-26 11:33:50 +00:00			`+ { AR5K_TXCFG, AR5K_DMASIZE_128B },`
mac80211: update to wireless-testing 2010-11-30 SVN-Revision: 24235 2010-12-04 01:32:04 +00:00			`+ { AR5K_RXCFG, AR5K_DMASIZE_4B },`
			`+#endif`
			`{ AR5K_CFG, AR5K_INIT_CFG },`
			`{ AR5K_TOPS, 8 },`
			`{ AR5K_RXNOFRM, 8 },`
			`--- a/drivers/net/wireless/ath/ath5k/dma.c`
			`+++ b/drivers/net/wireless/ath/ath5k/dma.c`
mac80211: update to wireless-testing 2014-01-23 Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 39427 2014-01-30 13:21:36 +00:00			`@@ -869,10 +869,18 @@ ath5k_hw_dma_init(struct ath5k_hw *ah)`
mac80211: fix ath5k dma size workaround for ar71xx Atheros legacy hardware does not perform well on ar71xx unless both TXCFG and RXCFG are forced to 4 bytes. The previous patch only changed RXCFG. The OpenWrt Madwifi HAL also sets both RXCFG and TXCFG SVN-Revision: 17328 2009-08-20 15:09:03 +00:00			`* guess we can tweak it and see how it goes ;-)`
			`*/`
mac80211/ath5k: add workaround for the AR71xx PCI bug SVN-Revision: 16535 2009-06-21 14:38:15 +00:00			`if (ah->ah_version != AR5K_AR5210) {`
package/mac80211: apply AR71XX PCI workaround on ATH79 as well SVN-Revision: 30413 2012-02-10 13:16:49 +00:00			`+#if !defined(CONFIG_ATHEROS_AR71XX) && !defined(CONFIG_ATH79)`
mac80211/ath5k: add workaround for the AR71xx PCI bug SVN-Revision: 16535 2009-06-21 14:38:15 +00:00			`AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,`
			`AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);`
			`AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,`
			`AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);`
			`+#else`
			`+ /* WAR for AR71xx PCI bug */`
mac80211: fix ath5k dma size workaround for ar71xx Atheros legacy hardware does not perform well on ar71xx unless both TXCFG and RXCFG are forced to 4 bytes. The previous patch only changed RXCFG. The OpenWrt Madwifi HAL also sets both RXCFG and TXCFG SVN-Revision: 17328 2009-08-20 15:09:03 +00:00			`+ AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,`
mac80211: Improve ath5k/ar71xx PCI bug WAR It has been confirmed by Atheros that this PCI bug affects the RX side only, so we can keep the 128B DMA size for TX. With this change we can double the thruput of ath5k from 15Mps to 30Mbps. We have been using this patch since more than 6 month in a production environment without problems and a significant performance improvement. It has also been said to fix HW encryption: http://www.mail-archive.com/ath5k-devel@lists.ath5k.org/msg04311.html Patch from: kentarou matsuyama <matsuyama@thinktube.com> SVN-Revision: 25104 2011-01-26 11:33:50 +00:00			`+ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);`
mac80211/ath5k: add workaround for the AR71xx PCI bug SVN-Revision: 16535 2009-06-21 14:38:15 +00:00			`+ AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,`
			`+ AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B);`
			`+#endif`
			`}`

			`/* Pre-enable interrupts on 5211/5212*/`