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310 lines
9.1 KiB
Diff
310 lines
9.1 KiB
Diff
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From 9a1509cc97e4329475cbd0c45258dcdf5d49a7f1 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 17 Jun 2021 12:05:25 +0100
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Subject: [PATCH] media: i2c: imx290: Support 60fps in 2 lane operation
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Commit "97589ad61c73 media: i2c: imx290: Add support for 2 data lanes"
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added support for running in two lane mode (instead of 4), but
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without changing the link frequency that resulted in a max of 30fps.
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Commit "98e0500eadb7 media: i2c: imx290: Add configurable link frequency
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and pixel rate" then doubled the link frequency when in 2 lane mode,
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but didn't undo the correction for running at only 30fps, just extending
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horizontal blanking instead.
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It also didn't update the CSI timing registers in accordance with the
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datasheet.
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Remove the 30fps limit on 2 lane by correcting the register config
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in accordance with the datasheet for 60fps operation over 2 lanes.
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Frame rate control (via V4L2_CID_VBLANK or HBLANK) can still reduce
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the frame rate on 2 lanes back to 30fps.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/media/i2c/imx290.c | 163 ++++++++++++++++++++++---------------
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1 file changed, 97 insertions(+), 66 deletions(-)
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--- a/drivers/media/i2c/imx290.c
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+++ b/drivers/media/i2c/imx290.c
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@@ -46,8 +46,7 @@ enum imx290_clk_index {
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#define IMX290_VMAX_MAX 0x3fff
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#define IMX290_HMAX_LOW 0x301c
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#define IMX290_HMAX_HIGH 0x301d
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-#define IMX290_HMAX_MIN_2LANE 4400 /* Min of 4400 pixels = 30fps */
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-#define IMX290_HMAX_MIN_4LANE 2200 /* Min of 2200 pixels = 60fps */
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+#define IMX290_HMAX_MIN 2200 /* Min of 2200 pixels = 60fps */
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#define IMX290_HMAX_MAX 0xffff
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#define IMX290_EXPOSURE_MIN 1
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@@ -89,8 +88,11 @@ struct imx290_mode {
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u8 link_freq_index;
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struct v4l2_rect crop;
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- const struct imx290_regval *data;
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- u32 data_size;
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+ const struct imx290_regval *mode_data;
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+ u32 mode_data_size;
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+ const struct imx290_regval *lane_data;
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+ u32 lane_data_size;
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+
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/* Clock setup can vary. Index as enum imx290_clk_index */
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const struct imx290_regval *clk_data[2];
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@@ -242,8 +244,9 @@ static const struct imx290_regval imx290
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{ 0x3480, 0x92 },
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};
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-static const struct imx290_regval imx290_1080p_settings[] = {
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+static const struct imx290_regval imx290_1080p_common_settings[] = {
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/* mode settings */
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+ { IMX290_FR_FDG_SEL, 0x01 },
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{ 0x3007, 0x00 },
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{ 0x303a, 0x0c },
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{ 0x3414, 0x0a },
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@@ -253,8 +256,36 @@ static const struct imx290_regval imx290
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{ 0x3419, 0x04 },
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{ 0x3012, 0x64 },
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{ 0x3013, 0x00 },
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+};
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+
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+static const struct imx290_regval imx290_1080p_2lane_settings[] = {
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+ { 0x3405, 0x00 },
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/* data rate settings */
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+ { IMX290_PHY_LANE_NUM, 0x01 },
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+ { IMX290_CSI_LANE_MODE, 0x01 },
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+ { 0x3446, 0x77 },
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+ { 0x3447, 0x00 },
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+ { 0x3448, 0x67 },
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+ { 0x3449, 0x00 },
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+ { 0x344a, 0x47 },
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+ { 0x344b, 0x00 },
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+ { 0x344c, 0x37 },
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+ { 0x344d, 0x00 },
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+ { 0x344e, 0x3f },
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+ { 0x344f, 0x00 },
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+ { 0x3450, 0xff },
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+ { 0x3451, 0x00 },
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+ { 0x3452, 0x3f },
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+ { 0x3453, 0x00 },
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+ { 0x3454, 0x37 },
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+ { 0x3455, 0x00 },
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+};
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+
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+static const struct imx290_regval imx290_1080p_4lane_settings[] = {
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{ 0x3405, 0x10 },
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+ /* data rate settings */
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+ { IMX290_PHY_LANE_NUM, 0x03 },
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+ { IMX290_CSI_LANE_MODE, 0x03 },
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{ 0x3446, 0x57 },
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{ 0x3447, 0x00 },
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{ 0x3448, 0x37 },
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@@ -297,8 +328,9 @@ static const struct imx290_regval imx290
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{ 0x3480, 0x92 },
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};
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-static const struct imx290_regval imx290_720p_settings[] = {
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+static const struct imx290_regval imx290_720p_common_settings[] = {
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/* mode settings */
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+ { IMX290_FR_FDG_SEL, 0x01 },
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{ 0x3007, 0x10 },
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{ 0x303a, 0x06 },
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{ 0x3414, 0x04 },
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@@ -308,8 +340,36 @@ static const struct imx290_regval imx290
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{ 0x3419, 0x02 },
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{ 0x3012, 0x64 },
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{ 0x3013, 0x00 },
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+};
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+
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+static const struct imx290_regval imx290_720p_2lane_settings[] = {
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+ { 0x3405, 0x00 },
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+ { IMX290_PHY_LANE_NUM, 0x01 },
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+ { IMX290_CSI_LANE_MODE, 0x01 },
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/* data rate settings */
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+ { 0x3446, 0x67 },
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+ { 0x3447, 0x00 },
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+ { 0x3448, 0x57 },
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+ { 0x3449, 0x00 },
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+ { 0x344a, 0x2f },
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+ { 0x344b, 0x00 },
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+ { 0x344c, 0x27 },
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+ { 0x344d, 0x00 },
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+ { 0x344e, 0x2f },
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+ { 0x344f, 0x00 },
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+ { 0x3450, 0xbf },
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+ { 0x3451, 0x00 },
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+ { 0x3452, 0x2f },
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+ { 0x3453, 0x00 },
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+ { 0x3454, 0x27 },
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+ { 0x3455, 0x00 },
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+};
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+
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+static const struct imx290_regval imx290_720p_4lane_settings[] = {
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{ 0x3405, 0x10 },
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+ { IMX290_PHY_LANE_NUM, 0x03 },
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+ { IMX290_CSI_LANE_MODE, 0x03 },
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+ /* data rate settings */
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{ 0x3446, 0x4f },
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{ 0x3447, 0x00 },
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{ 0x3448, 0x2f },
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@@ -389,7 +449,7 @@ static const struct imx290_mode imx290_m
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{
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.width = 1920,
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.height = 1080,
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- .hmax = 0x1130,
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+ .hmax = 0x0898,
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.vmax = 0x0465,
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.link_freq_index = FREQ_INDEX_1080P,
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.crop = {
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@@ -398,8 +458,10 @@ static const struct imx290_mode imx290_m
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.width = 1920,
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.height = 1080,
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},
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- .data = imx290_1080p_settings,
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- .data_size = ARRAY_SIZE(imx290_1080p_settings),
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+ .mode_data = imx290_1080p_common_settings,
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+ .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
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+ .lane_data = imx290_1080p_2lane_settings,
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+ .lane_data_size = ARRAY_SIZE(imx290_1080p_2lane_settings),
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.clk_data = {
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[CLK_37_125] = imx290_37_125mhz_clock_1080p,
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[CLK_74_25] = imx290_74_250mhz_clock_1080p,
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@@ -409,7 +471,7 @@ static const struct imx290_mode imx290_m
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{
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.width = 1280,
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.height = 720,
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- .hmax = 0x19c8,
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+ .hmax = 0x0ce4,
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.vmax = 0x02ee,
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.link_freq_index = FREQ_INDEX_720P,
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.crop = {
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@@ -418,8 +480,10 @@ static const struct imx290_mode imx290_m
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.width = 1280,
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.height = 720,
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},
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- .data = imx290_720p_settings,
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- .data_size = ARRAY_SIZE(imx290_720p_settings),
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+ .mode_data = imx290_720p_common_settings,
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+ .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
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+ .lane_data = imx290_720p_2lane_settings,
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+ .lane_data_size = ARRAY_SIZE(imx290_720p_2lane_settings),
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.clk_data = {
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[CLK_37_125] = imx290_37_125mhz_clock_1080p,
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[CLK_74_25] = imx290_74_250mhz_clock_1080p,
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@@ -441,8 +505,10 @@ static const struct imx290_mode imx290_m
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.width = 1920,
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.height = 1080,
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},
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- .data = imx290_1080p_settings,
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- .data_size = ARRAY_SIZE(imx290_1080p_settings),
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+ .mode_data = imx290_1080p_common_settings,
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+ .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
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+ .lane_data = imx290_1080p_4lane_settings,
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+ .lane_data_size = ARRAY_SIZE(imx290_1080p_4lane_settings),
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.clk_data = {
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[CLK_37_125] = imx290_37_125mhz_clock_720p,
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[CLK_74_25] = imx290_74_250mhz_clock_720p,
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@@ -461,8 +527,10 @@ static const struct imx290_mode imx290_m
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.width = 1280,
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.height = 720,
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},
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- .data = imx290_720p_settings,
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- .data_size = ARRAY_SIZE(imx290_720p_settings),
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+ .mode_data = imx290_720p_common_settings,
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+ .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
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+ .lane_data = imx290_720p_4lane_settings,
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+ .lane_data_size = ARRAY_SIZE(imx290_720p_4lane_settings),
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.clk_data = {
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[CLK_37_125] = imx290_37_125mhz_clock_720p,
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[CLK_74_25] = imx290_74_250mhz_clock_720p,
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@@ -1016,8 +1084,18 @@ static int imx290_start_streaming(struct
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}
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/* Apply default values of current mode */
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- ret = imx290_set_register_array(imx290, imx290->current_mode->data,
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- imx290->current_mode->data_size);
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+ ret = imx290_set_register_array(imx290,
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+ imx290->current_mode->mode_data,
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+ imx290->current_mode->mode_data_size);
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+ if (ret < 0) {
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+ dev_err(imx290->dev, "Could not set current mode\n");
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+ return ret;
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+ }
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+
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+ /* Apply lane config registers of current mode */
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+ ret = imx290_set_register_array(imx290,
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+ imx290->current_mode->lane_data,
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+ imx290->current_mode->lane_data_size);
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if (ret < 0) {
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dev_err(imx290->dev, "Could not set current mode\n");
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return ret;
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@@ -1080,49 +1158,6 @@ static int imx290_get_regulators(struct
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imx290->supplies);
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}
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-static int imx290_set_data_lanes(struct imx290 *imx290)
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-{
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- int ret = 0, laneval, frsel;
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-
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- switch (imx290->nlanes) {
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- case 2:
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- laneval = 0x01;
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- frsel = 0x02;
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- break;
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- case 4:
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- laneval = 0x03;
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- frsel = 0x01;
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- break;
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- default:
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- /*
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- * We should never hit this since the data lane count is
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- * validated in probe itself
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- */
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- dev_err(imx290->dev, "Lane configuration not supported\n");
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- ret = -EINVAL;
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- goto exit;
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- }
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-
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- ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval);
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- if (ret) {
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- dev_err(imx290->dev, "Error setting Physical Lane number register\n");
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- goto exit;
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- }
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-
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- ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval);
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- if (ret) {
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- dev_err(imx290->dev, "Error setting CSI Lane mode register\n");
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- goto exit;
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- }
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-
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- ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel);
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- if (ret)
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- dev_err(imx290->dev, "Error setting FR/FDG SEL register\n");
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-
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-exit:
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- return ret;
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-}
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-
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static int imx290_power_on(struct device *dev)
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{
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struct v4l2_subdev *sd = dev_get_drvdata(dev);
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@@ -1146,9 +1181,6 @@ static int imx290_power_on(struct device
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gpiod_set_value_cansleep(imx290->rst_gpio, 0);
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usleep_range(30000, 31000);
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- /* Set data lane count */
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- imx290_set_data_lanes(imx290);
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-
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return 0;
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}
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@@ -1271,8 +1303,7 @@ static int imx290_probe(struct i2c_clien
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ret = -EINVAL;
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goto free_err;
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}
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- imx290->hmax_min = (imx290->nlanes == 2) ? IMX290_HMAX_MIN_2LANE :
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- IMX290_HMAX_MIN_4LANE;
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+ imx290->hmax_min = IMX290_HMAX_MIN;
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dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes);
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