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51 lines
1.8 KiB
Diff
51 lines
1.8 KiB
Diff
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From de14d1d0dc7ecf5c3e7e2a591b4f14e688fa52e6 Mon Sep 17 00:00:00 2001
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From: Chaotian Jing <chaotian.jing@mediatek.com>
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Date: Mon, 16 Oct 2017 09:46:37 +0800
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Subject: [PATCH 158/224] mmc: mediatek: add latch-ck support
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some platform(eg.mt2701) does not support "stop clk fix", in
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this case, need set correct latch-ck to avoid crc error caused
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by stop clock block-internally.
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Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
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Tested-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/mmc/host/mtk-sd.c | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
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index a2f26c9b17b4..d75a93d6803f 100644
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--- a/drivers/mmc/host/mtk-sd.c
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+++ b/drivers/mmc/host/mtk-sd.c
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@@ -378,6 +378,7 @@ struct msdc_host {
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u32 sclk; /* SD/MS bus clock frequency */
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unsigned char timing;
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bool vqmmc_enabled;
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+ u32 latch_ck;
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u32 hs400_ds_delay;
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u32 hs200_cmd_int_delay; /* cmd internal delay for HS200/SDR104 */
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u32 hs400_cmd_int_delay; /* cmd internal delay for HS400 */
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@@ -1661,6 +1662,8 @@ static int msdc_tune_data(struct mmc_host *mmc, u32 opcode)
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u32 tune_reg = host->dev_comp->pad_tune_reg;
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int i, ret;
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+ sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
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+ host->latch_ck);
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sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
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sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
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for (i = 0 ; i < PAD_DELAY_MAX; i++) {
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@@ -1773,6 +1776,9 @@ static const struct mmc_host_ops mt_msdc_ops = {
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static void msdc_of_property_parse(struct platform_device *pdev,
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struct msdc_host *host)
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{
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+ of_property_read_u32(pdev->dev.of_node, "mediatek,latch-ck",
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+ &host->latch_ck);
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+
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of_property_read_u32(pdev->dev.of_node, "hs400-ds-delay",
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&host->hs400_ds_delay);
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--
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2.11.0
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