2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_ARCH_32BIT_OFF_T=y
|
|
|
|
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
|
|
|
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
|
|
CONFIG_BLK_DEV_RAM=y
|
|
|
|
CONFIG_BLK_DEV_RAM_COUNT=16
|
|
|
|
CONFIG_BLK_DEV_RAM_SIZE=4096
|
2022-08-25 06:23:45 +00:00
|
|
|
# CONFIG_BMIPS_CPUFREQ is not set
|
2022-10-03 12:49:35 +00:00
|
|
|
# CONFIG_CEVT_R4K is not set
|
|
|
|
# CONFIG_CEVT_RTL9300 is not set
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CLKDEV_LOOKUP=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_CLKSRC_MMIO=y
|
|
|
|
CONFIG_CLONE_BACKWARDS=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_COMMON_CLK=y
|
2022-12-13 15:35:37 +00:00
|
|
|
# CONFIG_COMMON_CLK_BOSTON is not set
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_COMMON_CLK_REALTEK=y
|
|
|
|
CONFIG_COMMON_CLK_RTL83XX=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_COMPAT_32BIT_TIME=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_CPUFREQ_DT=y
|
|
|
|
CONFIG_CPUFREQ_DT_PLATDEV=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CPU_BIG_ENDIAN=y
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_CPU_FREQ=y
|
|
|
|
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
|
|
|
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_COMMON=y
|
|
|
|
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
|
|
|
|
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
|
|
|
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
|
|
|
CONFIG_CPU_FREQ_STAT=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_CPU_HAS_DIEI=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CPU_HAS_PREFETCH=y
|
|
|
|
CONFIG_CPU_HAS_RIXI=y
|
|
|
|
CONFIG_CPU_HAS_SYNC=y
|
|
|
|
CONFIG_CPU_MIPS32=y
|
|
|
|
# CONFIG_CPU_MIPS32_R1 is not set
|
|
|
|
CONFIG_CPU_MIPS32_R2=y
|
|
|
|
CONFIG_CPU_MIPSR2=y
|
|
|
|
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
|
|
|
|
CONFIG_CPU_R4K_CACHE_TLB=y
|
|
|
|
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_CPU_SUPPORTS_CPUFREQ=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
|
|
|
CONFIG_CPU_SUPPORTS_MSA=y
|
2022-06-20 12:49:45 +00:00
|
|
|
CONFIG_CRYPTO_BLAKE2S=y
|
|
|
|
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_CRYPTO_RNG2=y
|
|
|
|
CONFIG_DEBUG_SECTION_MISMATCH=y
|
|
|
|
CONFIG_DMA_NONCOHERENT=y
|
|
|
|
CONFIG_DTC=y
|
|
|
|
CONFIG_EARLY_PRINTK=y
|
|
|
|
CONFIG_EARLY_PRINTK_8250=y
|
|
|
|
CONFIG_EXTRA_FIRMWARE="rtl838x_phy/rtl838x_8214fc.fw rtl838x_phy/rtl838x_8218b.fw rtl838x_phy/rtl838x_8380.fw"
|
|
|
|
CONFIG_EXTRA_FIRMWARE_DIR="firmware"
|
|
|
|
CONFIG_FIXED_PHY=y
|
2021-12-31 16:53:40 +00:00
|
|
|
CONFIG_FORCE_MAX_ZONEORDER=13
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_FW_LOADER_PAGED_BUF=y
|
|
|
|
CONFIG_GENERIC_ATOMIC64=y
|
|
|
|
CONFIG_GENERIC_CLOCKEVENTS=y
|
|
|
|
CONFIG_GENERIC_CMOS_UPDATE=y
|
|
|
|
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
|
|
|
CONFIG_GENERIC_GETTIMEOFDAY=y
|
|
|
|
CONFIG_GENERIC_IOMAP=y
|
|
|
|
CONFIG_GENERIC_IRQ_CHIP=y
|
|
|
|
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
|
|
|
CONFIG_GENERIC_IRQ_SHOW=y
|
|
|
|
CONFIG_GENERIC_LIB_ASHLDI3=y
|
|
|
|
CONFIG_GENERIC_LIB_ASHRDI3=y
|
|
|
|
CONFIG_GENERIC_LIB_CMPDI2=y
|
|
|
|
CONFIG_GENERIC_LIB_LSHRDI3=y
|
|
|
|
CONFIG_GENERIC_LIB_UCMPDI2=y
|
|
|
|
CONFIG_GENERIC_PCI_IOMAP=y
|
|
|
|
CONFIG_GENERIC_PHY=y
|
|
|
|
CONFIG_GENERIC_PINCONF=y
|
|
|
|
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
|
|
|
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
|
|
|
CONFIG_GENERIC_SCHED_CLOCK=y
|
|
|
|
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
|
|
|
CONFIG_GENERIC_TIME_VSYSCALL=y
|
2021-05-05 13:05:39 +00:00
|
|
|
CONFIG_GPIOLIB_IRQCHIP=y
|
|
|
|
CONFIG_GPIO_GENERIC=y
|
2022-03-09 14:30:59 +00:00
|
|
|
CONFIG_GPIO_PCA953X=y
|
|
|
|
CONFIG_GPIO_PCA953X_IRQ=y
|
2021-05-05 13:05:39 +00:00
|
|
|
CONFIG_GPIO_REALTEK_OTTO=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_GPIO_RTL8231=y
|
2022-07-28 14:45:03 +00:00
|
|
|
CONFIG_GPIO_WATCHDOG=y
|
|
|
|
# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_GRO_CELLS=y
|
|
|
|
CONFIG_HANDLE_DOMAIN_IRQ=y
|
|
|
|
CONFIG_HARDWARE_WATCHPOINTS=y
|
|
|
|
CONFIG_HAS_DMA=y
|
|
|
|
CONFIG_HAS_IOMEM=y
|
|
|
|
CONFIG_HAS_IOPORT_MAP=y
|
2021-12-29 21:00:47 +00:00
|
|
|
CONFIG_HIGH_RES_TIMERS=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_HWMON=y
|
|
|
|
CONFIG_HZ_PERIODIC=y
|
|
|
|
CONFIG_I2C=y
|
|
|
|
CONFIG_I2C_ALGOBIT=y
|
|
|
|
CONFIG_I2C_BOARDINFO=y
|
2021-12-11 19:14:47 +00:00
|
|
|
CONFIG_I2C_CHARDEV=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_I2C_GPIO=y
|
2021-12-11 19:25:37 +00:00
|
|
|
CONFIG_I2C_MUX=y
|
2021-12-29 21:00:47 +00:00
|
|
|
# CONFIG_I2C_RTL9300 is not set
|
|
|
|
# CONFIG_I2C_MUX_RTL9300 is not set
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_INITRAMFS_SOURCE=""
|
|
|
|
CONFIG_IRQCHIP=y
|
|
|
|
CONFIG_IRQ_DOMAIN=y
|
|
|
|
CONFIG_IRQ_FORCED_THREADING=y
|
|
|
|
CONFIG_IRQ_MIPS_CPU=y
|
|
|
|
CONFIG_IRQ_WORK=y
|
|
|
|
CONFIG_JFFS2_ZLIB=y
|
|
|
|
CONFIG_LEDS_GPIO=y
|
|
|
|
CONFIG_LEGACY_PTYS=y
|
|
|
|
CONFIG_LEGACY_PTY_COUNT=256
|
|
|
|
CONFIG_LIBFDT=y
|
|
|
|
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
|
|
|
CONFIG_MARVELL_PHY=y
|
|
|
|
CONFIG_MDIO_BUS=y
|
|
|
|
CONFIG_MDIO_DEVICE=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_MDIO_DEVRES=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_MDIO_I2C=y
|
|
|
|
CONFIG_MEMFD_CREATE=y
|
|
|
|
CONFIG_MFD_SYSCON=y
|
|
|
|
CONFIG_MIGRATION=y
|
|
|
|
CONFIG_MIPS=y
|
|
|
|
CONFIG_MIPS_ASID_BITS=8
|
|
|
|
CONFIG_MIPS_ASID_SHIFT=0
|
|
|
|
CONFIG_MIPS_CBPF_JIT=y
|
|
|
|
CONFIG_MIPS_CLOCK_VSYSCALL=y
|
|
|
|
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
|
|
|
|
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
|
|
|
|
CONFIG_MIPS_CMDLINE_FROM_DTB=y
|
|
|
|
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_MIPS_EXTERNAL_TIMER=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
|
2021-05-05 00:32:27 +00:00
|
|
|
# CONFIG_MIPS_NO_APPENDED_DTB is not set
|
|
|
|
CONFIG_MIPS_RAW_APPENDED_DTB=y
|
|
|
|
CONFIG_MIPS_SPRAM=y
|
|
|
|
CONFIG_MODULES_USE_ELF_REL=y
|
|
|
|
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
|
|
|
CONFIG_MTD_CFI_GEOMETRY=y
|
|
|
|
CONFIG_MTD_CMDLINE_PARTS=y
|
|
|
|
CONFIG_MTD_JEDECPROBE=y
|
|
|
|
CONFIG_MTD_SPI_NOR=y
|
|
|
|
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
|
|
|
|
CONFIG_MTD_SPLIT_EVA_FW=y
|
|
|
|
CONFIG_MTD_SPLIT_FIRMWARE=y
|
2022-07-28 14:45:03 +00:00
|
|
|
CONFIG_MTD_SPLIT_H3C_VFS=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_MTD_SPLIT_TPLINK_FW=y
|
|
|
|
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
realtek: add support for TP-Link SG2008P
Add support for the TP-Link SG2008P switch. This is an RTL8380 based
switch with 802.3af one the first four ports.
Specifications:
---------------
* SoC: Realtek RTL8380M
* Flash: 32 MiB SPI flash (Vendor varies)
* RAM: 256 MiB (Vendor varies)
* Ethernet: 8x 10/100/1000 Mbps with PoE on 4 ports
* Buttons: 1x "Reset" button on front panel
* Power: 53.5V DC barrel jack
* UART: 1x serial header, unpopulated
* PoE: 1x TI TPS23861 I2C PoE controller
Works:
------
- (8) RJ-45 ethernet ports
- Switch functions
- System LED
Not yet enabled:
----------------
- Power-over-Ethernet (driver works, but doesn't enable "auto" mode)
- PoE, Link/Act, PoE max and System LEDs
Install via web interface:
-------------------------
Not supported at this time.
Install via serial console/tftp:
--------------------------------
The footprints R27 (0201) and R28 (0402) are not populated. To enable
serial console, 50 ohm resistors should be soldered -- any value from
0 ohm to 50 ohm will work. R27 can be replaced by a solder bridge.
The u-boot firmware drops to a TP-Link specific "BOOTUTIL" shell at
38400 baud. There is no known way to exit out of this shell, and no
way to do anything useful.
Ideally, one would trick the bootloader into flashing the sysupgrade
image first. However, if the image exceeds 6MiB in size, it will not
work. The sysupgrade image can also be flashed. To install OpenWRT:
Prepare a tftp server with:
1. server address: 192.168.0.146
2. the image as: "uImage.img"
Power on device, and stop boot by pressing any key.
Once the shell is active:
1. Ground out the CLK (pin 16) of the ROM (U7)
2. Select option "3. Start"
3. Bootloader notes that "The kernel has been damaged!"
4. Release CLK as sson as bootloader thinks image is corrupted.
5. Bootloader enters automatic recovery -- details printed on console
6. Watch as the bootloader flashes and boots OpenWRT.
Blind install via tftp:
-----------------------
This method works when it's not feasible to install a serial header.
Prepare a tftp server with:
1. server address: 192.168.0.146
2. the image as: "uImage.img"
3. Watch network traffic (tcpdump or wireshark works)
4. Power on the device.
5. Wait 1-2 seconds then ground out the CLK (pin 16) of the ROM (U7)
6. When 192.168.0.30 makes tftp requests, release pin 16
7. Wait 2-3 minutes for device to auto-flash and boot OpenWRT
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2022-07-19 17:01:11 +00:00
|
|
|
CONFIG_MTD_VIRT_CONCAT=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_NEED_DMA_MAP_STATE=y
|
|
|
|
CONFIG_NEED_PER_CPU_KM=y
|
|
|
|
CONFIG_NET_DEVLINK=y
|
|
|
|
CONFIG_NET_DSA=y
|
|
|
|
CONFIG_NET_DSA_RTL83XX=y
|
|
|
|
CONFIG_NET_DSA_TAG_TRAILER=y
|
|
|
|
CONFIG_NET_RTL838X=y
|
|
|
|
CONFIG_NET_SWITCHDEV=y
|
|
|
|
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
|
|
|
CONFIG_NVMEM=y
|
|
|
|
CONFIG_OF=y
|
|
|
|
CONFIG_OF_ADDRESS=y
|
|
|
|
CONFIG_OF_EARLY_FLATTREE=y
|
|
|
|
CONFIG_OF_FLATTREE=y
|
|
|
|
CONFIG_OF_GPIO=y
|
|
|
|
CONFIG_OF_IRQ=y
|
|
|
|
CONFIG_OF_KOBJ=y
|
|
|
|
CONFIG_OF_MDIO=y
|
|
|
|
CONFIG_OF_NET=y
|
|
|
|
CONFIG_PCI_DRIVERS_LEGACY=y
|
|
|
|
CONFIG_PERF_USE_VMALLOC=y
|
|
|
|
CONFIG_PGTABLE_LEVELS=2
|
|
|
|
CONFIG_PHYLIB=y
|
|
|
|
CONFIG_PHYLINK=y
|
|
|
|
CONFIG_PINCTRL=y
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_PM_OPP=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_POWER_RESET=y
|
2021-11-25 05:41:58 +00:00
|
|
|
CONFIG_POWER_RESET_GPIO_RESTART=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_POWER_RESET_SYSCON=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_RATIONAL=y
|
2022-10-03 12:49:35 +00:00
|
|
|
CONFIG_REALTEK_OTTO_TIMER=y
|
2021-11-14 18:45:33 +00:00
|
|
|
CONFIG_REALTEK_OTTO_WDT=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_REALTEK_PHY=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_REALTEK_SOC_PHY=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_REGMAP=y
|
2022-03-09 14:30:59 +00:00
|
|
|
CONFIG_REGMAP_I2C=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_REGMAP_MMIO=y
|
|
|
|
CONFIG_RESET_CONTROLLER=y
|
2021-12-29 20:54:21 +00:00
|
|
|
CONFIG_RTL83XX=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_RTL838X=y
|
2021-12-29 20:54:21 +00:00
|
|
|
# CONFIG_RTL839X is not set
|
|
|
|
# CONFIG_RTL930X is not set
|
|
|
|
# CONFIG_RTL931X is not set
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_SERIAL_MCTRL_GPIO=y
|
|
|
|
CONFIG_SERIAL_OF_PLATFORM=y
|
|
|
|
CONFIG_SFP=y
|
|
|
|
CONFIG_SPI=y
|
|
|
|
CONFIG_SPI_MASTER=y
|
|
|
|
CONFIG_SPI_MEM=y
|
2022-08-25 06:23:45 +00:00
|
|
|
CONFIG_SRAM=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_SRCU=y
|
|
|
|
CONFIG_SWPHY=y
|
|
|
|
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
|
|
|
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
|
|
|
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
|
|
|
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
|
|
|
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
|
|
|
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
|
|
|
CONFIG_SYS_SUPPORTS_MIPS16=y
|
|
|
|
CONFIG_TARGET_ISA_REV=2
|
|
|
|
CONFIG_TICK_CPU_ACCOUNTING=y
|
2021-05-05 13:47:19 +00:00
|
|
|
CONFIG_TIMER_OF=y
|
|
|
|
CONFIG_TIMER_PROBE=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_TINY_SRCU=y
|
|
|
|
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
|
|
|
|
CONFIG_USE_OF=y
|
2021-11-14 18:45:33 +00:00
|
|
|
CONFIG_WATCHDOG_CORE=y
|
2021-05-05 00:32:27 +00:00
|
|
|
CONFIG_ZLIB_DEFLATE=y
|
|
|
|
CONFIG_ZLIB_INFLATE=y
|