mirror of
https://github.com/openwrt/openwrt.git
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426 lines
7.9 KiB
Diff
426 lines
7.9 KiB
Diff
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From dc1156479b5bf177ecb403e11fe990af5db54394 Mon Sep 17 00:00:00 2001
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From: peterharperuk <77111776+peterharperuk@users.noreply.github.com>
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Date: Mon, 13 Dec 2021 14:00:35 +0000
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Subject: [PATCH] ARM: dts: Create bcm2711-rpi-cm4s.dts (#4761)
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Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
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---
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arch/arm/boot/dts/Makefile | 3 +-
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arch/arm/boot/dts/bcm2711-rpi-cm4s.dts | 398 +++++++++++++++++++++++++
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2 files changed, 400 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -16,7 +16,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2711-rpi-4-b.dtb \
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bcm2711-rpi-400.dtb \
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bcm2710-rpi-cm3.dtb \
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- bcm2711-rpi-cm4.dtb
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+ bcm2711-rpi-cm4.dtb \
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+ bcm2711-rpi-cm4s.dtb
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dtb-$(CONFIG_ARCH_ALPINE) += \
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alpine-db.dtb
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2711-rpi-cm4s.dts
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@@ -0,0 +1,398 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+#include "bcm2711.dtsi"
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+#include "bcm2711-rpi.dtsi"
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+
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+/ {
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+ compatible = "raspberrypi,4-compute-module-s", "brcm,bcm2711";
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+ model = "Raspberry Pi Compute Module 4S";
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+
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+ chosen {
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+ /* 8250 auxiliary UART instead of pl011 */
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+ stdout-path = "serial1:115200n8";
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+ };
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+
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+ leds {
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+ led-act {
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+ gpios = <&virtgpio 0 0>;
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+ };
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+ };
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+};
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+
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+&ddc0 {
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+ status = "okay";
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+};
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+
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+&gpio {
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+ /*
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+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
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+ * the official GPU firmware DT blob.
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+ *
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+ * Legend:
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+ * "FOO" = GPIO line named "FOO" on the schematic
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+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
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+ */
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+ gpio-line-names = "ID_SDA",
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+ "ID_SCL",
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+ "SDA1",
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+ "SCL1",
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+ "GPIO_GCLK",
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+ "GPIO5",
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+ "GPIO6",
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+ "SPI_CE1_N",
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+ "SPI_CE0_N",
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+ "SPI_MISO",
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+ "SPI_MOSI",
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+ "SPI_SCLK",
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+ "GPIO12",
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+ "GPIO13",
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+ /* Serial port */
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+ "TXD1",
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+ "RXD1",
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+ "GPIO16",
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+ "GPIO17",
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+ "GPIO18",
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+ "GPIO19",
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+ "GPIO20",
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+ "GPIO21",
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+ "GPIO22",
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+ "GPIO23",
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+ "GPIO24",
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+ "GPIO25",
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+ "GPIO26",
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+ "GPIO27",
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+ "GPIO28",
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+ "GPIO29",
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+ "GPIO30",
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+ "GPIO31",
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+ "GPIO32",
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+ "GPIO33",
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+ "GPIO34",
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+ "GPIO35",
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+ "GPIO36",
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+ "GPIO37",
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+ "GPIO38",
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+ "GPIO39",
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+ "PWM0_MISO",
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+ "PWM1_MOSI",
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+ "GPIO42",
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+ "GPIO43",
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+ "GPIO44",
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+ "GPIO45";
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+};
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+
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+&hdmi0 {
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+ status = "okay";
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+};
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+
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+&pixelvalve0 {
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+ status = "okay";
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+};
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+
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+&pixelvalve1 {
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+ status = "okay";
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+};
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+
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+&pixelvalve2 {
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+ status = "okay";
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+};
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+
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+&pixelvalve4 {
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+ status = "okay";
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+};
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+
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+&pwm1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
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+ status = "okay";
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+};
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+
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+/* EMMC2 is used to drive the EMMC card */
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+&emmc2 {
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+ bus-width = <8>;
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+ broken-cd;
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+ status = "okay";
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+};
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+
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+&pcie0 {
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+ status = "disabled";
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+};
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+
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+&vchiq {
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+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+};
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+
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+&vc4 {
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+ status = "okay";
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+};
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+
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+&vec {
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+ status = "disabled";
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+};
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+
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+// =============================================
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+// Downstream rpi- changes
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+
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+#define BCM2711
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+
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+#include "bcm270x.dtsi"
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+#include "bcm2711-rpi-ds.dtsi"
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+
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+/ {
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+ soc {
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+ /delete-node/ pixelvalve@7e807000;
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+ /delete-node/ hdmi@7e902000;
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+
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+ virtgpio: virtgpio {
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+ compatible = "brcm,bcm2835-virtgpio";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ firmware = <&firmware>;
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+ status = "okay";
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+ };
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+ };
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+};
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+
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+#include "bcm283x-rpi-csi0-2lane.dtsi"
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+#include "bcm283x-rpi-csi1-4lane.dtsi"
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+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
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+#include "bcm283x-rpi-cam1-regulator.dtsi"
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+
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+/ {
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+ chosen {
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+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
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+ };
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+
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+ aliases {
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+ serial0 = &uart0;
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+ mmc0 = &emmc2;
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+ mmc1 = &mmcnr;
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+ mmc2 = &sdhost;
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+ i2c3 = &i2c3;
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+ i2c4 = &i2c4;
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+ i2c5 = &i2c5;
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+ i2c6 = &i2c6;
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+ spi3 = &spi3;
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+ spi4 = &spi4;
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+ spi5 = &spi5;
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+ spi6 = &spi6;
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+ /delete-property/ intc;
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+ };
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+
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+ /delete-node/ wifi-pwrseq;
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins>;
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+ status = "okay";
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+};
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+
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+&spi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
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+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
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+
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+ spidev0: spidev@0{
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+ compatible = "spidev";
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+ reg = <0>; /* CE0 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ };
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+
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+ spidev1: spidev@1{
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+ compatible = "spidev";
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+ reg = <1>; /* CE1 */
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ };
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+};
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+
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+&gpio {
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+ spi0_pins: spi0_pins {
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+ brcm,pins = <9 10 11>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ };
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+
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+ spi0_cs_pins: spi0_cs_pins {
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+ brcm,pins = <8 7>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi3_pins: spi3_pins {
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+ brcm,pins = <1 2 3>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi3_cs_pins: spi3_cs_pins {
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+ brcm,pins = <0 24>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi4_pins: spi4_pins {
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+ brcm,pins = <5 6 7>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi4_cs_pins: spi4_cs_pins {
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+ brcm,pins = <4 25>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi5_pins: spi5_pins {
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+ brcm,pins = <13 14 15>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi5_cs_pins: spi5_cs_pins {
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+ brcm,pins = <12 26>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ spi6_pins: spi6_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <BCM2835_FSEL_ALT3>;
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+ };
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+
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+ spi6_cs_pins: spi6_cs_pins {
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+ brcm,pins = <18 27>;
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+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
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+ };
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+
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+ i2c0_pins: i2c0 {
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+ brcm,pins = <0 1>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c1_pins: i2c1 {
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+ brcm,pins = <2 3>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c3_pins: i2c3 {
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+ brcm,pins = <4 5>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c4_pins: i2c4 {
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+ brcm,pins = <8 9>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c5_pins: i2c5 {
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+ brcm,pins = <12 13>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2c6_pins: i2c6 {
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+ brcm,pins = <22 23>;
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+ brcm,function = <BCM2835_FSEL_ALT5>;
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+ brcm,pull = <BCM2835_PUD_UP>;
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+ };
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+
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+ i2s_pins: i2s {
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+ brcm,pins = <18 19 20 21>;
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+ brcm,function = <BCM2835_FSEL_ALT0>;
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+ };
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+
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+ sdio_pins: sdio_pins {
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+ brcm,pins = <34 35 36 37 38 39>;
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+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
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+ brcm,pull = <0 2 2 2 2 2>;
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+ };
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+
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+ uart0_pins: uart0_pins {
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+ brcm,pins;
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+ brcm,function;
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+ brcm,pull;
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+ };
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+
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+ uart2_pins: uart2_pins {
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+ brcm,pins = <0 1>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart3_pins: uart3_pins {
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+ brcm,pins = <4 5>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart4_pins: uart4_pins {
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+ brcm,pins = <8 9>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+
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+ uart5_pins: uart5_pins {
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+ brcm,pins = <12 13>;
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+ brcm,function = <BCM2835_FSEL_ALT4>;
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+ brcm,pull = <0 2>;
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+ };
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+};
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+
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+&i2c0if {
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+ clock-frequency = <100000>;
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+};
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+
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+&i2c1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c1_pins>;
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+ clock-frequency = <100000>;
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+};
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+
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+&i2s {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2s_pins>;
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+};
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+
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+// =============================================
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+// Board specific stuff here
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+
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+&sdhost {
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+ status = "disabled";
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+};
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+
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+&gpio {
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+ audio_pins: audio_pins {
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+ brcm,pins = <>;
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+ brcm,function = <>;
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+ };
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+};
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+
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+&leds {
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+ act_led: led-act {
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+ label = "led0";
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+ linux,default-trigger = "mmc0";
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|
+ };
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+};
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+
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+&pwm1 {
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+ status = "disabled";
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+};
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+
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+&audio {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&audio_pins>;
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||
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+ brcm,disable-headphones = <1>;
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||
|
+};
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+
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+/ {
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+ __overrides__ {
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+ act_led_gpio = <&act_led>,"gpios:4";
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||
|
+ act_led_activelow = <&act_led>,"gpios:8";
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||
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
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||
|
+
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||
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+ sd_poll_once = <&emmc2>, "non-removable?";
|
||
|
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
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||
|
+ <&spi0>, "dmas:8=", <&dma40>;
|
||
|
+ };
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||
|
+};
|