2019-09-19 14:43:19 +00:00
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From 4a6410a53059d6505680b70fc438b7cfbf8939ca Mon Sep 17 00:00:00 2001
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2019-07-09 18:32:28 +00:00
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From: Eric Anholt <eric@anholt.net>
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Date: Mon, 3 Dec 2018 14:24:35 -0800
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2019-12-23 12:42:55 +00:00
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Subject: [PATCH] drm/v3d: Don't bother flushing L1TD at job start.
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2019-07-09 18:32:28 +00:00
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This is the write combiner for TMU writes. You're supposed to flush
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that at job end if you had dirtied any cachelines. Flushing it at job
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start then doesn't make any sense.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+")
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Reviewed-by: Dave Emett <david.emett@broadcom.com>
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Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-3-eric@anholt.net
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(cherry picked from commit 2e6dc3bd80478212e84addf1cafd6ec60674b884)
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---
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drivers/gpu/drm/v3d/v3d_gem.c | 12 ------------
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1 file changed, 12 deletions(-)
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--- a/drivers/gpu/drm/v3d/v3d_gem.c
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+++ b/drivers/gpu/drm/v3d/v3d_gem.c
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@@ -139,22 +139,10 @@ v3d_invalidate_l2(struct v3d_dev *v3d, i
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V3D_L2CACTL_L2CENA);
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}
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-static void
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-v3d_invalidate_l1td(struct v3d_dev *v3d, int core)
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-{
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- V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
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- if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
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- V3D_L2TCACTL_L2TFLS), 100)) {
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- DRM_ERROR("Timeout waiting for L1T write combiner flush\n");
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- }
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-}
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-
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/* Invalidates texture L2 cachelines */
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static void
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v3d_flush_l2t(struct v3d_dev *v3d, int core)
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{
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- v3d_invalidate_l1td(v3d, core);
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-
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V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
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V3D_L2TCACTL_L2TFLS |
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V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
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