mirror of
https://github.com/openwrt/openwrt.git
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65 lines
2.2 KiB
Diff
65 lines
2.2 KiB
Diff
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From 933f8c33d466de20e9894ef8de5b6afe478a420d Mon Sep 17 00:00:00 2001
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From: Samin Guo <samin.guo@starfivetech.com>
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Date: Wed, 17 Nov 2021 14:50:45 +0800
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Subject: [PATCH 1004/1024] dmaengine: dw-axi-dmac: Add StarFive JH7100 support
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Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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---
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drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 12 ++++++++++++
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drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 4 ++++
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2 files changed, 16 insertions(+)
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--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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@@ -677,8 +677,13 @@ static int dw_axi_dma_set_hw_desc(struct
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hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
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+#ifdef CONFIG_SOC_STARFIVE
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+ ctllo |= DWAXIDMAC_BURST_TRANS_LEN_16 << CH_CTL_L_DST_MSIZE_POS |
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+ DWAXIDMAC_BURST_TRANS_LEN_16 << CH_CTL_L_SRC_MSIZE_POS;
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+#else
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ctllo |= DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_DST_MSIZE_POS |
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DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_SRC_MSIZE_POS;
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+#endif
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hw_desc->lli->ctl_lo = cpu_to_le32(ctllo);
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set_desc_src_master(hw_desc);
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@@ -1502,7 +1507,11 @@ static int dw_probe(struct platform_devi
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* Therefore, set constraint to 1024 * 4.
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*/
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dw->dma.dev->dma_parms = &dw->dma_parms;
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+#ifdef CONFIG_SOC_STARFIVE
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+ dma_set_max_seg_size(&pdev->dev, DMAC_MAX_BLK_SIZE);
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+#else
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dma_set_max_seg_size(&pdev->dev, MAX_BLOCK_SIZE);
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+#endif
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platform_set_drvdata(pdev, chip);
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pm_runtime_enable(chip->dev);
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@@ -1587,6 +1596,9 @@ static const struct of_device_id dw_dma_
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.compatible = "intel,kmb-axi-dma",
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.data = (void *)AXI_DMA_FLAG_HAS_APB_REGS,
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}, {
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+ .compatible = "starfive,jh7100-axi-dma",
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+ .data = (void *)(AXI_DMA_FLAG_HAS_RESETS | AXI_DMA_FLAG_USE_CFG2),
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+ }, {
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.compatible = "starfive,jh7110-axi-dma",
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.data = (void *)(AXI_DMA_FLAG_HAS_RESETS | AXI_DMA_FLAG_USE_CFG2),
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},
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--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
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+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
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@@ -284,7 +284,11 @@ enum {
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#define CH_CTL_L_SRC_MAST BIT(0)
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/* CH_CFG_H */
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+#ifdef CONFIG_SOC_STARFIVE
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+#define CH_CFG_H_PRIORITY_POS 15
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+#else
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#define CH_CFG_H_PRIORITY_POS 17
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+#endif
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#define CH_CFG_H_DST_PER_POS 12
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#define CH_CFG_H_SRC_PER_POS 7
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#define CH_CFG_H_HS_SEL_DST_POS 4
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