2022-02-02 21:32:57 +00:00
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From 4264350acb75430d5021a1d7de56a33faf69a097 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Wed, 2 Feb 2022 01:03:32 +0100
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Subject: [PATCH 13/16] net: dsa: qca8k: move page cache to driver priv
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There can be multiple qca8k switch on the same system. Move the static
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qca8k_current_page to qca8k_priv and make it specific for each switch.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/qca8k.c | 42 ++++++++++++++++++++---------------------
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drivers/net/dsa/qca8k.h | 9 +++++++++
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2 files changed, 29 insertions(+), 22 deletions(-)
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--- a/drivers/net/dsa/qca8k.c
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+++ b/drivers/net/dsa/qca8k.c
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2022-03-21 14:21:24 +00:00
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@@ -75,12 +75,6 @@ static const struct qca8k_mib_desc ar832
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2022-02-02 21:32:57 +00:00
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MIB_DESC(1, 0xac, "TXUnicast"),
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};
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-/* The 32bit switch registers are accessed indirectly. To achieve this we need
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- * to set the page of the register. Track the last page that was set to reduce
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- * mdio writes
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- */
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-static u16 qca8k_current_page = 0xffff;
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-
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static void
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qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
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{
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2022-03-21 14:21:24 +00:00
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@@ -134,11 +128,13 @@ qca8k_mii_write32(struct mii_bus *bus, i
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2022-02-02 21:32:57 +00:00
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}
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static int
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-qca8k_set_page(struct mii_bus *bus, u16 page)
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+qca8k_set_page(struct qca8k_priv *priv, u16 page)
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{
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+ u16 *cached_page = &priv->mdio_cache.page;
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+ struct mii_bus *bus = priv->bus;
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int ret;
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- if (page == qca8k_current_page)
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+ if (page == *cached_page)
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return 0;
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ret = bus->write(bus, 0x18, 0, page);
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2022-03-21 14:21:24 +00:00
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@@ -148,7 +144,7 @@ qca8k_set_page(struct mii_bus *bus, u16
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2022-02-02 21:32:57 +00:00
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return ret;
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}
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- qca8k_current_page = page;
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+ *cached_page = page;
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usleep_range(1000, 2000);
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return 0;
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}
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2022-03-21 14:21:24 +00:00
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@@ -374,7 +370,7 @@ qca8k_regmap_read(void *ctx, uint32_t re
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2022-02-02 21:32:57 +00:00
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mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_set_page(bus, page);
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+ ret = qca8k_set_page(priv, page);
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if (ret < 0)
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goto exit;
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2022-03-21 14:21:24 +00:00
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@@ -400,7 +396,7 @@ qca8k_regmap_write(void *ctx, uint32_t r
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2022-02-02 21:32:57 +00:00
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mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_set_page(bus, page);
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+ ret = qca8k_set_page(priv, page);
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if (ret < 0)
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goto exit;
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2022-03-21 14:21:24 +00:00
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@@ -427,7 +423,7 @@ qca8k_regmap_update_bits(void *ctx, uint
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2022-02-02 21:32:57 +00:00
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mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_set_page(bus, page);
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+ ret = qca8k_set_page(priv, page);
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if (ret < 0)
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goto exit;
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2022-03-21 14:21:24 +00:00
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@@ -1098,8 +1094,9 @@ qca8k_mdio_busy_wait(struct mii_bus *bus
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2022-02-02 21:32:57 +00:00
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}
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static int
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-qca8k_mdio_write(struct mii_bus *bus, int phy, int regnum, u16 data)
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+qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data)
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{
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+ struct mii_bus *bus = priv->bus;
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u16 r1, r2, page;
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u32 val;
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int ret;
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2022-03-21 14:21:24 +00:00
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@@ -1116,7 +1113,7 @@ qca8k_mdio_write(struct mii_bus *bus, in
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2022-02-02 21:32:57 +00:00
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mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_set_page(bus, page);
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+ ret = qca8k_set_page(priv, page);
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if (ret)
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goto exit;
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2022-03-21 14:21:24 +00:00
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@@ -1135,8 +1132,9 @@ exit:
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2022-02-02 21:32:57 +00:00
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}
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static int
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-qca8k_mdio_read(struct mii_bus *bus, int phy, int regnum)
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+qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum)
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{
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+ struct mii_bus *bus = priv->bus;
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u16 r1, r2, page;
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u32 val;
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int ret;
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2022-03-21 14:21:24 +00:00
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@@ -1152,7 +1150,7 @@ qca8k_mdio_read(struct mii_bus *bus, int
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2022-02-02 21:32:57 +00:00
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mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_set_page(bus, page);
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+ ret = qca8k_set_page(priv, page);
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if (ret)
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goto exit;
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@@ -1181,7 +1179,6 @@ static int
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qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data)
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{
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struct qca8k_priv *priv = slave_bus->priv;
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- struct mii_bus *bus = priv->bus;
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int ret;
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/* Use mdio Ethernet when available, fallback to legacy one on error */
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2022-03-21 14:21:24 +00:00
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@@ -1189,14 +1186,13 @@ qca8k_internal_mdio_write(struct mii_bus
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2022-02-02 21:32:57 +00:00
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if (!ret)
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return 0;
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- return qca8k_mdio_write(bus, phy, regnum, data);
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+ return qca8k_mdio_write(priv, phy, regnum, data);
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}
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static int
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qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum)
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{
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struct qca8k_priv *priv = slave_bus->priv;
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- struct mii_bus *bus = priv->bus;
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int ret;
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/* Use mdio Ethernet when available, fallback to legacy one on error */
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2022-03-21 14:21:24 +00:00
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@@ -1204,7 +1200,7 @@ qca8k_internal_mdio_read(struct mii_bus
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2022-02-02 21:32:57 +00:00
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if (ret >= 0)
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return ret;
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- return qca8k_mdio_read(bus, phy, regnum);
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+ return qca8k_mdio_read(priv, phy, regnum);
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}
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static int
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2022-03-21 14:21:24 +00:00
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@@ -1225,7 +1221,7 @@ qca8k_phy_write(struct dsa_switch *ds, i
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2022-02-02 21:32:57 +00:00
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if (!ret)
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return ret;
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- return qca8k_mdio_write(priv->bus, port, regnum, data);
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+ return qca8k_mdio_write(priv, port, regnum, data);
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}
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static int
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2022-03-21 14:21:24 +00:00
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@@ -1246,7 +1242,7 @@ qca8k_phy_read(struct dsa_switch *ds, in
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2022-02-02 21:32:57 +00:00
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if (ret >= 0)
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return ret;
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- ret = qca8k_mdio_read(priv->bus, port, regnum);
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+ ret = qca8k_mdio_read(priv, port, regnum);
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if (ret < 0)
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return 0xffff;
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2022-07-12 15:52:59 +00:00
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@@ -3060,6 +3056,8 @@ qca8k_sw_probe(struct mdio_device *mdiod
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2022-02-02 21:32:57 +00:00
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return PTR_ERR(priv->regmap);
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}
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+ priv->mdio_cache.page = 0xffff;
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+
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/* Check the detected switch id */
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ret = qca8k_read_switch_id(priv);
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if (ret)
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--- a/drivers/net/dsa/qca8k.h
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+++ b/drivers/net/dsa/qca8k.h
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@@ -363,6 +363,14 @@ struct qca8k_ports_config {
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u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
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};
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+struct qca8k_mdio_cache {
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+/* The 32bit switch registers are accessed indirectly. To achieve this we need
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+ * to set the page of the register. Track the last page that was set to reduce
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+ * mdio writes
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+ */
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+ u16 page;
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+};
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+
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struct qca8k_priv {
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u8 switch_id;
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u8 switch_revision;
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@@ -383,6 +391,7 @@ struct qca8k_priv {
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struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */
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struct qca8k_mgmt_eth_data mgmt_eth_data;
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struct qca8k_mib_eth_data mib_eth_data;
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+ struct qca8k_mdio_cache mdio_cache;
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};
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struct qca8k_mib_desc {
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