mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
59 lines
2.2 KiB
Diff
59 lines
2.2 KiB
Diff
|
From ff5fadaff39180dc0b652753b5614a564711be29 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Florian Fainelli <florian@openwrt.org>
|
||
|
|
Date: Wed, 24 Jul 2013 17:12:11 +0100
|
||
|
|
Subject: [PATCH] MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
|
||
|
|
|
||
|
|
The current BMIPS SMP code assumes that the slave CPU is physical and
|
||
|
|
logical CPU 1, but on some systems such as BCM3368, the slave CPU is
|
||
|
|
physical CPU0. Fix the code to read the physical CPU (thread ID) we are
|
||
|
|
running this code on, and adjust the relocation vector address based on
|
||
|
|
it. This allows bringing up the second CPU on BCM3368 for instance.
|
||
|
|
|
||
|
|
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||
|
|
Cc: linux-mips@linux-mips.org
|
||
|
|
Cc: cernekee@gmail.com
|
||
|
|
Cc: jogo@openwrt.org
|
||
|
|
Cc: blogic@openwrt.org
|
||
|
|
Patchwork: https://patchwork.linux-mips.org/patch/5621/
|
||
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||
|
|
---
|
||
|
|
arch/mips/kernel/bmips_vec.S | 6 +++++-
|
||
|
|
arch/mips/kernel/smp-bmips.c | 10 ++++++++--
|
||
|
|
2 files changed, 13 insertions(+), 3 deletions(-)
|
||
|
|
|
||
|
|
--- a/arch/mips/kernel/bmips_vec.S
|
||
|
|
+++ b/arch/mips/kernel/bmips_vec.S
|
||
|
|
@@ -56,7 +56,11 @@ LEAF(bmips_smp_movevec)
|
||
|
|
/* set up CPU1 CBR; move BASE to 0xa000_0000 */
|
||
|
|
li k0, 0xff400000
|
||
|
|
mtc0 k0, $22, 6
|
||
|
|
- li k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1
|
||
|
|
+ /* set up relocation vector address based on thread ID */
|
||
|
|
+ mfc0 k1, $22, 3
|
||
|
|
+ srl k1, 16
|
||
|
|
+ andi k1, 0x8000
|
||
|
|
+ or k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
|
||
|
|
or k0, k1
|
||
|
|
li k1, 0xa0080000
|
||
|
|
sw k1, 0(k0)
|
||
|
|
--- a/arch/mips/kernel/smp-bmips.c
|
||
|
|
+++ b/arch/mips/kernel/smp-bmips.c
|
||
|
|
@@ -196,9 +196,15 @@ static void bmips_init_secondary(void)
|
||
|
|
#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
|
||
|
|
void __iomem *cbr = BMIPS_GET_CBR();
|
||
|
|
unsigned long old_vec;
|
||
|
|
+ unsigned long relo_vector;
|
||
|
|
+ int boot_cpu;
|
||
|
|
|
||
|
|
- old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1);
|
||
|
|
- __raw_writel(old_vec & ~0x20000000, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
|
||
|
|
+ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
|
||
|
|
+ relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
|
||
|
|
+ BMIPS_RELO_VECTOR_CONTROL_1;
|
||
|
|
+
|
||
|
|
+ old_vec = __raw_readl(cbr + relo_vector);
|
||
|
|
+ __raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
|
||
|
|
|
||
|
|
clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
|
||
|
|
#elif defined(CONFIG_CPU_BMIPS5000)
|