openwrt/target/linux/rockchip/patches-6.6/040-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch

From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001
From: Trevor Woerner <twoerner@gmail.com>
Date: Mon, 20 Nov 2023 11:22:32 -0500
Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s

Add names to the pins of the general-purpose expansion header as given in the
Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
make it easier for users to correlate the pins with functions when using
utilities such as gpioinfo.

[1] https://wiki.radxa.com/RockpiS/hardware/gpio
[2] Documentation/devicetree/bindings/gpio/gpio.txt

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)

--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -258,3 +258,61 @@
 &wdt {
 	status = "okay";
 };
+
+&gpio0 {
+	gpio-line-names =
+	/* GPIO0_A0 - A7 */
+	"", "", "", "", "", "", "", "",
+	/* GPIO0_B0 - B7 */
+	"", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
+	"", "", "header1-pin11 [GPIO0_B7]",
+	/* GPIO0_C0 - C7 */
+	"header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
+	"", "", "",
+	/* GPIO0_D0 - D8 */
+	"", "", "", "", "", "", "", "";
+};
+
+&gpio1 {
+	gpio-line-names =
+	/* GPIO1_A0 - A7 */
+	"", "", "", "", "", "", "", "",
+	/* GPIO1_B0 - B7 */
+	"", "", "", "", "", "", "", "",
+	/* GPIO1_C0 - C7 */
+	"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+	"header1-pin19 [GPIO1_C7]",
+	/* GPIO1_D0 - D8 */
+	"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
+	"", "", "";
+};
+
+&gpio2 {
+	gpio-line-names =
+	/* GPIO2_A0 - A7 */
+	"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
+	"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+	"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+	/* GPIO2_B0 - B7 */
+	"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+	"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+	"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+	"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+	/* GPIO2_C0 - C7 */
+	"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+	/* GPIO2_D0 - D8 */
+	"", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+	gpio-line-names =
+	/* GPIO3_A0 - A7 */
+	"", "", "", "", "", "", "", "",
+	/* GPIO3_B0 - B7 */
+	"", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
+	"header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
+	/* GPIO3_C0 - C7 */
+	"", "", "", "", "", "", "", "",
+	/* GPIO3_D0 - D8 */
+	"", "", "", "", "", "", "", "";
+};