mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
96 lines
2.9 KiB
Diff
96 lines
2.9 KiB
Diff
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--- a/arch/arm/mach-cns3xxx/pcie.c
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+++ b/arch/arm/mach-cns3xxx/pcie.c
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@@ -18,6 +18,7 @@
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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+#include <linux/irq.h>
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#include <linux/ptrace.h>
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#include <asm/mach/map.h>
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#include "cns3xxx.h"
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@@ -27,7 +28,7 @@ struct cns3xxx_pcie {
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void __iomem *host_regs; /* PCI config registers for host bridge */
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void __iomem *cfg0_regs; /* PCI Type 0 config registers */
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void __iomem *cfg1_regs; /* PCI Type 1 config registers */
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- unsigned int irqs[2];
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+ unsigned int irqs[5];
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struct resource res_io;
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struct resource res_mem;
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int port;
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@@ -95,7 +96,7 @@ static inline int check_master_abort(str
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void __iomem *host_base;
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u32 sreg, ereg;
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- host_base = (void __iomem *) cnspci->cfg_bases[CNS3XXX_HOST_TYPE].virtual;
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+ host_base = (void __iomem *) cnspci->host_regs;
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sreg = __raw_readw(host_base + 0x6) & 0xF900;
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ereg = __raw_readl(host_base + 0x104); // Uncorrectable Error Status Reg
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@@ -209,7 +210,7 @@ static struct pci_ops cns3xxx_pcie_ops =
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static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
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- int irq = cnspci->irqs[!!dev->bus->number];
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+ int irq = cnspci->irqs[!!dev->bus->number + pin - 1];
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pr_info("PCIe map irq: %04d:%02x:%02x.%02x slot %d, pin %d, irq: %d\n",
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pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn),
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@@ -235,7 +236,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[
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.end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */
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.flags = IORESOURCE_MEM,
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},
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- .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },
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+ .irqs = {
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+ IRQ_CNS3XXX_PCIE0_RC,
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+ IRQ_CNS3XXX_PCIE0_DEVICE,
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+ IRQ_CNS3XXX_PCIE0_DEVICE,
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+ IRQ_CNS3XXX_PCIE0_DEVICE,
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+ IRQ_CNS3XXX_PCIE0_DEVICE,
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+ },
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.port = 0,
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},
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[1] = {
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@@ -254,7 +261,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[
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.end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */
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.flags = IORESOURCE_MEM,
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},
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- .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },
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+ .irqs = {
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+ IRQ_CNS3XXX_PCIE1_RC,
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+ IRQ_CNS3XXX_PCIE1_DEVICE,
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+ IRQ_CNS3XXX_PCIE1_DEVICE,
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+ IRQ_CNS3XXX_PCIE1_DEVICE,
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+ IRQ_CNS3XXX_PCIE1_DEVICE,
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+ },
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.port = 1,
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},
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};
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@@ -346,6 +359,14 @@ static int cns3xxx_pcie_abort_handler(un
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return 0;
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}
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+void __init cns3xxx_pcie_set_irqs(int bus, int *irqs)
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+{
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+ int i;
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+
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+ for (i = 0; i < 4; i++)
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+ cns3xxx_pcie[bus].irqs[i + 1] = irqs[i];
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+}
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+
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void __init cns3xxx_pcie_init_late(void)
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{
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int i;
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--- a/arch/arm/mach-cns3xxx/core.h
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+++ b/arch/arm/mach-cns3xxx/core.h
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@@ -18,8 +18,10 @@ extern void cns3xxx_timer_init(void);
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#ifdef CONFIG_PCI
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extern void __init cns3xxx_pcie_init_late(void);
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+extern void __init cns3xxx_pcie_set_irqs(int bus, int *irqs);
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#else
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static inline void __init cns3xxx_pcie_init_late(void) {}
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+static inline void cns3xxx_pcie_set_irqs(int bus, int *irqs) {}
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#endif
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void __init cns3xxx_map_io(void);
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