2024-04-26 14:34:31 +00:00
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From 80a7688c478a6a372083c29ff0b1826db4dae5b2 Mon Sep 17 00:00:00 2001
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From: INAGAKI Hiroshi <musashino.open@gmail.com>
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Date: Wed, 24 Apr 2024 23:54:46 +0900
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Subject: [PATCH] ath79: add support for NEC AR9344 Aterm series
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---
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arch/mips/dts/Makefile | 1 +
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arch/mips/dts/nec,ar9344-aterm.dts | 35 +++++++++++++++
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arch/mips/mach-ath79/Kconfig | 5 +++
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board/nec/ar9344_aterm/Kconfig | 30 +++++++++++++
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board/nec/ar9344_aterm/Makefile | 3 ++
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board/nec/ar9344_aterm/ar9344_aterm.c | 59 ++++++++++++++++++++++++++
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configs/nec_ar9344_aterm_defconfig | 61 +++++++++++++++++++++++++++
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include/configs/nec_ar9344_aterm.h | 28 ++++++++++++
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8 files changed, 222 insertions(+)
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create mode 100644 arch/mips/dts/nec,ar9344-aterm.dts
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create mode 100644 board/nec/ar9344_aterm/Kconfig
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create mode 100644 board/nec/ar9344_aterm/Makefile
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create mode 100644 board/nec/ar9344_aterm/ar9344_aterm.c
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create mode 100644 configs/nec_ar9344_aterm_defconfig
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create mode 100644 include/configs/nec_ar9344_aterm.h
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--- a/arch/mips/dts/Makefile
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+++ b/arch/mips/dts/Makefile
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@@ -24,6 +24,7 @@ dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY
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dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb
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dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += mrvl,octeon-ebb7304.dtb
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dtb-$(CONFIG_TARGET_OCTEON_NIC23) += mrvl,octeon-nic23.dtb
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+dtb-$(CONFIG_BOARD_NEC_AR9344_ATERM) += nec,ar9344-aterm.dtb
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dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
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dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
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dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
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--- /dev/null
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+++ b/arch/mips/dts/nec,ar9344-aterm.dts
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@@ -0,0 +1,35 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include "ar934x.dtsi"
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+
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+/ {
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+ model = "NEC Aterm series (AR9344)";
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+ compatible = "nec,ar9344-aterm", "qca,ar934x";
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+
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+ aliases {
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:9600n8";
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+ };
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+};
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+
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+&uart0 {
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+ clock-frequency = <40000000>;
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+ status = "okay";
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+};
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+
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+&xtal {
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+ clock-frequency = <40000000>;
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+};
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+
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+/* delete unused nodes to reduce dtb size */
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+/delete-node/ &ehci0;
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+/delete-node/ &gmac0;
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+/delete-node/ &gmac1;
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+/delete-node/ &spi0;
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--- a/arch/mips/mach-ath79/Kconfig
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+++ b/arch/mips/mach-ath79/Kconfig
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2024-08-31 08:59:41 +00:00
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@@ -67,6 +67,10 @@ config TARGET_AP152
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2024-04-26 14:34:31 +00:00
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bool "AP152 Reference Board"
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select SOC_QCA956X
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+config BOARD_NEC_AR9344_ATERM
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+ bool "NEC Aterm series Boards (AR9344)"
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+ select SOC_AR934X
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+
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config BOARD_TPLINK_WDR4300
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bool "TP-Link WDR4300 Board"
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select SOC_AR934X
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2024-08-31 08:59:41 +00:00
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@@ -76,6 +80,7 @@ endchoice
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2024-04-26 14:34:31 +00:00
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source "board/qca/ap121/Kconfig"
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source "board/qca/ap143/Kconfig"
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source "board/qca/ap152/Kconfig"
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+source "board/nec/ar9344_aterm/Kconfig"
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source "board/tplink/wdr4300/Kconfig"
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endmenu
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--- /dev/null
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+++ b/board/nec/ar9344_aterm/Kconfig
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@@ -0,0 +1,30 @@
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+if BOARD_NEC_AR9344_ATERM
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+
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+config SYS_VENDOR
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+ default "nec"
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+
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+config SYS_SOC
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+ default "ath79"
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+
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+config SYS_BOARD
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+ default "ar9344_aterm"
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+
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+config SYS_CONFIG_NAME
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+ default "nec_ar9344_aterm"
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+
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+config TEXT_BASE
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+ default 0x9f000000
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+
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+config SYS_DCACHE_SIZE
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+ default 32768
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+
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+config SYS_DCACHE_LINE_SIZE
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+ default 32
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+
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+config SYS_ICACHE_SIZE
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+ default 65536
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+
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+config SYS_ICACHE_LINE_SIZE
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+ default 32
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+
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+endif
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--- /dev/null
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+++ b/board/nec/ar9344_aterm/Makefile
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@@ -0,0 +1,3 @@
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+# SPDX-License-Identifier: GPL-2.0+
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+
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+obj-y = ar9344_aterm.o
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--- /dev/null
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+++ b/board/nec/ar9344_aterm/ar9344_aterm.c
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@@ -0,0 +1,59 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
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+ */
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+
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+#include <init.h>
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+#include <asm/io.h>
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+#include <asm/addrspace.h>
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+#include <asm/types.h>
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+#include <mach/ath79.h>
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+#include <mach/ar71xx_regs.h>
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+#include <mach/ddr.h>
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+#include <debug_uart.h>
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+
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+static void aterm_pinmux_config(void)
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+{
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+ void __iomem *regs;
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+
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+ regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
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+ MAP_NOCACHE);
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+
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+ /* Disable JTAG */
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+ writel(0x2, regs + AR934X_GPIO_REG_FUNC);
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+
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+ /* Configure default GPIO OE/SET regs */
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+ writel(0x3db1f, regs + AR71XX_GPIO_REG_OE);
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+ writel(0x142000, regs + AR71XX_GPIO_REG_SET);
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+
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+ /* Configure pin multiplexing */
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+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
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+ writel(0x0b0a0900, regs + AR934X_GPIO_REG_OUT_FUNC1);
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+ writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
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+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
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+ writel(0x2f2e0000, regs + AR934X_GPIO_REG_OUT_FUNC4);
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+ writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
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+}
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+
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+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
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+void board_debug_uart_init(void)
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+{
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+ aterm_pinmux_config();
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+}
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+#endif
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+
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+#ifdef CONFIG_BOARD_EARLY_INIT_F
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+int board_early_init_f(void)
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+{
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+#ifndef CONFIG_DEBUG_UART_BOARD_INIT
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+ aterm_pinmux_config();
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+#endif
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+
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+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
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+ ar934x_pll_init(560, 480, 240);
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+ ar934x_ddr_init(560, 480, 240);
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+#endif
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+
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+ return 0;
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+}
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+#endif
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--- /dev/null
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+++ b/configs/nec_ar9344_aterm_defconfig
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@@ -0,0 +1,61 @@
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+CONFIG_MIPS=y
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+CONFIG_SYS_MALLOC_LEN=0x40000
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+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff
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+CONFIG_ENV_SIZE=0x1000
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+CONFIG_DEFAULT_DEVICE_TREE="nec,ar9344-aterm"
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+CONFIG_SYS_LOAD_ADDR=0x83000000
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+CONFIG_ARCH_ATH79=y
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+CONFIG_BOARD_NEC_AR9344_ATERM=y
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+CONFIG_SYS_MIPS_TIMER_FREQ=280000000
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+CONFIG_MIPS_RELOCATION_TABLE_SIZE=0x4000
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+# CONFIG_LOCALVERSION_AUTO is not set
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+CONFIG_TIMESTAMP=y
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+CONFIG_BOOTDELAY=3
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+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
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+CONFIG_USE_BOOTARGS=y
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+CONFIG_BOOTARGS="console=ttyS0,115200"
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+CONFIG_USE_BOOTCOMMAND=y
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+CONFIG_BOOTCOMMAND="bootm 0x9f040000"
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+# CONFIG_DISPLAY_BOARDINFO is not set
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+CONFIG_BOARD_EARLY_INIT_F=y
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+CONFIG_SYS_MALLOC_BOOTPARAMS=y
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+# CONFIG_CMDLINE_EDITING is not set
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+# CONFIG_AUTO_COMPLETE is not set
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+# CONFIG_SYS_LONGHELP is not set
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+CONFIG_SYS_MAXARGS=32
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+# CONFIG_SYS_XTRACE is not set
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+# CONFIG_CMD_BDI is not set
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+# CONFIG_CMD_CONSOLE is not set
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+# CONFIG_BOOTM_PLAN9 is not set
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+# CONFIG_BOOTM_RTEMS is not set
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+# CONFIG_BOOTM_VXWORKS is not set
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+# CONFIG_CMD_ELF is not set
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+# CONFIG_CMD_FDT is not set
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+# CONFIG_CMD_RUN is not set
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+# CONFIG_CMD_XIMG is not set
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+# CONFIG_CMD_EXPORTENV is not set
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+# CONFIG_CMD_IMPORTENV is not set
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+# CONFIG_CMD_EDITENV is not set
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+# CONFIG_CMD_SAVEENV is not set
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+# CONFIG_CMD_ENV_EXISTS is not set
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+# CONFIG_CMD_CRC32 is not set
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+# CONFIG_CMD_DM is not set
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+# CONFIG_CMD_LOADS is not set
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+# CONFIG_CMD_ECHO is not set
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+# CONFIG_CMD_ITEST is not set
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+# CONFIG_CMD_SOURCE is not set
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+# CONFIG_CMD_SETEXPR is not set
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+# CONFIG_CMD_SLEEP is not set
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+# CONFIG_ISO_PARTITION is not set
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+# CONFIG_OF_TAG_MIGRATE is not set
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+# CONFIG_NET is not set
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+CONFIG_CLK=y
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+# CONFIG_GPIO is not set
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+# CONFIG_I2C is not set
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+# CONFIG_INPUT is not set
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+# CONFIG_POWER is not set
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+CONFIG_DM_SERIAL=y
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+CONFIG_SYS_NS16550=y
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+# CONFIG_GZIP is not set
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--- /dev/null
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+++ b/include/configs/nec_ar9344_aterm.h
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@@ -0,0 +1,28 @@
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+/* SPDX-License-Identifier: GPL-2.0+ */
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+/*
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+ * Copyright (C) 2024 INAGAKI Hiroshi <musashino.open@gmail.com>
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+ */
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+
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+#ifndef __NEC_AR9344_ATERM_H
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+#define __NEC_AR9344_ATERM_H
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+
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+#define CFG_SYS_SDRAM_BASE 0x80000000
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+
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+#define CFG_SYS_INIT_RAM_ADDR 0xbd000000
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+#define CFG_SYS_INIT_RAM_SIZE 0x8000
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+
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+/*
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+ * Serial Port
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+ */
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+#define CFG_SYS_NS16550_CLK 40000000
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+
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+/*
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+ * Command
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+ */
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+/* Miscellaneous configurable options */
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+
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+/*
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+ * Diagnostics
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+ */
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+
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+#endif /* __NEC_AR9344_ATERM_H */
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