2024-05-10 11:19:19 +00:00
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From f2583edf6b5b26d6e5525728f57befeca112d253 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 4 Jan 2024 12:02:43 +0000
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Subject: [PATCH 0810/1085] drm/vc4: Fix reading of frame count on GEN5 / Pi4
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The frame count values moved within registers DISPSTAT1 and
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DISPSTAT2 with GEN5, so update the accessor function to
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accommodate that.
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Fixes: b51cd7ad143d ("drm/vc4: hvs: Fix frame count register readout")
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_hvs.c | 23 +++++++++++++++++++++--
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drivers/gpu/drm/vc4/vc4_regs.h | 6 ++++++
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2 files changed, 27 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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2024-12-09 23:19:18 +00:00
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@@ -826,10 +826,28 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
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2024-05-10 11:19:19 +00:00
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if (!drm_dev_enter(drm, &idx))
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return 0;
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- if (vc4->gen >= VC4_GEN_6) {
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+ switch (vc4->gen) {
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+ case VC4_GEN_6:
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field = VC4_GET_FIELD(HVS_READ(SCALER6_DISPX_STATUS(fifo)),
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SCALER6_DISPX_STATUS_FRCNT);
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- } else {
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+ break;
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+ case VC4_GEN_5:
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+ switch (fifo) {
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+ case 0:
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+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
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+ SCALER5_DISPSTAT1_FRCNT0);
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+ break;
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+ case 1:
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+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
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+ SCALER5_DISPSTAT1_FRCNT1);
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+ break;
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+ case 2:
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+ field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
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+ SCALER5_DISPSTAT2_FRCNT2);
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+ break;
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+ }
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+ break;
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+ case VC4_GEN_4:
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switch (fifo) {
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case 0:
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field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
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2024-12-09 23:19:18 +00:00
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@@ -844,6 +862,7 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
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2024-05-10 11:19:19 +00:00
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SCALER_DISPSTAT2_FRCNT2);
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break;
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}
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+ break;
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}
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drm_dev_exit(idx);
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--- a/drivers/gpu/drm/vc4/vc4_regs.h
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+++ b/drivers/gpu/drm/vc4/vc4_regs.h
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@@ -424,6 +424,10 @@
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# define SCALER_DISPSTAT1_FRCNT0_SHIFT 18
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# define SCALER_DISPSTAT1_FRCNT1_MASK VC4_MASK(17, 12)
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# define SCALER_DISPSTAT1_FRCNT1_SHIFT 12
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+# define SCALER5_DISPSTAT1_FRCNT0_MASK VC4_MASK(25, 20)
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+# define SCALER5_DISPSTAT1_FRCNT0_SHIFT 20
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+# define SCALER5_DISPSTAT1_FRCNT1_MASK VC4_MASK(19, 14)
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+# define SCALER5_DISPSTAT1_FRCNT1_SHIFT 14
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#define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \
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(x) * (SCALER_DISPSTAT1 - \
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@@ -442,6 +446,8 @@
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#define SCALER_DISPSTAT2 0x00000068
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# define SCALER_DISPSTAT2_FRCNT2_MASK VC4_MASK(17, 12)
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# define SCALER_DISPSTAT2_FRCNT2_SHIFT 12
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+# define SCALER5_DISPSTAT2_FRCNT2_MASK VC4_MASK(19, 14)
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+# define SCALER5_DISPSTAT2_FRCNT2_SHIFT 14
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#define SCALER_DISPBASE2 0x0000006c
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#define SCALER_DISPALPHA2 0x00000070
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