mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 17:01:14 +00:00
63 lines
1.5 KiB
Diff
63 lines
1.5 KiB
Diff
|
From 7ac17ab7ea644ec27935865d6d0208ecc7fd4ed9 Mon Sep 17 00:00:00 2001
|
||
|
From: Samuel Holland <samuel@sholland.org>
|
||
|
Date: Thu, 11 Aug 2022 22:29:03 -0500
|
||
|
Subject: [PATCH 091/117] riscv: dts: allwinner: devterm: Add DSI panel and
|
||
|
backlight
|
||
|
|
||
|
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
||
|
---
|
||
|
.../allwinner/sun20i-d1-clockworkpi-v3.14.dts | 8 +++++++-
|
||
|
.../dts/allwinner/sun20i-d1-devterm-v3.14.dts | 20 +++++++++++++++++++
|
||
|
2 files changed, 27 insertions(+), 1 deletion(-)
|
||
|
|
||
|
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts
|
||
|
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts
|
||
|
@@ -48,6 +48,12 @@
|
||
|
};
|
||
|
};
|
||
|
|
||
|
+ backlight: backlight {
|
||
|
+ compatible = "pwm-backlight";
|
||
|
+ power-supply = <®_vcc>;
|
||
|
+ pwms = <&pwm 4 50000 0>; /* PD20/GPIO9 */
|
||
|
+ };
|
||
|
+
|
||
|
reg_vdd_cpu: vdd-cpu {
|
||
|
compatible = "pwm-regulator";
|
||
|
pwms = <&pwm 0 50000 0>;
|
||
|
@@ -252,7 +258,7 @@
|
||
|
};
|
||
|
|
||
|
&pwm {
|
||
|
- pinctrl-0 = <&pwm0_pd16_pin>;
|
||
|
+ pinctrl-0 = <&pwm0_pd16_pin>, <&pwm4_pd20_pin>;
|
||
|
pinctrl-names = "default";
|
||
|
status = "okay";
|
||
|
};
|
||
|
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
|
||
|
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
|
||
|
@@ -35,3 +35,23 @@
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
+
|
||
|
+&de {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&dsi {
|
||
|
+ pinctrl-0 = <&dsi_4lane_pins>;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ panel@0 {
|
||
|
+ compatible = "clockwork,cwd686";
|
||
|
+ reg = <0>;
|
||
|
+ backlight = <&backlight>;
|
||
|
+ reset-gpios = <&pio 3 19 GPIO_ACTIVE_LOW>; /* PD19/GPIO8 */
|
||
|
+ rotation = <90>;
|
||
|
+ iovcc-supply = <®_dcdc3>;
|
||
|
+ vci-supply = <®_aldo2>;
|
||
|
+ };
|
||
|
+};
|