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53 lines
1.9 KiB
Diff
53 lines
1.9 KiB
Diff
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From 1f3e7ff4f296af1f4350f457d5bd82bc825e645a Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Tue, 1 Oct 2024 12:10:24 +0200
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Subject: [PATCH 1/2] net: airoha: read default PSE reserved pages value before
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updating
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Store the default value for the number of PSE reserved pages in orig_val
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at the beginning of airoha_fe_set_pse_oq_rsv routine, before updating it
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with airoha_fe_set_pse_queue_rsv_pages().
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Introduce airoha_fe_get_pse_all_rsv utility routine.
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Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet support
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for EN7581 SoC")
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://patch.msgid.link/20241001-airoha-eth-pse-fix-v2-1-9a56cdffd074@kernel.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/airoha_eth.c | 14 ++++++++++----
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1 file changed, 10 insertions(+), 4 deletions(-)
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--- a/drivers/net/ethernet/mediatek/airoha_eth.c
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+++ b/drivers/net/ethernet/mediatek/airoha_eth.c
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@@ -1116,17 +1116,23 @@ static void airoha_fe_set_pse_queue_rsv_
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PSE_CFG_WR_EN_MASK | PSE_CFG_OQRSV_SEL_MASK);
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}
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+static u32 airoha_fe_get_pse_all_rsv(struct airoha_eth *eth)
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+{
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+ u32 val = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET);
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+
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+ return FIELD_GET(PSE_ALLRSV_MASK, val);
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+}
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+
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static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth,
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u32 port, u32 queue, u32 val)
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{
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- u32 orig_val, tmp, all_rsv, fq_limit;
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+ u32 orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue);
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+ u32 tmp, all_rsv, fq_limit;
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airoha_fe_set_pse_queue_rsv_pages(eth, port, queue, val);
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/* modify all rsv */
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- orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue);
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- tmp = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET);
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- all_rsv = FIELD_GET(PSE_ALLRSV_MASK, tmp);
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+ all_rsv = airoha_fe_get_pse_all_rsv(eth);
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all_rsv += (val - orig_val);
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airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK,
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FIELD_PREP(PSE_ALLRSV_MASK, all_rsv));
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