openwrt/target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ar7240.dtsi"
#include "ar724x_senao_loader-64k.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "engenius,enh202-v1", "qca,ar7240";
	model = "EnGenius ENH202 v1";

	aliases {
		led-boot = &led_rssihigh;
		led-failsafe = &led_rssihigh;
		led-running = &led_rssihigh;
		led-upgrade = &led_rssihigh;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	leds {
		compatible = "gpio-leds";

		pinctrl-names = "default";
		pinctrl-0 = <&jtag_disable_pins &switch_led_disable_pins &clks_disable_pins>;

		rssilow {
			label = "red:rssilow";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};

		rssimedium {
			label = "amber:rssimedium";
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};

		led_rssihigh: rssihigh {
			label = "green:rssihigh";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};

		lan {
			label = "amber:lan";
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
		};

		wan {
			label = "green:wan";
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
		};
	};

	ath9k-leds {
		compatible = "gpio-leds";

		wlan {
			label = "green:wlan";
			gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};
	};
};

&eth0 {
	nvmem-cells = <&macaddr_art_0>;
	nvmem-cell-names = "mac-address";
};

&eth1 {
	status = "okay";

	nvmem-cells = <&macaddr_art_0>;
	nvmem-cell-names = "mac-address";
};

&pcie {
	status = "okay";

	ath9k: wifi@0,0 {
		compatible = "pci168c,002a";
		reg = <0x0000 0 0 0 0>;
		qca,no-eeprom;
		#gpio-cells = <2>;
		gpio-controller;
	};
};

&art {
	nvmem-layout {
		compatible = "fixed-layout";
		#address-cells = <1>;
		#size-cells = <1>;

		macaddr_art_0: macaddr@0 {
			reg = <0x0 0x6>;
		};
	};
};