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50 lines
1.4 KiB
Diff
50 lines
1.4 KiB
Diff
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From 31425b1fadb2040b359e52ffc24c049a78d56c96 Mon Sep 17 00:00:00 2001
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From: Tianling Shen <cnsztl@gmail.com>
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Date: Sat, 18 Mar 2023 16:37:44 +0800
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Subject: [PATCH] arm64: dts: rockchip: fix gmac support for NanoPi R5S
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- Changed phy-mode to rgmii.
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- Fixed pull type in pinctrl for gmac0.
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- Removed duplicate properties in mdio node.
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These properties are defined in the gmac0 node already.
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Signed-off-by: Tianling Shen <cnsztl@gmail.com>
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Link: https://lore.kernel.org/r/20230318083745.6181-5-cnsztl@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts | 7 ++-----
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1 file changed, 2 insertions(+), 5 deletions(-)
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--- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
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@@ -57,7 +57,7 @@
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assigned-clock-rates = <0>, <125000000>;
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clock_in_out = "output";
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phy-handle = <&rgmii_phy0>;
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- phy-mode = "rgmii-id";
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+ phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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@@ -79,9 +79,6 @@
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reg = <1>;
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pinctrl-0 = <ð_phy0_reset_pin>;
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pinctrl-names = "default";
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- reset-assert-us = <10000>;
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- reset-deassert-us = <50000>;
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- reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
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};
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};
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@@ -115,7 +112,7 @@
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&pinctrl {
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gmac0 {
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eth_phy0_reset_pin: eth-phy0-reset-pin {
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- rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
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+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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