openwrt/target/linux/bcm27xx/patches-6.1/950-0873-dt-bindings-clock-Add-bindings-for-Raspberry-Pi-RP1.patch

From 00ff2819eb852b54fe22e7181646e40d560576dc Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Fri, 28 Oct 2022 14:12:18 +0100
Subject: [PATCH] dt-bindings: clock: Add bindings for Raspberry Pi RP1

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
 include/dt-bindings/clock/rp1.h | 51 +++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 include/dt-bindings/clock/rp1.h

--- /dev/null
+++ b/include/dt-bindings/clock/rp1.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Raspberry Pi Ltd.
+ */
+
+#define RP1_PLL_SYS_CORE		0
+#define RP1_PLL_AUDIO_CORE		1
+#define RP1_PLL_VIDEO_CORE		2
+
+#define RP1_PLL_SYS			3
+#define RP1_PLL_AUDIO			4
+#define RP1_PLL_VIDEO			5
+
+#define RP1_PLL_SYS_PRI_PH		6
+#define RP1_PLL_SYS_SEC_PH		7
+
+#define RP1_PLL_SYS_SEC			8
+#define RP1_PLL_AUDIO_SEC		9
+#define RP1_PLL_VIDEO_SEC		10
+
+#define RP1_CLK_SYS			11
+#define RP1_CLK_SLOW_SYS		12
+#define RP1_CLK_DMA			13
+#define RP1_CLK_UART			14
+#define RP1_CLK_ETH			15
+#define RP1_CLK_PWM0			16
+#define RP1_CLK_PWM1			17
+#define RP1_CLK_AUDIO_IN		18
+#define RP1_CLK_AUDIO_OUT		19
+#define RP1_CLK_I2S			20
+#define RP1_CLK_MIPI0_CFG		21
+#define RP1_CLK_MIPI1_CFG		22
+#define RP1_CLK_PCIE_AUX		23
+#define RP1_CLK_USBH0_MICROFRAME	24
+#define RP1_CLK_USBH1_MICROFRAME	25
+#define RP1_CLK_USBH0_SUSPEND		26
+#define RP1_CLK_USBH1_SUSPEND		27
+#define RP1_CLK_ETH_TSU			28
+#define RP1_CLK_ADC			29
+#define RP1_CLK_SDIO_TIMER		30
+#define RP1_CLK_SDIO_ALT_SRC		31
+#define RP1_CLK_GP0			32
+#define RP1_CLK_GP1			33
+#define RP1_CLK_GP2			34
+#define RP1_CLK_GP3			35
+#define RP1_CLK_GP4			36
+#define RP1_CLK_GP5			37
+#define RP1_CLK_VEC			38
+#define RP1_CLK_DPI			39
+#define RP1_CLK_MIPI0_DPI		40
+#define RP1_CLK_MIPI1_DPI		41