openwrt/target/linux/ramips/dts/mt7620a_lenovo_newifi-y1s.dts

#include "mt7620a_lenovo_newifi-y1.dtsi"

/ {
	compatible = "lenovo,newifi-y1s", "lenovo,newifi-y1", "ralink,mt7620a-soc";
	model = "Lenovo Y1S";

	aliases {
		led-boot = &led_power_blue;
		led-failsafe = &led_power_blue;
		led-running = &led_power_blue;
		led-upgrade = &led_power_blue;
		label-mac-device = &ethernet;
	};

	gpio_export {
		compatible = "gpio-export";
		#size-cells = <0>;

		usb0 {
			gpio-export,name = "usb0";
			gpio-export,output = <1>;
			gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
		};
		usb1 {
			gpio-export,name = "usb1";
			gpio-export,output = <1>;
			gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
		};
		usb2 {
			gpio-export,name = "usb2";
			gpio-export,output = <1>;
			gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
		};
	};

	leds {
		compatible = "gpio-leds";

		power1 {
			label = "yellow:power";
			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
		};

		led_power_blue: power2 {
			label = "blue:power";
			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
		};

		wlan1 {
			label = "yellow:wifi";
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
		};

		wlan2 {
			label = "blue:wifi";
			gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
		};

		usb1 {
			label = "yellow:usb";
			gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
		};

		usb2 {
			label = "blue:usb";
			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
			trigger-sources = <&ohci_port1>, <&ehci_port1>;
			linux,default-trigger = "usbport";
		};

		internet {
			label = "blue:internet";
			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
		};
	};
};

&ethernet {
	pinctrl-names = "default";
	pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;

	nvmem-cells = <&macaddr_factory_28>;
	nvmem-cell-names = "mac-address";

	mediatek,portmap = "wllll";

	port@4 {
		status = "okay";
		phy-handle = <&phy4>;
		phy-mode = "rgmii";
	};

	port@5 {
		status = "okay";
		phy-handle = <&phy5>;
		phy-mode = "rgmii";
	};

	mdio-bus {
		status = "okay";

		phy4: ethernet-phy@4 {
			reg = <4>;
			phy-mode = "rgmii";
		};

		phy5: ethernet-phy@5 {
			reg = <5>;
			phy-mode = "rgmii";
		};
	};
};

&gsw {
	mediatek,port4-gmac;
	mediatek,ephy-base = /bits/ 8 <8>;
};