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120 lines
3.9 KiB
Diff
120 lines
3.9 KiB
Diff
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From 8b99dc0922618062a1589ebd74df6108b4f9ac22 Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Wed, 8 Jan 2020 13:54:55 +0100
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Subject: [PATCH] ARM: dts: qcom: add gpio-ranges property
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This patch adds the gpio-ranges property to almost all of
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the Qualcomm ARM platforms that utilize the pinctrl-msm
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framework.
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The gpio-ranges property is part of the gpiolib subsystem.
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As a result, the binding text is available in section
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"2.1 gpio- and pin-controller interaction" of
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Documentation/devicetree/bindings/gpio/gpio.txt
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For more information please see the patch titled:
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"pinctrl: msm: fix gpio-hog related boot issues" from
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this series.
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Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
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Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
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Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019]
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Cc: Luka Perkov <luka.perkov@sartura.hr>
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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Link: https://lore.kernel.org/r/20200108125455.308969-1-robert.marko@sartura.hr
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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---
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arch/arm/boot/dts/qcom-apq8064.dtsi | 1 +
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arch/arm/boot/dts/qcom-apq8084.dtsi | 1 +
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 +
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 +
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arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 +
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arch/arm/boot/dts/qcom-msm8660.dtsi | 1 +
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arch/arm/boot/dts/qcom-msm8960.dtsi | 1 +
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arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
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8 files changed, 8 insertions(+)
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--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
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@@ -350,6 +350,7 @@
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reg = <0x800000 0x4000>;
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gpio-controller;
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+ gpio-ranges = <&tlmm_pinmux 0 0 90>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
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+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
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@@ -401,6 +401,7 @@
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compatible = "qcom,apq8084-pinctrl";
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reg = <0xfd510000 0x4000>;
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gpio-controller;
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+ gpio-ranges = <&tlmm 0 0 147>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -201,6 +201,7 @@
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compatible = "qcom,ipq4019-pinctrl";
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reg = <0x01000000 0x300000>;
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gpio-controller;
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+ gpio-ranges = <&tlmm 0 0 100>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -119,6 +119,7 @@
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reg = <0x800000 0x4000>;
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gpio-controller;
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+ gpio-ranges = <&qcom_pinmux 0 0 69>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
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+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
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@@ -128,6 +128,7 @@
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msmgpio: pinctrl@800000 {
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compatible = "qcom,mdm9615-pinctrl";
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gpio-controller;
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+ gpio-ranges = <&msmgpio 0 0 88>;
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#gpio-cells = <2>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
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+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
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@@ -115,6 +115,7 @@
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reg = <0x800000 0x4000>;
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gpio-controller;
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+ gpio-ranges = <&tlmm 0 0 173>;
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#gpio-cells = <2>;
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interrupts = <0 16 0x4>;
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interrupt-controller;
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--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
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+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
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@@ -107,6 +107,7 @@
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msmgpio: pinctrl@800000 {
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compatible = "qcom,msm8960-pinctrl";
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gpio-controller;
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+ gpio-ranges = <&msmgpio 0 0 152>;
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#gpio-cells = <2>;
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interrupts = <0 16 0x4>;
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interrupt-controller;
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--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
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+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
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@@ -707,6 +707,7 @@
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compatible = "qcom,msm8974-pinctrl";
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reg = <0xfd510000 0x4000>;
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gpio-controller;
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+ gpio-ranges = <&msmgpio 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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