openwrt/target/linux/ramips/dts/mt7620a_iodata_wn-ac1167gr.dts

242 lines
3.8 KiB
Plaintext
Raw Normal View History

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "iodata,wn-ac1167gr", "ralink,mt7620a-soc";
model = "I-O DATA WN-AC1167GR";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "green:wlan2g";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
notification {
label = "green:notification";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
auto {
label = "auto";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x8000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
partition@48000 {
label = "iNIC_rf";
reg = <0x48000 0x8000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_iNIC_rf_0: eeprom@0 {
reg = <0x0 0x200>;
};
};
};
partition@50000 {
label = "NoUsed";
reg = <0x50000 0x20000>;
read-only;
};
partition@70000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x70000 0x6b4000>;
};
partition@724000 {
label = "manufacture";
reg = <0x724000 0x8c000>;
read-only;
};
partition@7b0000 {
label = "backup";
reg = <0x7b0000 0x10000>;
read-only;
};
partition@7c0000 {
label = "storage";
reg = <0x7c0000 0x40000>;
read-only;
};
};
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &mdio_pins>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
port@5 {
status = "okay";
mediatek,fixed-link = <1000 1 1 1>;
phy-mode = "rgmii";
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
};
ethernet-phy@1 {
reg = <1>;
phy-mode = "rgmii";
};
ethernet-phy@2 {
reg = <2>;
phy-mode = "rgmii";
};
ethernet-phy@3 {
reg = <3>;
phy-mode = "rgmii";
};
ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
ethernet-phy@1f {
reg = <0x1f>;
phy-mode = "rgmii";
};
};
};
&gsw {
mediatek,ephy-base = /bits/ 8 <12>;
};
&state_default {
gpio {
groups = "i2c", "uartf";
function = "gpio";
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_iNIC_rf_0>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};