2021-11-04 20:52:43 +00:00
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From 7d5af56418d7d01e43247a33b6fe6492ea871923 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 16 Sep 2021 14:03:54 +0200
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Subject: [PATCH] net: dsa: b53: Drop unused "cpu_port" field
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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It's set but never used anymore.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Tested-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/b53/b53_common.c | 28 ----------------------------
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drivers/net/dsa/b53/b53_priv.h | 1 -
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2 files changed, 29 deletions(-)
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--- a/drivers/net/dsa/b53/b53_common.c
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+++ b/drivers/net/dsa/b53/b53_common.c
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2022-03-21 14:21:24 +00:00
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@@ -2300,7 +2300,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 2,
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.arl_buckets = 1024,
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.imp_port = 5,
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- .cpu_port = B53_CPU_PORT_25,
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.duplex_reg = B53_DUPLEX_STAT_FE,
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},
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{
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2022-03-21 14:21:24 +00:00
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@@ -2311,7 +2310,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 2,
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.arl_buckets = 1024,
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.imp_port = 5,
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- .cpu_port = B53_CPU_PORT_25,
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.duplex_reg = B53_DUPLEX_STAT_FE,
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},
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{
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2022-03-21 14:21:24 +00:00
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@@ -2322,7 +2320,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2336,7 +2333,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2350,7 +2346,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_9798,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2364,7 +2359,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_9798,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2379,7 +2373,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_buckets = 1024,
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.vta_regs = B53_VTA_REGS,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
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2022-03-21 14:21:24 +00:00
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@@ -2392,7 +2385,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2406,7 +2398,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2420,7 +2411,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS_63XX,
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.duplex_reg = B53_DUPLEX_STAT_63XX,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
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2022-03-21 14:21:24 +00:00
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@@ -2434,7 +2424,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2448,7 +2437,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2462,7 +2450,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2476,7 +2463,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2490,7 +2476,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2504,7 +2489,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2518,7 +2502,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2547,7 +2530,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2561,7 +2543,6 @@ static const struct b53_chip_data b53_sw
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2021-11-04 20:52:43 +00:00
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.arl_bins = 4,
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.arl_buckets = 256,
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.imp_port = 8,
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- .cpu_port = B53_CPU_PORT,
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.vta_regs = B53_VTA_REGS,
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.duplex_reg = B53_DUPLEX_STAT_GE,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
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2022-03-21 14:21:24 +00:00
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@@ -2587,7 +2568,6 @@ static int b53_switch_init(struct b53_de
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2021-11-04 20:52:43 +00:00
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dev->vta_regs[2] = chip->vta_regs[2];
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dev->jumbo_pm_reg = chip->jumbo_pm_reg;
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dev->imp_port = chip->imp_port;
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- dev->cpu_port = chip->cpu_port;
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dev->num_vlans = chip->vlans;
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dev->num_arl_bins = chip->arl_bins;
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dev->num_arl_buckets = chip->arl_buckets;
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2022-03-21 14:21:24 +00:00
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@@ -2619,13 +2599,6 @@ static int b53_switch_init(struct b53_de
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2021-11-04 20:52:43 +00:00
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break;
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#endif
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}
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- } else if (dev->chip_id == BCM53115_DEVICE_ID) {
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- u64 strap_value;
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-
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- b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
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- /* use second IMP port if GMII is enabled */
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- if (strap_value & SV_GMII_CTRL_115)
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- dev->cpu_port = 5;
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}
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dev->num_ports = fls(dev->enabled_ports);
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--- a/drivers/net/dsa/b53/b53_priv.h
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+++ b/drivers/net/dsa/b53/b53_priv.h
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2022-03-21 14:21:24 +00:00
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@@ -124,7 +124,6 @@ struct b53_device {
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2021-11-04 20:52:43 +00:00
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/* used ports mask */
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u16 enabled_ports;
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unsigned int imp_port;
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- unsigned int cpu_port;
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/* connect specific data */
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u8 current_page;
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