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81 lines
1.9 KiB
Diff
81 lines
1.9 KiB
Diff
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From 482fe0cb90d3376051304531a01edccac9ca1868 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Thu, 29 Feb 2024 10:05:26 -0800
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Subject: [PATCH 412/413] 6.10: arm64: dts: imx8mp-venice-gw72xx: add mac addr
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for eth1
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Add the PCI bus topology for eth1 so that boot firmware can set the
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local-mac-address property.
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The eth1 device is behind a PCI switch:
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# lspci -n
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00:00.0 0604: 16c3:abcd (rev 01)
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01:00.0 0604: 12d8:b404 (rev 01)
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02:01.0 0604: 12d8:b404 (rev 01)
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02:02.0 0604: 12d8:b404 (rev 01)
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02:03.0 0604: 12d8:b404 (rev 01)
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05:00.0 0200: 11ab:4380
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# lspci -t
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-[0000:00]---00.0-[01-ff]----00.0-[02-05]--+-01.0-[03]--
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+-02.0-[04]--
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\-03.0-[05]----00.0
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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.../dts/freescale/imx8mp-venice-gw72xx.dtsi | 37 +++++++++++++++++++
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1 file changed, 37 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
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+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
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@@ -8,6 +8,10 @@
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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/ {
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+ aliases {
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+ ethernet1 = ð1;
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+ };
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+
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led-controller {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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@@ -137,6 +141,39 @@
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pinctrl-0 = <&pinctrl_pcie0>;
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reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
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status = "okay";
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+
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+ pcie@0,0 {
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+ reg = <0x0000 0 0 0 0>;
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+ device_type = "pci";
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ pcie@0,0 {
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+ reg = <0x0000 0 0 0 0>;
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+ device_type = "pci";
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ pcie@3,0 {
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+ reg = <0x1800 0 0 0 0>;
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+ device_type = "pci";
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ eth1: ethernet@0,0 {
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+ reg = <0x0000 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ local-mac-address = [00 00 00 00 00 00];
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+ };
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+ };
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+ };
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+ };
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};
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/* GPS */
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