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116 lines
4.1 KiB
Diff
116 lines
4.1 KiB
Diff
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From f73116f62647c74eb0f06f0d8c29e5993d961d82 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sat, 9 Oct 2021 22:43:26 -0500
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Subject: [PATCH 41/90] arm: psci: Add definitions for PSCI v1.1
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Add the new option, function IDs, and prototypes for PSCI v1.1
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implementations. In the process, fix some issues with the existing
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definitions:
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- Fix the incorrectly-named ARM_PSCI_0_2_FN64_SYSTEM_RESET2.
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- Replace the deprecated "affinity_level" naming with "power_level".
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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arch/arm/cpu/armv7/Kconfig | 3 +++
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arch/arm/cpu/armv8/fwcall.c | 2 +-
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arch/arm/include/asm/psci.h | 9 +++++++--
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arch/arm/include/asm/system.h | 14 +++++++++-----
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arch/arm/lib/psci-dt.c | 2 ++
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5 files changed, 22 insertions(+), 8 deletions(-)
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--- a/arch/arm/cpu/armv7/Kconfig
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+++ b/arch/arm/cpu/armv7/Kconfig
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@@ -80,6 +80,9 @@ choice
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help
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Select the supported PSCI version.
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+config ARMV7_PSCI_1_1
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+ bool "PSCI V1.1"
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+
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config ARMV7_PSCI_1_0
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bool "PSCI V1.0"
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--- a/arch/arm/cpu/armv8/fwcall.c
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+++ b/arch/arm/cpu/armv8/fwcall.c
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@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 r
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{
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struct pt_regs regs;
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- regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
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+ regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2;
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regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
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regs.regs[2] = cookie;
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if (use_smc_for_psci)
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--- a/arch/arm/include/asm/psci.h
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+++ b/arch/arm/include/asm/psci.h
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@@ -22,8 +22,9 @@
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#include <linux/bitops.h>
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#endif
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-#define ARM_PSCI_VER_1_0 (0x00010000)
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#define ARM_PSCI_VER_0_2 (0x00000002)
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+#define ARM_PSCI_VER_1_0 (0x00010000)
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+#define ARM_PSCI_VER_1_1 (0x00010001)
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/* PSCI 0.1 interface */
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#define ARM_PSCI_FN_BASE 0x95c1ba5e
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@@ -68,7 +69,6 @@
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#define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
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#define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
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#define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
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-#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
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/* PSCI 1.0 interface */
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#define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
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@@ -86,6 +86,11 @@
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#define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
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#define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
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+/* PSCI 1.1 interface */
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+#define ARM_PSCI_1_1_FN_SYSTEM_RESET2 ARM_PSCI_0_2_FN(18)
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+
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+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
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+
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/* 1KB stack per core */
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#define ARM_PSCI_STACK_SHIFT 10
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#define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
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--- a/arch/arm/include/asm/system.h
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+++ b/arch/arm/include/asm/system.h
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@@ -557,16 +557,20 @@ void mmu_page_table_flush(unsigned long
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#ifdef CONFIG_ARMV7_PSCI
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void psci_arch_cpu_entry(void);
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void psci_arch_init(void);
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+
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u32 psci_version(void);
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-s32 psci_features(u32 function_id, u32 psci_fid);
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+s32 psci_cpu_suspend(u32 function_id, u32 power_state, u32 pc, u32 context_id);
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s32 psci_cpu_off(void);
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-s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
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- u32 context_id);
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-s32 psci_affinity_info(u32 function_id, u32 target_affinity,
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- u32 lowest_affinity_level);
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+s32 psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc, u32 context_id);
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+s32 psci_affinity_info(u32 function_id, u32 target_affinity, u32 power_level);
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u32 psci_migrate_info_type(void);
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void psci_system_off(void);
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void psci_system_reset(void);
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+s32 psci_features(u32 function_id, u32 psci_fid);
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+s32 psci_cpu_default_suspend(u32 function_id, u32 pc, u32 context_id);
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+s32 psci_node_hw_state(u32 function_id, u32 target_cpu, u32 power_level);
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+s32 psci_system_suspend(u32 function_id, u32 pc, u32 context_id);
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+s32 psci_system_reset2(u32 function_id, u32 reset_type, u32 cookie);
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#endif
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#endif /* __ASSEMBLY__ */
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--- a/arch/arm/lib/psci-dt.c
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+++ b/arch/arm/lib/psci-dt.c
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@@ -66,6 +66,8 @@ int fdt_psci(void *fdt)
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init_psci_node:
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#if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
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psci_ver = sec_firmware_support_psci_version();
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+#elif defined(CONFIG_ARMV7_PSCI_1_1)
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+ psci_ver = ARM_PSCI_VER_1_1;
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#elif defined(CONFIG_ARMV7_PSCI_1_0) || defined(CONFIG_ARMV8_PSCI)
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psci_ver = ARM_PSCI_VER_1_0;
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#elif defined(CONFIG_ARMV7_PSCI_0_2)
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