2023-10-03 01:32:35 +00:00
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--- a/drivers/pci/controller/pcie-mediatek-gen3.c
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+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
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2024-01-26 21:09:33 +00:00
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@@ -375,7 +375,13 @@ static int mtk_pcie_startup_port(struct
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2023-10-03 01:32:35 +00:00
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msleep(100);
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/* De-assert reset signals */
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- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
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+ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);
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2023-10-05 18:40:12 +00:00
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+ writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
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+
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2023-10-03 01:32:35 +00:00
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+ msleep(100);
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+
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+ /* De-assert PERST# signals */
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+ val &= ~(PCIE_PE_RSTB);
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2023-10-05 18:40:12 +00:00
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writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
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2023-10-03 01:32:35 +00:00
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/* Check if the link is up or not */
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