2020-09-25 22:46:13 +00:00
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/dts-v1/;
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2014-08-11 11:36:53 +00:00
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6348";
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2014-08-11 11:37:01 +00:00
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aliases {
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pflash = &pflash;
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2016-07-01 09:23:06 +00:00
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pinctrl = &pinctrl;
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2017-07-31 09:08:20 +00:00
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serial0 = &uart0;
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2017-02-07 11:31:02 +00:00
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spi0 = &lsspi;
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2014-08-11 11:37:01 +00:00
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};
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2014-08-11 11:36:53 +00:00
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cpus {
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2014-12-01 00:51:53 +00:00
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#address-cells = <1>;
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#size-cells = <0>;
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2014-08-11 11:36:53 +00:00
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cpu@0 {
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compatible = "brcm,bmips3300", "mips,mips4Kc";
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2014-12-01 00:51:53 +00:00
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device_type = "cpu";
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reg = <0>;
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2014-08-11 11:36:53 +00:00
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};
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};
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2014-12-01 00:52:07 +00:00
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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2014-08-11 11:36:53 +00:00
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memory { device_type = "memory"; reg = <0 0>; };
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2014-08-11 11:37:01 +00:00
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pflash: nor@1fc00000 {
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compatible = "cfi-flash";
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reg = <0x1fc00000 0x400000>;
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2014-08-21 11:27:56 +00:00
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bank-width = <2>;
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2014-08-11 11:37:01 +00:00
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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2014-08-11 11:36:53 +00:00
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ubus@fff00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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2014-12-01 00:51:56 +00:00
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ranges;
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2014-08-11 11:36:53 +00:00
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compatible = "simple-bus";
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2017-02-07 11:31:02 +00:00
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interrupt-parent = <&periph_intc>;
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2014-12-01 00:52:07 +00:00
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periph_intc: interrupt-controller@fffe000c {
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2016-06-15 10:37:33 +00:00
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compatible = "brcm,bcm6345-l1-intc";
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2014-12-01 00:52:07 +00:00
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reg = <0xfffe000c 0x8>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>;
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};
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ext_intc: interrupt-controller@fffe0014 {
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2015-04-27 11:06:05 +00:00
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compatible = "brcm,bcm6345-ext-intc";
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2014-12-01 00:52:07 +00:00
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reg = <0xfffe0014 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <3>, <4>, <5>, <6>;
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2014-12-08 16:11:52 +00:00
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brcm,field-width = <5>;
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2014-12-01 00:52:07 +00:00
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};
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2015-02-27 17:39:49 +00:00
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2016-07-01 09:23:06 +00:00
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pinctrl: pin-controller@fffe0400 {
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compatible = "brcm,bcm6348-pinctrl";
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reg = <0xfffe0400 0x8>,
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<0xfffe0408 0x8>,
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<0xfffe0418 0x4>;
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reg-names = "dirout", "dat", "mode";
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2015-02-27 17:39:49 +00:00
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gpio-controller;
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#gpio-cells = <2>;
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2016-12-18 12:54:17 +00:00
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interrupt-parent = <&ext_intc>;
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interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
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2016-07-01 09:23:06 +00:00
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interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
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pinctrl_ext_ephy: ext_ephy {
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function = "ext_ephy";
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groups = "group1", "group4";
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};
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pinctrl_mii_snoop: mii_snoop {
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function = "ext_ephy";
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groups = "group1", "group4";
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};
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pinctrl_legacy_led: legacy_led {
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function = "legacy_led";
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groups = "group4";
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};
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pinctrl_mii_pccard: mii_pccard {
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function = "mii_pccard";
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groups = "group1";
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};
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pinctrl_pci: pci {
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function = "pci";
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groups = "group2";
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};
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pinctrl_spi_master_uart: spi_master_uart {
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function = "spi_master_uart";
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groups = "group1";
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};
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pinctrl_ext_mii: ext_mii {
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function = "ext_mii";
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groups = "group0", "group3";
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};
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pinctrl_utopia: utopia {
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function = "utopia";
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groups = "group0", "group1", "group3";
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};
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2015-02-27 17:39:49 +00:00
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};
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2017-02-07 11:31:02 +00:00
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2017-07-31 09:08:20 +00:00
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uart0: serial@fffe0300 {
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compatible = "brcm,bcm6345-uart";
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reg = <0xfffe0300 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <2>;
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/* clocks = <&periph_clk>; */
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/* clock-names = "refclk"; */
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status = "disabled";
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};
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2017-02-07 11:31:02 +00:00
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lsspi: spi@fffe0c00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6348-spi";
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reg = <0xfffe0c00 0x40>;
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interrupts = <1>;
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/* clocks = <&clkctl 9>; */
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};
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2014-08-11 11:36:53 +00:00
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};
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};
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