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143 lines
2.4 KiB
Plaintext
143 lines
2.4 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "iptime,a6ns-m", "mediatek,mt7621-soc";
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model = "ipTIME A6ns-M";
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aliases {
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led-boot = &led_cpu;
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led-failsafe = &led_cpu;
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led-running = &led_cpu;
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led-upgrade = &led_cpu;
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label-mac-device = ðernet;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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leds {
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compatible = "gpio-leds";
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usb {
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label = "a6ns-m:blue:usb";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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trigger-sources = <&xhci_ehci_port1>;
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linux,default-trigger = "usbport";
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};
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wlan5g {
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label = "a6ns-m:blue:wlan5g";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0radio";
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};
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wlan2g {
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label = "a6ns-m:blue:wlan2g";
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1radio";
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};
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led_cpu: cpu {
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label = "a6ns-m:blue:cpu";
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <80000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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label = "config";
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reg = <0x20000 0x10000>;
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read-only;
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};
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factory: partition@30000 {
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label = "factory";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x40000 0xfc0000>;
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};
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};
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};
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};
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&state_default {
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gpio {
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ralink,group = "i2c", "uart3", "jtag", "wdt";
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ralink,function = "gpio";
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};
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};
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ðernet {
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mtd-mac-address = <&uboot 0x1fc20>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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