openwrt/target/linux/ramips/dts/mt7628an_tplink_tl-wr841n-v14.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "tplink,tl-wr841n-v14", "mediatek,mt7628an-soc";
	model = "TP-Link TL-WR841N v14";

	aliases {
		led-boot = &led_wlan;
		led-failsafe = &led_wlan;
		led-upgrade = &led_wlan;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		lan {
			label = "green:lan";
			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
		};

		wan_green {
			label = "green:wan";
			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
		};

		led_wlan: wlan {
			label = "green:wlan";
			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		wan_orange {
			label = "orange:wan";
			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "boot";
				reg = <0x0 0x10000>;
				read-only;
			};

			partition@10000 {
				compatible = "tplink,firmware";
				label = "firmware";
				reg = <0x10000 0x3e0000>;
			};

			factory: partition@3f0000 {
				label = "factory";
				reg = <0x3f0000 0x10000>;
				read-only;
			};
		};
	};
};

&ehci {
	status = "disabled";
};

&ohci {
	status = "disabled";
};

&wmac {
	status = "okay";

	nvmem-cells = <&macaddr_factory_f100>;
	nvmem-cell-names = "mac-address";
};

&ethernet {
	nvmem-cells = <&macaddr_factory_f100>;
	nvmem-cell-names = "mac-address";
};

&esw {
	mediatek,portmap = <0x3e>;
};

&state_default {
	gpio {
		groups = "p4led_an", "p3led_an", "p2led_an", "p1led_an", "p0led_an", "wdt";
		function = "gpio";
	};
};

&gpio {
	led_wlan_enable {
		gpio-hog;
		gpios = <43 GPIO_ACTIVE_HIGH>;
		output-high;
	};
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_f100: macaddr@f100 {
		reg = <0xf100 0x6>;
	};
};