2021-01-09 05:31:53 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "realtek,rtl838x-soc";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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keys {
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2021-06-26 03:29:24 +00:00
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compatible = "gpio-keys";
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2021-01-09 05:31:53 +00:00
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mode {
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label = "reset";
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2021-05-08 08:51:29 +00:00
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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2021-01-09 05:31:53 +00:00
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linux,code = <KEY_RESTART>;
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};
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};
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2021-11-25 05:41:59 +00:00
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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open-source;
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};
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2021-01-09 05:31:53 +00:00
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};
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2021-11-25 05:50:09 +00:00
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&gpio1 {
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status = "okay";
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indirect-access-bus-id = <31>;
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2021-01-09 05:31:53 +00:00
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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