diff --git a/README.md b/README.md index baa97e2..927b62b 100644 --- a/README.md +++ b/README.md @@ -35,11 +35,10 @@ board_name|board combination|status -------|-------|---- zc706_fmcs2|Xilinx ZC706 dev board + FMCOMMS2/3/4|Done zed_fmcs2|Xilinx zed board + FMCOMMS2/3/4|Done -adrv9364z7020|ADRV9364Z7020 SOM + ADRV1CRR-BOB carrier board|Done -adrv9361z7035|ADRV9361Z7035 SOM + ADRV1CRR-BOB carrier board|Done -adrv9361z7035_fmc|ADRV9361Z7035 SOM + ADRV1CRR-FMC carrier board|Done +adrv9364z7020|ADRV9364Z7020 SOM|Done +adrv9361z7035|ADRV9361Z7035 SOM|Done zc702_fmcs2|Xilinx ZC702 dev board + FMCOMMS2/3/4|Done -zcu102_fmcs2|Xilinx ZCU102 dev board + FMCOMMS2/3/4|Coming soon! +zcu102_fmcs2|Xilinx ZCU102 dev board + FMCOMMS2/3/4|Done zcu102_9371|Xilinx ZCU102 dev board + ADRV9371|Future - board_name is used to identify FPGA design in openwifi-hw/boards/ @@ -58,7 +57,9 @@ zcu102_9371|Xilinx ZCU102 dev board + ADRV9371|Future [[Cite openwifi project](#Cite-openwifi-project)] ## Quick start -- Burn [openwifi image](https://users.ugent.be/~xjiao/openwifi-1.1.0-taiyuan-1.img.xz) into a SD card (Double click or "Open With Disk Image Writer"). The SD card has two partitions: BOOT and rootfs. You need to config the **correct files in the BOOT partition** according to the **platform you have** by operating the SD card on your computer: **overwrite** the BOOT.BIN and devicetree.dtb in the base directory of BOOT partiton with the files in **openwifi/board_name** directory. (DO **NOT** touch **uImage**!) +- Burn [openwifi image](https://users.ugent.be/~xjiao/openwifi-1.1.0-taiyuan-2.img.xz) into a SD card ("Open With Disk Image Writer". Or "dd" command after unzip). The SD card has two partitions: BOOT and rootfs. You need to config the **correct files in the BOOT partition** according to the **board you have** by operation on your computer: + - Copy files in **openwifi/board_name** to the base directory of BOOT partiton. + - Copy **openwifi/zynqmp-common/Image** (zcu102 board) or **openwifi/zynq-common/uImage** (other boards) to the base directory of BOOT partiton - Connect two antennas to RXA/TXA ports. Config the board to SD card boot mode (check the board manual). Insert the SD card to the board. - Power on. login to the board from your PC (PC Ethernet should have IP 192.168.10.1) with one time password **analog**. ``` @@ -116,7 +117,13 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i - Get the latest FPGA bitstream from openwifi-hw, generate BOOT.BIN and transfer it on board via ssh channel: ``` $OPENWIFI_DIR/user_space/get_fpga.sh $OPENWIFI_DIR + + For Zynq 7000: $OPENWIFI_DIR/user_space/boot_bin_gen.sh $OPENWIFI_DIR $XILINX_DIR $BOARD_NAME + + For Zynq MPSoC (like zcu102 board): + $OPENWIFI_DIR/user_space/boot_bin_gen_zynqmp.sh $OPENWIFI_DIR $XILINX_DIR $BOARD_NAME + scp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN root@192.168.10.122: ``` - On board: Put the BOOT.BIN into the BOOT partition. @@ -132,11 +139,13 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i Since the pre-built SD card image might not have the latest bug-fixes/updates, it is recommended to udpate the driver on board. - Prepare Analog Devices Linux kernel source code (only need to run once): ``` - $OPENWIFI_DIR/user_space/prepare_kernel_src.sh $OPENWIFI_DIR $XILINX_DIR + $OPENWIFI_DIR/user_space/prepare_kernel.sh $OPENWIFI_DIR $XILINX_DIR ARCH_BIT + (For Zynq 7000, ARCH_BIT should be 32, for Zynq MPSoC, ARCH_BIT should be 64) ``` - Compile the latest openwifi driver ``` - $OPENWIFI_DIR/driver/make_all.sh $OPENWIFI_DIR $XILINX_DIR + $OPENWIFI_DIR/driver/make_all.sh $OPENWIFI_DIR $XILINX_DIR ARCH_BIT + (For Zynq 7000, ARCH_BIT should be 32, for Zynq MPSoC, ARCH_BIT should be 64) ``` - Copy the driver files to the board via ssh channel ``` @@ -169,7 +178,7 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i - Input password "openwifi" ## Build openwifi Linux img from scratch -- Download [2017_R1-2018_01_29.img.xz](http://swdownloads.analog.com/cse/2017_R1-2018_01_29.img.xz) from [Analog Devices Wiki](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images). Burn it to a SD card. +- Download [2019_R1-2020_02_04.img.xz](swdownloads.analog.com/cse/2019_R1-2020_02_04.img.xz) from [Analog Devices Wiki](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images). Burn it to a SD card. - Insert the SD card to your Linux PC. Find out the mount point (that has two sub directories BOOT and rootfs), and setup environment variables (use absolute path): ``` export SDCARD_DIR=sdcard_mount_point @@ -198,7 +207,7 @@ $OPENWIFI_DIR/user_space/build_wpa_supplicant_wo11b.sh $OPENWIFI_DIR ``` ## Porting guide -This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. We use **2018_r1** of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl). +This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. openwifi is based on f61d9707 (2019 r1) of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl). - Open the fmcomms2 + zc706 reference design at hdl/projects/fmcomms2/zc706 (Please read Analog Devices help) - Open the openwifi design zc706_fmcs2 at openwifi-hw/boards/zc706_fmcs2 (Please read openwifi-hw repository) - "Open Block Design", you will see the differences between openwifi and the reference design. Both in "diagram" and in "Address Editor". diff --git a/driver/Makefile b/driver/Makefile index bb26bf4..12efaf9 100644 --- a/driver/Makefile +++ b/driver/Makefile @@ -3,7 +3,8 @@ obj-m += sdr.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/ad9361/Makefile b/driver/ad9361/Makefile index 0872834..8aa0d05 100644 --- a/driver/ad9361/Makefile +++ b/driver/ad9361/Makefile @@ -4,7 +4,8 @@ ad9361_drv-y := ad9361.o ad9361_conv.o obj-m += ad9361_drv.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/ad9361/ad9361.c b/driver/ad9361/ad9361.c index 9747a6f..dda1a9f 100644 --- a/driver/ad9361/ad9361.c +++ b/driver/ad9361/ad9361.c @@ -1182,86 +1182,6 @@ static u64 ad9361_from_clk(unsigned long freq) return ((u64)freq << 1); } -static int ad9361_load_gt(struct ad9361_rf_phy *phy, u64 freq, u32 dest) -{ - struct ad9361_rf_phy_state *st = phy->state; - struct spi_device *spi = phy->spi; - u8 (*tab)[3]; - u32 band, index_max, i, lna, lpf_tia_mask, set_gain; - - dev_dbg(&phy->spi->dev, "%s: frequency %llu", __func__, freq); - - band = ad9361_gt_tableindex(phy, freq); - - dev_dbg(&phy->spi->dev, "%s: frequency %llu (band %d)", - __func__, freq, band); - - /* check if table is present */ - if (st->current_table == band) - return 0; - - tab = phy->gt_info[band].tab; - index_max = phy->gt_info[band].max_index; - - ad9361_spi_writef(spi, REG_AGC_CONFIG_2, - AGC_USE_FULL_GAIN_TABLE, !phy->pdata->split_gt); - - ad9361_spi_write(spi, REG_MAX_LMT_FULL_GAIN, index_max - 1); /* Max Full/LMT Gain Table Index */ - - set_gain = ad9361_spi_readf(spi, REG_RX1_MANUAL_LMT_FULL_GAIN, - RX_FULL_TBL_IDX_MASK); - if (set_gain > (index_max - 1)) - ad9361_spi_writef(spi, REG_RX1_MANUAL_LMT_FULL_GAIN, - RX_FULL_TBL_IDX_MASK, index_max - 1); /* Rx1 Full/LMT Gain Index */ - - set_gain = ad9361_spi_readf(spi, REG_RX2_MANUAL_LMT_FULL_GAIN, - RX_FULL_TBL_IDX_MASK); - if (set_gain > (index_max - 1)) - ad9361_spi_write(spi, REG_RX2_MANUAL_LMT_FULL_GAIN, - index_max - 1); /* Rx2 Full/LMT Gain Index */ - - lna = phy->pdata->elna_ctrl.elna_in_gaintable_all_index_en ? - EXT_LNA_CTRL : 0; - - ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, START_GAIN_TABLE_CLOCK | - RECEIVER_SELECT(dest)); /* Start Gain Table Clock */ - - /* TX QUAD Calibration */ - if (phy->pdata->split_gt) - lpf_tia_mask = 0x20; - else - lpf_tia_mask = 0x3F; - - st->tx_quad_lpf_tia_match = -EINVAL; - - for (i = 0; i < index_max; i++) { - ad9361_spi_write(spi, REG_GAIN_TABLE_ADDRESS, i); /* Gain Table Index */ - ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA1, tab[i][0] | lna); /* Ext LNA, Int LNA, & Mixer Gain Word */ - ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA2, tab[i][1]); /* TIA & LPF Word */ - ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA3, tab[i][2]); /* DC Cal bit & Dig Gain Word */ - ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, - START_GAIN_TABLE_CLOCK | - WRITE_GAIN_TABLE | - RECEIVER_SELECT(dest)); /* Gain Table Index */ - ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay 3 ADCCLK/16 cycles */ - ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ - - if ((tab[i][1] & lpf_tia_mask) == 0x20) - st->tx_quad_lpf_tia_match = i; - - } - - ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, START_GAIN_TABLE_CLOCK | - RECEIVER_SELECT(dest)); /* Clear Write Bit */ - ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ - ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ - ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, 0); /* Stop Gain Table Clock */ - - st->current_table = band; - - return 0; -} - static int ad9361_setup_ext_lna(struct ad9361_rf_phy *phy, struct elna_control *ctrl) { @@ -1325,7 +1245,7 @@ int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb, dev_dbg(&phy->spi->dev, "%s : attenuation %u mdB tx1=%d tx2=%d", __func__, atten_mdb, tx1, tx2); - if (atten_mdb > 89750) /* 89.75 dB */ + if (atten_mdb > MAX_TX_ATTENUATION_DB) /* 89.75 dB */ return -EINVAL; atten_mdb /= 250; /* Scale to 0.25dB / LSB */ @@ -1417,6 +1337,9 @@ static int ad9361_trx_ext_lo_control(struct ad9361_rf_phy *phy, ret = ad9361_spi_writef(phy->spi, REG_ENSM_CONFIG_2, POWER_DOWN_TX_SYNTH, mcs_rf_enable ? 0 : enable); + ret = ad9361_spi_writef(phy->spi, REG_ENSM_CONFIG_2, + TX_SYNTH_READY_MASK, enable); + ret |= ad9361_spi_writef(phy->spi, REG_RFPLL_DIVIDERS, TX_VCO_DIVIDER(~0), enable ? 7 : st->cached_tx_rfpll_div); @@ -1443,6 +1366,9 @@ static int ad9361_trx_ext_lo_control(struct ad9361_rf_phy *phy, ret = ad9361_spi_writef(phy->spi, REG_ENSM_CONFIG_2, POWER_DOWN_RX_SYNTH, mcs_rf_enable ? 0 : enable); + ret = ad9361_spi_writef(phy->spi, REG_ENSM_CONFIG_2, + RX_SYNTH_READY_MASK, enable); + ret |= ad9361_spi_writef(phy->spi, REG_RFPLL_DIVIDERS, RX_VCO_DIVIDER(~0), enable ? 7 : st->cached_rx_rfpll_div); @@ -1859,6 +1785,112 @@ static int find_table_index(struct ad9361_rf_phy *phy, int gain) return -EINVAL; } +static int ad9361_load_gt(struct ad9361_rf_phy *phy, u64 freq, u32 dest) +{ + struct ad9361_rf_phy_state *st = phy->state; + struct spi_device *spi = phy->spi; + u8 (*tab)[3]; + u32 band, index_max, i, lna, lpf_tia_mask, set_gain; + int ret, rx1_gain, rx2_gain; + + dev_dbg(&phy->spi->dev, "%s: frequency %llu", __func__, freq); + + band = ad9361_gt_tableindex(phy, freq); + + dev_dbg(&phy->spi->dev, "%s: frequency %llu (band %d)", + __func__, freq, band); + + /* check if table is present */ + if (st->current_table == band) + return 0; + + tab = phy->gt_info[band].tab; + index_max = phy->gt_info[band].max_index; + + ad9361_spi_writef(spi, REG_AGC_CONFIG_2, + AGC_USE_FULL_GAIN_TABLE, !phy->pdata->split_gt); + + ad9361_spi_write(spi, REG_MAX_LMT_FULL_GAIN, index_max - 1); /* Max Full/LMT Gain Table Index */ + + set_gain = ad9361_spi_readf(spi, REG_RX1_MANUAL_LMT_FULL_GAIN, + RX_FULL_TBL_IDX_MASK); + + if (st->current_table >= 0) { + rx1_gain = phy->gt_info[st->current_table].abs_gain_tbl[set_gain]; + } else { + if (set_gain > (index_max - 1)) + set_gain = index_max - 1; + + rx1_gain = phy->gt_info[band].abs_gain_tbl[set_gain]; + } + + set_gain = ad9361_spi_readf(spi, REG_RX2_MANUAL_LMT_FULL_GAIN, + RX_FULL_TBL_IDX_MASK); + + if (st->current_table >= 0) { + rx2_gain = phy->gt_info[st->current_table].abs_gain_tbl[set_gain]; + } else { + if (set_gain > (index_max - 1)) + set_gain = index_max - 1; + + rx2_gain = phy->gt_info[band].abs_gain_tbl[set_gain]; + } + + lna = phy->pdata->elna_ctrl.elna_in_gaintable_all_index_en ? + EXT_LNA_CTRL : 0; + + ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, START_GAIN_TABLE_CLOCK | + RECEIVER_SELECT(dest)); /* Start Gain Table Clock */ + + /* TX QUAD Calibration */ + if (phy->pdata->split_gt) + lpf_tia_mask = 0x20; + else + lpf_tia_mask = 0x3F; + + st->tx_quad_lpf_tia_match = -EINVAL; + + for (i = 0; i < index_max; i++) { + ad9361_spi_write(spi, REG_GAIN_TABLE_ADDRESS, i); /* Gain Table Index */ + ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA1, tab[i][0] | lna); /* Ext LNA, Int LNA, & Mixer Gain Word */ + ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA2, tab[i][1]); /* TIA & LPF Word */ + ad9361_spi_write(spi, REG_GAIN_TABLE_WRITE_DATA3, tab[i][2]); /* DC Cal bit & Dig Gain Word */ + ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, + START_GAIN_TABLE_CLOCK | + WRITE_GAIN_TABLE | + RECEIVER_SELECT(dest)); /* Gain Table Index */ + ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay 3 ADCCLK/16 cycles */ + ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ + + if ((tab[i][1] & lpf_tia_mask) == 0x20) + st->tx_quad_lpf_tia_match = i; + + } + + ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, START_GAIN_TABLE_CLOCK | + RECEIVER_SELECT(dest)); /* Clear Write Bit */ + ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ + ad9361_spi_write(spi, REG_GAIN_TABLE_READ_DATA1, 0); /* Dummy Write to delay ~1u */ + ad9361_spi_write(spi, REG_GAIN_TABLE_CONFIG, 0); /* Stop Gain Table Clock */ + + st->current_table = band; + + ret = find_table_index(phy, rx1_gain); + if (ret < 0) + ret = phy->gt_info[band].max_index - 1; + + ad9361_spi_writef(spi, REG_RX1_MANUAL_LMT_FULL_GAIN, + RX_FULL_TBL_IDX_MASK, ret); /* Rx1 Full/LMT Gain Index */ + + ret = find_table_index(phy, rx2_gain); + if (ret < 0) + ret = phy->gt_info[band].max_index - 1; + + ad9361_spi_write(spi, REG_RX2_MANUAL_LMT_FULL_GAIN, ret); /* Rx2 Full/LMT Gain Index */ + + return 0; +} + static int set_split_table_gain(struct ad9361_rf_phy *phy, u32 idx_reg, struct rf_rx_gain *rx_gain) { @@ -3949,13 +3981,22 @@ static int ad9361_ensm_set_state(struct ad9361_rf_phy *phy, u8 ensm_state, if (!phy->pdata->fdd && !pinctrl && !phy->pdata->tdd_use_dual_synth && (ensm_state == ENSM_STATE_TX || ensm_state == ENSM_STATE_RX)) { + u32 reg, check; + + if (ensm_state == ENSM_STATE_TX) { + reg = REG_TX_CP_OVERRANGE_VCO_LOCK; + check = !(st->cached_synth_pd[0] & + TX_SYNTH_VCO_POWER_DOWN); + } else { + reg = REG_RX_CP_OVERRANGE_VCO_LOCK; + check = !(st->cached_synth_pd[1] & + RX_SYNTH_VCO_POWER_DOWN); + } + ad9361_spi_writef(phy->spi, REG_ENSM_CONFIG_2, TXNRX_SPI_CTRL, ensm_state == ENSM_STATE_TX); - - ad9361_check_cal_done(phy, (ensm_state == ENSM_STATE_TX) ? - REG_TX_CP_OVERRANGE_VCO_LOCK : - REG_RX_CP_OVERRANGE_VCO_LOCK, - VCO_LOCK, 1); + if (check) + ad9361_check_cal_done(phy, reg, VCO_LOCK, 1); } rc = ad9361_spi_write(spi, REG_ENSM_CONFIG_1, val); @@ -4349,7 +4390,8 @@ static int ad9361_set_ensm_mode(struct ad9361_rf_phy *phy, bool fdd, bool pinctr ad9361_spi_write(phy->spi, REG_ENSM_MODE, fdd ? FDD_MODE : 0); val = ad9361_spi_read(phy->spi, REG_ENSM_CONFIG_2); - val &= POWER_DOWN_RX_SYNTH | POWER_DOWN_TX_SYNTH; + val &= POWER_DOWN_RX_SYNTH | POWER_DOWN_TX_SYNTH | + RX_SYNTH_READY_MASK | TX_SYNTH_READY_MASK; if (fdd) ret = ad9361_spi_write(phy->spi, REG_ENSM_CONFIG_2, @@ -5618,8 +5660,8 @@ static int ad9361_validate_enable_fir(struct ad9361_rf_phy *phy) ad9361_dig_tune(phy, 0, RESTORE_DEFAULT); return ad9361_update_rf_bandwidth(phy, - valid ? st->filt_rx_bw_Hz : st->current_rx_bw_Hz, - valid ? st->filt_tx_bw_Hz : st->current_tx_bw_Hz); + (valid && st->filt_rx_bw_Hz) ? st->filt_rx_bw_Hz : st->current_rx_bw_Hz, + (valid && st->filt_tx_bw_Hz) ? st->filt_tx_bw_Hz : st->current_tx_bw_Hz); } static void ad9361_work_func(struct work_struct *work) @@ -7898,9 +7940,11 @@ static int ad9361_phy_read_avail(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_HARDWAREGAIN: if (chan->output) { - static const int tx_hw_gain[3] = {-89750, 250, 0}; + static const int tx_hw_gain[] = { + 89, -750000, 0, 250000, 0, 0 + }; *vals = tx_hw_gain; - *type = IIO_VAL_INT; + *type = IIO_VAL_INT_PLUS_MICRO; return IIO_AVAIL_RANGE; } else { st->rx_gain_avail[0] = phy->gt_info[ad9361_gt(phy)].abs_gain_tbl[0]; @@ -7925,6 +7969,9 @@ static int ad9361_phy_read_avail(struct iio_dev *indio_dev, else int_dec = st->tx_fir_int; + if (int_dec == 4) + max = MAX_TX_HB1 / 4; + st->tx_sampl_freq_avail[0] = MIN_ADC_CLK / (12 * int_dec); st->tx_sampl_freq_avail[1] = 1; st->tx_sampl_freq_avail[2] = max; @@ -7938,6 +7985,9 @@ static int ad9361_phy_read_avail(struct iio_dev *indio_dev, else int_dec = st->rx_fir_dec; + if (int_dec == 4) + max = MAX_RX_HB1 / 4; + st->rx_sampl_freq_avail[0] = MIN_ADC_CLK / (12 * int_dec); st->rx_sampl_freq_avail[1] = 1; st->rx_sampl_freq_avail[2] = max; @@ -8110,7 +8160,8 @@ static ssize_t ad9361_debugfs_write(struct file *file, { struct ad9361_debugfs_entry *entry = file->private_data; struct ad9361_rf_phy *phy = entry->phy; - u32 val, val2, val3, val4; + struct gpo_control *ctrl = &phy->pdata->gpo_ctrl; + u32 val, val2, val3, val4, mask; char buf[80]; int ret; @@ -8215,6 +8266,60 @@ static ssize_t ad9361_debugfs_write(struct file *file, entry->val = val; return count; case DBGFS_BIST_DT_ANALYSIS: + entry->val = val; + return count; + case DBGFS_GPO_SET: + if (ret != 2) + return -EINVAL; + + if (!ctrl->gpo_manual_mode_en) { + dev_warn(&phy->spi->dev, "GPO manual mode not enabled!"); + return -EINVAL; + } + + switch (val) { + case 0: + case 1: + case 2: + case 3: + mask = BIT(val); + if (val2) + val3 = mask; + else + val3 = 0; + break; + case 0xF: + mask = 0xF; + val3 = val2 & 0xF; + break; + default: + return -EINVAL; + } + + mutex_lock(&phy->indio_dev->mlock); + ctrl->gpo_manual_mode_enable_mask &= ~mask; + ctrl->gpo_manual_mode_enable_mask |= val3; + + ret = ad9361_spi_write(phy->spi, REG_GPO_FORCE_AND_INIT, + GPO_MANUAL_CTRL(ctrl->gpo_manual_mode_enable_mask) | + GPO_INIT_STATE(ctrl->gpo0_inactive_state_high_en | + (ctrl->gpo1_inactive_state_high_en << 1) | + (ctrl->gpo2_inactive_state_high_en << 2) | + (ctrl->gpo3_inactive_state_high_en << 3))); + + /* + * GPO manual mode conflicts with automatic ENSM slave + * and eLNA mode + */ + + val3 = ad9361_spi_read(phy->spi, REG_EXTERNAL_LNA_CTRL); + if (!(val3 & GPO_MANUAL_SELECT)) + ad9361_spi_write(phy->spi, REG_EXTERNAL_LNA_CTRL, + val3 | GPO_MANUAL_SELECT); + mutex_unlock(&phy->indio_dev->mlock); + if (ret < 0) + return ret; + entry->val = val; return count; default: @@ -8278,6 +8383,7 @@ static int ad9361_register_debugfs(struct iio_dev *indio_dev) ad9361_add_debugfs_entry(phy, "loopback", DBGFS_LOOPBACK); ad9361_add_debugfs_entry(phy, "bist_prbs", DBGFS_BIST_PRBS); ad9361_add_debugfs_entry(phy, "bist_tone", DBGFS_BIST_TONE); + ad9361_add_debugfs_entry(phy, "gpo_set", DBGFS_GPO_SET); ad9361_add_debugfs_entry(phy, "bist_timing_analysis", DBGFS_BIST_DT_ANALYSIS); ad9361_add_debugfs_entry(phy, "gaininfo_rx1", DBGFS_RXGAIN_1); @@ -9215,28 +9321,34 @@ ad9361_gt_bin_read(struct file *filp, struct kobject *kobj, struct iio_dev *indio_dev = dev_to_iio_dev(kobj_to_dev(kobj)); struct ad9361_rf_phy *phy = iio_priv(indio_dev); - int j, len = 0; + int ret, j, len = 0; + char *tab; - if (off) - return 0; + tab = kzalloc(bin_attr->size, GFP_KERNEL); + if (tab == NULL) + return -ENOMEM; - len += snprintf(buf + len, count - len, + len += snprintf(tab + len, bin_attr->size - len, "\n", 9361, phy->gt_info[ad9361_gt(phy)].split_table ? "SPLIT" : "FULL", 3, phy->gt_info[ad9361_gt(phy)].start, phy->gt_info[ad9361_gt(phy)].end); for (j = 0; j < phy->gt_info[ad9361_gt(phy)].max_index; j++) - len += snprintf(buf + len, count - len, + len += snprintf(tab + len, bin_attr->size - len, "%d, 0x%.2X, 0x%.2X, 0x%.2X\n", phy->gt_info[ad9361_gt(phy)].abs_gain_tbl[j], phy->gt_info[ad9361_gt(phy)].tab[j][0], phy->gt_info[ad9361_gt(phy)].tab[j][1], phy->gt_info[ad9361_gt(phy)].tab[j][2]); - len += snprintf(buf + len, count - len,"\n\n"); + len += snprintf(tab + len, bin_attr->size - len, "\n"); - return len; + ret = memory_read_from_buffer(buf, count, &off, tab, bin_attr->size); + + kfree(tab); + + return ret; } static int ad9361_probe(struct spi_device *spi) @@ -9351,7 +9463,7 @@ static int ad9361_probe(struct spi_device *spi) phy->bin_gt.attr.mode = S_IWUSR | S_IRUGO; phy->bin_gt.write = ad9361_gt_bin_write; phy->bin_gt.read = ad9361_gt_bin_read; - phy->bin_gt.size = 32768; + phy->bin_gt.size = 4096; indio_dev->dev.parent = &spi->dev; diff --git a/driver/ad9361/ad9361.h b/driver/ad9361/ad9361.h index a803b5c..bb07759 100644 --- a/driver/ad9361/ad9361.h +++ b/driver/ad9361/ad9361.h @@ -4,16 +4,14 @@ * Copyright 2013-2018 Analog Devices Inc. * * Modified by Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be + * * Licensed under the GPL-2. */ #ifndef IIO_FREQUENCY_AD9361_H_ #define IIO_FREQUENCY_AD9361_H_ -//#define IIO_AD9361_USE_PRIVATE_H_ - #include "ad9361_regs.h" -//#include "ad9361_private.h" enum ad9361_clocks { BB_REFCLK, @@ -51,6 +49,7 @@ enum debugfs_cmd { DBGFS_MCS, DBGFS_CAL_SW_CTRL, DBGFS_DIGITAL_TUNE, + DBGFS_GPO_SET, }; enum dig_tune_flags { @@ -172,7 +171,7 @@ struct ad9361_rf_phy { struct refclk_scale clk_priv[NUM_AD9361_CLKS]; struct clk_onecell_data clk_data; struct ad9361_phy_platform_data *pdata; - struct ad9361_debugfs_entry debugfs_entry[181]; + struct ad9361_debugfs_entry debugfs_entry[182]; struct bin_attribute bin; struct bin_attribute bin_gt; struct iio_dev *indio_dev; @@ -185,6 +184,7 @@ struct ad9361_rf_phy { struct ad9361_ext_band_ctl *ext_band_ctl; struct ad9361_rf_phy_state *state; }; + int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy, struct ctrl_outs_control *ctrl); int ad9361_clk_set_rate(struct clk *clk, unsigned long rate); int ad9361_rssi_setup(struct ad9361_rf_phy *phy, diff --git a/driver/ad9361/ad9361_conv.c b/driver/ad9361/ad9361_conv.c index e052b56..8848cf3 100644 --- a/driver/ad9361/ad9361_conv.c +++ b/driver/ad9361/ad9361_conv.c @@ -2,8 +2,6 @@ * AD9361 Agile RF Transceiver * * Copyright 2013-2017 Analog Devices Inc. - * - * Modified by Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be * * Licensed under the GPL-2. */ @@ -346,7 +344,7 @@ int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable) version = axiadc_read(st, 0x4000); /* Still there but implemented a bit different */ - if (PCORE_VERSION_MAJOR(version) > 7) + if (ADI_AXI_PCORE_VER_MAJOR(version) > 7) addr = 0x4418; else addr = 0x4414; @@ -354,10 +352,12 @@ int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable) for (chan = 0; chan < conv->chip_info->num_channels; chan++) { reg = axiadc_read(st, addr + (chan) * 0x40); - if (PCORE_VERSION_MAJOR(version) > 7) { - if (enable && reg != 0x8) { - conv->scratch_reg[chan] = reg; - reg = 0x8; + if (ADI_AXI_PCORE_VER_MAJOR(version) > 7) { + if (enable) { + if (reg != 0x8) { + conv->scratch_reg[chan] = reg; + reg = 0x8; + } } else if (reg == 0x8) { reg = conv->scratch_reg[chan]; } @@ -379,7 +379,7 @@ static int ad9361_iodelay_set(struct axiadc_state *st, unsigned lane, unsigned val, bool tx) { if (tx) { - if (PCORE_VERSION_MAJOR(st->pcore_version) > 8) + if (ADI_AXI_PCORE_VER_MAJOR(st->pcore_version) > 8) axiadc_write(st, 0x4000 + ADI_REG_DELAY(lane), val); else return -ENODEV; @@ -463,7 +463,8 @@ static int ad9361_dig_tune_delay(struct ad9361_rf_phy *phy, unsigned long max_freq, enum dig_tune_flags flags, bool tx) { - static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U}; + //static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U}; //some low end FPGA, such as z7020, lvds ADC interface seems not stable enough to support 61.44Msps + static const unsigned int rates[3] = {25000000U, 40000000U, 40000000U}; struct axiadc_converter *conv = spi_get_drvdata(phy->spi); unsigned int s0, s1, c0, c1; unsigned int i, j, r; @@ -565,7 +566,7 @@ static int ad9361_dig_tune_tx(struct ad9361_rf_phy *phy, unsigned long max_freq, ADI_ENABLE | ADI_IQCOR_ENB); axiadc_set_pnsel(st, chan, ADC_PN_CUSTOM); saved_chan_ctrl6[chan] = axiadc_read(st, 0x4414 + (chan) * 0x40); - if (PCORE_VERSION_MAJOR(hdl_dac_version) > 7) { + if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) { saved_dsel[chan] = axiadc_read(st, 0x4418 + (chan) * 0x40); axiadc_write(st, 0x4418 + (chan) * 0x40, 9); axiadc_write(st, 0x4414 + (chan) * 0x40, 0); /* !IQCOR_ENB */ @@ -574,7 +575,7 @@ static int ad9361_dig_tune_tx(struct ad9361_rf_phy *phy, unsigned long max_freq, axiadc_write(st, 0x4414 + (chan) * 0x40, 1); /* DAC_PN_ENB */ } } - if (PCORE_VERSION_MAJOR(hdl_dac_version) < 8) { + if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8) { saved = tmp = axiadc_read(st, 0x4048); tmp &= ~0xF; tmp |= 1; @@ -585,14 +586,14 @@ static int ad9361_dig_tune_tx(struct ad9361_rf_phy *phy, unsigned long max_freq, if (flags & DO_ODELAY) ad9361_dig_tune_iodelay(phy, true); - if (PCORE_VERSION_MAJOR(hdl_dac_version) < 8) + if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8) axiadc_write(st, 0x4048, saved); for (chan = 0; chan < num_chan; chan++) { axiadc_write(st, ADI_REG_CHAN_CNTRL(chan), saved_chan_ctrl0[chan]); axiadc_set_pnsel(st, chan, ADC_PN9); - if (PCORE_VERSION_MAJOR(hdl_dac_version) > 7) { + if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) { axiadc_write(st, 0x4418 + chan * 0x40, saved_dsel[chan]); axiadc_write(st, 0x4044, 1); @@ -711,13 +712,13 @@ static int ad9361_post_setup(struct iio_dev *indio_dev) flags = 0; - ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_REG_ID)) ? + ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ? 0 : 61440000, flags); if (ret < 0) goto error; if (flags & (DO_IDELAY | DO_ODELAY)) { - ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_REG_ID)) ? + ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ? 0 : 61440000, flags & BE_VERBOSE); if (ret < 0) goto error; diff --git a/driver/ad9361/ad9361_private.h b/driver/ad9361/ad9361_private.h index 6f35e47..d63c17f 100644 --- a/driver/ad9361/ad9361_private.h +++ b/driver/ad9361/ad9361_private.h @@ -180,6 +180,25 @@ struct auxdac_control { u8 dac2_tx_delay_us; }; +#if 0 +enum rssi_restart_mode { + AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN, + EN_AGC_PIN_IS_PULLED_HIGH, + ENTERS_RX_MODE, + GAIN_CHANGE_OCCURS, + SPI_WRITE_TO_REGISTER, + GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH, +}; + +struct rssi_control { + enum rssi_restart_mode restart_mode; + bool rssi_unit_is_rx_samples; /* default unit is time */ + u32 rssi_delay; + u32 rssi_wait; + u32 rssi_duration; +}; +#endif + struct rx_gain_info { enum rx_gain_table_type tbl_type; int starting_gain_db; @@ -377,6 +396,15 @@ struct rf_rx_gain { u32 mixer_index; /* MIXER Index (Split GT mode only) */ }; +#if 0 +struct rf_rssi { + u32 ant; /* Antenna number for which RSSI is reported */ + u32 symbol; /* Runtime RSSI */ + u32 preamble; /* Initial RSSI */ + s32 multiplier; /* Multiplier to convert reported RSSI */ + u8 duration; /* Duration to be considered for measuring */ +}; +#endif struct SynthLUT { u16 VCO_MHz; diff --git a/driver/ad9361/ad9361_regs.h b/driver/ad9361/ad9361_regs.h index 220e1ea..6c01098 100644 --- a/driver/ad9361/ad9361_regs.h +++ b/driver/ad9361/ad9361_regs.h @@ -2,8 +2,6 @@ * AD9361 * * Copyright 2013-2018 Analog Devices Inc. - * - * Modified by Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be * * Licensed under the GPL-2. */ @@ -2795,17 +2793,16 @@ */ #define MIN_ADC_CLK 25000000UL /* 25 MHz */ -//#define MIN_ADC_CLK (MIN_BBPLL_FREQ / MAX_BBPLL_DIV) /* 11.17MHz */ #define MAX_ADC_CLK 640000000UL /* 640 MHz */ #define MAX_DAC_CLK (MAX_ADC_CLK / 2) /* Associated with outputs of stage */ -#define MAX_RX_HB1 245760000UL -#define MAX_RX_HB2 320000000UL -#define MAX_RX_HB3 640000000UL +#define MAX_RX_HB1 122880000UL +#define MAX_RX_HB2 245760000UL +#define MAX_RX_HB3 320000000UL /* Associated with inputs of stage */ -#define MAX_TX_HB1 160000000UL -#define MAX_TX_HB2 320000000UL +#define MAX_TX_HB1 122880000UL +#define MAX_TX_HB2 245760000UL #define MAX_TX_HB3 320000000UL #define MAX_BASEBAND_RATE 61440000UL @@ -2829,4 +2826,6 @@ #define MAX_GAIN_TABLE_SIZE 90 #define MAX_NUM_GAIN_TABLES 16 /* randomly picked */ +#define MAX_TX_ATTENUATION_DB 89750 + #endif diff --git a/driver/ad9361/cf_axi_adc.h b/driver/ad9361/cf_axi_adc.h index a8401fe..d3553fd 100644 --- a/driver/ad9361/cf_axi_adc.h +++ b/driver/ad9361/cf_axi_adc.h @@ -6,26 +6,12 @@ * Licensed under the GPL-2. * * http://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467 - * - * Modified by Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be - * */ #ifndef ADI_AXI_ADC_H_ #define ADI_AXI_ADC_H_ -#define ADI_REG_VERSION 0x0000 /*Version and Scratch Registers */ -#define ADI_VERSION(x) (((x) & 0xffffffff) << 0) /* RO, Version number. */ -#define VERSION_IS(x,y,z) ((x) << 16 | (y) << 8 | (z)) -#define ADI_REG_ID 0x0004 /*Version and Scratch Registers */ -#define ADI_ID(x) (((x) & 0xffffffff) << 0) /* RO, Instance identifier number. */ -#define ADI_REG_SCRATCH 0x0008 /*Version and Scratch Registers */ -#define ADI_SCRATCH(x) (((x) & 0xffffffff) << 0) /* RW, Scratch register. */ - -#define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter) -#define PCORE_VERSION_MAJOR(version) (version >> 16) -#define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff) -#define PCORE_VERSION_LETTER(version) (version & 0xff) +#include /* ADC COMMON */ @@ -205,6 +191,7 @@ struct axiadc_state { struct device *dev_spi; struct iio_info iio_info; struct clk *clk; + struct gpio_desc *gpio_decimation; size_t regs_size; void __iomem *regs; void __iomem *slave_regs; @@ -214,9 +201,11 @@ struct axiadc_state { unsigned id; unsigned pcore_version; unsigned decimation_factor; + unsigned int oversampling_ratio; bool dp_disable; unsigned long long adc_clk; unsigned have_slave_channels; + bool additional_channel; struct iio_hw_consumer *frontend; @@ -239,6 +228,7 @@ struct axiadc_converter { unsigned long adc_clk; const struct axiadc_chip_info *chip_info; + struct delayed_work watchdog_work; bool sample_rate_read_only; int (*reg_access)(struct iio_dev *indio_dev, unsigned int reg, @@ -289,6 +279,7 @@ struct axiadc_converter { int state); int (*post_setup)(struct iio_dev *indio_dev); + int (*post_iio_register)(struct iio_dev *indio_dev); int (*set_pnsel)(struct iio_dev *indio_dev, unsigned chan, enum adc_pn_sel sel); }; @@ -338,7 +329,7 @@ static inline unsigned int axiadc_slave_read(struct axiadc_state *st, unsigned r static inline void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val) { - if (PCORE_VERSION_MAJOR(st->pcore_version) > 8) { + if (ADI_AXI_PCORE_VER_MAJOR(st->pcore_version) > 8) { axiadc_write(st, ADI_REG_DELAY(lane), val); } else { axiadc_write(st, ADI_REG_DELAY_CNTRL, 0); diff --git a/driver/hw_def.h b/driver/hw_def.h index 19a715e..91c03af 100644 --- a/driver/hw_def.h +++ b/driver/hw_def.h @@ -26,7 +26,7 @@ const char *tx_intf_compatible_str = "sdr,tx_intf"; #define TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_ADDR (8*4) #define TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_ADDR (9*4) #define TX_INTF_REG_CFG_DATA_TO_ANT_ADDR (10*4) -#define TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL1_ADDR (12*4) +#define TX_INTF_REG_TX_HOLD_THRESHOLD_ADDR (12*4) #define TX_INTF_REG_BB_GAIN_ADDR (13*4) #define TX_INTF_REG_INTERRUPT_SEL_ADDR (14*4) #define TX_INTF_REG_ANT_SEL_ADDR (16*4) @@ -68,6 +68,7 @@ struct tx_intf_driver_api { u32 (*TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_read)(void); u32 (*TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_read)(void); u32 (*TX_INTF_REG_CFG_DATA_TO_ANT_read)(void); + u32 (*TX_INTF_REG_TX_HOLD_THRESHOLD_read)(void); u32 (*TX_INTF_REG_INTERRUPT_SEL_read)(void); u32 (*TX_INTF_REG_BB_GAIN_read)(void); u32 (*TX_INTF_REG_ANT_SEL_read)(void); @@ -86,6 +87,7 @@ struct tx_intf_driver_api { void (*TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write)(u32 value); void (*TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write)(u32 value); void (*TX_INTF_REG_CFG_DATA_TO_ANT_write)(u32 value); + void (*TX_INTF_REG_TX_HOLD_THRESHOLD_write)(u32 value); void (*TX_INTF_REG_INTERRUPT_SEL_write)(u32 value); void (*TX_INTF_REG_BB_GAIN_write)(u32 value); void (*TX_INTF_REG_ANT_SEL_write)(u32 value); diff --git a/driver/make_all.sh b/driver/make_all.sh index c752966..3085958 100755 --- a/driver/make_all.sh +++ b/driver/make_all.sh @@ -1,11 +1,12 @@ #!/bin/bash -if [ "$#" -ne 2 ]; then - echo "You must enter exactly 2 arguments: \$OPENWIFI_DIR \$XILINX_DIR" +if [ "$#" -ne 3 ]; then + echo "You must enter exactly 3 arguments: \$OPENWIFI_DIR \$XILINX_DIR ARCH_BIT(32 or 64)" exit 1 fi OPENWIFI_DIR=$1 XILINX_DIR=$2 +ARCH_OPTION=$3 if [ -f "$OPENWIFI_DIR/LICENSE" ]; then echo "\$OPENWIFI_DIR is found!" @@ -21,47 +22,51 @@ else exit 1 fi -adi_lnx_dir=$OPENWIFI_DIR/adi-linux/ -xilinx_sdk_dir=$XILINX_DIR/SDK/2017.4/ - -# check if user entered the right path to SDK -if [ -d "$xilinx_sdk_dir" ]; then - echo " setup sdk path ${xilinx_sdk_dir}" - tmp=/settings64.sh - sdk_setting="$xilinx_sdk_dir$tmp" - source ${sdk_setting} +if [ "$ARCH_OPTION" != "32" ] && [ "$ARCH_OPTION" != "64" ]; then + echo "\$ARCH_OPTION is not correct. Should be 32 or 64. Please check!" + exit 1 else - echo "Error: sdk: ${xilinx_sdk_dir} not found. Can not continue." - exit 1 + echo "\$ARCH_OPTION is valid!" +fi + +source $XILINX_DIR/SDK/2018.3/settings64.sh +if [ "$ARCH_OPTION" == "64" ]; then + LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux-64/ + ARCH="arm64" + CROSS_COMPILE="aarch64-linux-gnu-" +else + LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux/ + ARCH="arm" + CROSS_COMPILE="arm-linux-gnueabihf-" fi # check if user entered the right path to analog device linux -if [ -d "$adi_lnx_dir" ]; then - echo " setup linux kernel path ${adi_lnx_dir}" +if [ -d "$LINUX_KERNEL_SRC_DIR" ]; then + echo " setup linux kernel path ${LINUX_KERNEL_SRC_DIR}" else - echo "Error: path to adi linux: ${adi_lnx_dir} not found. Can not continue." - exit 1 + echo "Error: path to adi linux: ${LINUX_KERNEL_SRC_DIR} not found. Can not continue." + exit 1 fi +set -x + home_dir=$(pwd) -#source ~/Xilinx/SDK/2017.4/settings64.sh -#set -x cd $OPENWIFI_DIR/driver/ -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/openofdm_tx -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/openofdm_rx -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/tx_intf -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/rx_intf -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/xpu -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/ad9361 -make KDIR=$adi_lnx_dir +make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE cd $OPENWIFI_DIR/driver/xilinx_dma -./make_xilinx_dma.sh $adi_lnx_dir $sdk_setting +./make_xilinx_dma.sh $OPENWIFI_DIR $XILINX_DIR $ARCH_OPTION cd $home_dir diff --git a/driver/openofdm_rx/Makefile b/driver/openofdm_rx/Makefile index 3945d9f..2689941 100644 --- a/driver/openofdm_rx/Makefile +++ b/driver/openofdm_rx/Makefile @@ -3,7 +3,8 @@ obj-m += openofdm_rx.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/openofdm_tx/Makefile b/driver/openofdm_tx/Makefile index 144a9c7..d94aa01 100644 --- a/driver/openofdm_tx/Makefile +++ b/driver/openofdm_tx/Makefile @@ -3,7 +3,8 @@ obj-m += openofdm_tx.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/rx_intf/Makefile b/driver/rx_intf/Makefile index 3473495..4028599 100644 --- a/driver/rx_intf/Makefile +++ b/driver/rx_intf/Makefile @@ -3,7 +3,8 @@ obj-m += rx_intf.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/rx_intf/rx_intf.c b/driver/rx_intf/rx_intf.c index 11c2fe6..a4fd920 100644 --- a/driver/rx_intf/rx_intf.c +++ b/driver/rx_intf/rx_intf.c @@ -268,7 +268,7 @@ static inline u32 hw_init(enum rx_intf_mode mode, u32 num_dma_symbol_to_pl, u32 } if (mode!=RX_INTF_AXIS_LOOP_BACK) { - rx_intf_api->RX_INTF_REG_MIXER_CFG_write(mixer_cfg); + // rx_intf_api->RX_INTF_REG_MIXER_CFG_write(mixer_cfg); --now rx doesn't have mixer anymore // 0x000202F6 for: wifi ant0: -10MHz; wifi ant1: +10MHz; zigbee 4 ch ant0: -2, -7, -12, -17MHz; zigbee 4 ch ant1: +3, +8, +13, +18MHz // 0x0001F602 for: wifi ant0: +10MHz; wifi ant1: -10MHz; zigbee 4 ch ant0: +3, +8, +13, +18MHz; zigbee 4 ch ant1: -2, -7, -12, -17MHz // 0x0001F206 for: wifi ant0: -10MHz; wifi ant1: +10MHz; zigbee 4 ch ant0: +3, +8, +13, +18MHz; zigbee 4 ch ant1: -2, -7, -12, -17MHz @@ -296,9 +296,7 @@ static inline u32 hw_init(enum rx_intf_mode mode, u32 num_dma_symbol_to_pl, u32 // 0-bw20-ch0; 1-bw2-ch0; 2-bw2-ch2; 3-bw2-ch4; 4-bw2-ch6; 5-s_axis-ch0 // 8-bw20-ch1; 9-bw2-ch1; 10-bw2-ch3; 11-bw2-ch5; 12-bw2-ch7; 13-s_axis-ch1 - //rx_intf_api->RX_INTF_REG_S2MM_INTR_DELAY_COUNT_write(1000|0x80000000); //0x80000000 to enable tsft and rssi gpio test magic value - //rx_intf_api->RX_INTF_REG_S2MM_INTR_DELAY_COUNT_write(200*10); //0x80000000 to enable tsft and rssi gpio test magic value - rx_intf_api->RX_INTF_REG_S2MM_INTR_DELAY_COUNT_write(30*200); // delayed interrupt + rx_intf_api->RX_INTF_REG_S2MM_INTR_DELAY_COUNT_write(30*10); // delayed interrupt, counter clock 10MHz is assumed rx_intf_api->RX_INTF_REG_IQ_CTRL_write(0); rx_intf_api->RX_INTF_REG_START_TRANS_TO_PS_MODE_write(0x10025); //now bit 5 should be 1 to let pl_to_m_axis_intf decide num_dma_symbol_to_ps automatically diff --git a/driver/sdr.c b/driver/sdr.c index 6fd2cd7..a3787bf 100644 --- a/driver/sdr.c +++ b/driver/sdr.c @@ -156,10 +156,10 @@ static void ad9361_rf_set_channel(struct ieee80211_hw *dev, priv->band = BAND_2_4GHZ; xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); } - // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*200)<<16) | 200 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! - // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*200)<<16) | 200 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this + // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! + // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); - // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*200)<<16); + // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); } else { //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) @@ -168,11 +168,11 @@ static void ad9361_rf_set_channel(struct ieee80211_hw *dev, priv->band = BAND_5_8GHZ; xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); } - // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*200)<<16) | 200 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! - // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*200)<<16) | 200 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this - // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 1200 ); - // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 1000 );// for longer fir we need this delay 1us shorter - // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*200)<<16); + // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! + // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this + // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); + // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter + // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); } //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); // //-- use less @@ -261,7 +261,7 @@ static void openwifi_free_tx_ring(struct openwifi_priv *priv) // dev_kfree_skb(ring->bds[i].skb_linked); if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) - printk("%s openwifi_free_tx_ring: WARNING %d skb_linked %08x dma_mapping_addr %08x\n", sdr_compatible_str, i, (u32)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); + printk("%s openwifi_free_tx_ring: WARNING %d skb_linked %p dma_mapping_addr %08llx\n", sdr_compatible_str, i, (void*)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); ring->bds[i].skb_linked=0; ring->bds[i].dma_mapping_addr = 0; @@ -298,7 +298,7 @@ static int rx_dma_setup(struct ieee80211_hw *dev){ priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); if (!(priv->rxd)) { openwifi_free_rx_ring(priv); - printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %d\n", sdr_compatible_str, (u32)(priv->rxd)); + printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); return(-1); } priv->rxd->callback = 0; @@ -518,7 +518,7 @@ static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) //ring_len = (just_wr_idx>=current_rd_idx)?(just_wr_idx-current_rd_idx):(just_wr_idx+NUM_TX_BD-current_rd_idx); ring_len = ((just_wr_idx-current_rd_idx)&(NUM_TX_BD-1)); ring_room_left = NUM_TX_BD - ring_len; - if (ring_room_left > 2 && priv->tx_queue_stopped) { + if (ring_room_left > RING_ROOM_THRESHOLD && priv->tx_queue_stopped) { unsigned int prio = skb_get_queue_mapping(skb); ieee80211_wake_queue(dev, prio); printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue. ring_room_left %d prio %d curr rd %d just wr %d\n", sdr_compatible_str,ring_room_left,prio,current_rd_idx,just_wr_idx); @@ -709,6 +709,7 @@ static void openwifi_tx(struct ieee80211_hw *dev, sc,info->flags,retry_limit_raw,pkt_need_ack,queue_idx,priv->phy_tx_sn, use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, ring->bd_wr_idx,ring->bd_rd_idx); + // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, @@ -779,11 +780,11 @@ static void openwifi_tx(struct ieee80211_hw *dev, //ring_len = (ring->bd_wr_idx>=ring->bd_rd_idx)?(ring->bd_wr_idx-ring->bd_rd_idx):(ring->bd_wr_idx+NUM_TX_BD-ring->bd_rd_idx); ring_len = ((ring->bd_wr_idx-ring->bd_rd_idx)&(NUM_TX_BD-1)); ring_room_left = NUM_TX_BD - ring_len; - if (ring_len>28) + if (ring_room_left < RING_ROOM_THRESHOLD) printk("%s openwifi_tx: WARNING ring len %d\n", sdr_compatible_str,ring_len); // printk("%s openwifi_tx: WARNING ring len %d HW fifo %d q %d\n", sdr_compatible_str,ring_len,tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_DATA_COUNT_read()&0xFFFF, ((tx_intf_api->TX_INTF_REG_PHY_QUEUE_TX_SN_read())>>16)&0xFF ); - if (ring_room_left <= 2 && priv->tx_queue_stopped == false) { + if (ring_room_left <= RING_ROOM_THRESHOLD && priv->tx_queue_stopped == false) { ieee80211_stop_queue(dev, prio); printk("%s openwifi_tx: WARNING ieee80211_stop_queue. ring_room_left %d!\n", sdr_compatible_str,ring_room_left); priv->tx_queue_stopped = true; @@ -822,7 +823,7 @@ static void openwifi_tx(struct ieee80211_hw *dev, tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); if (!(priv->txd)) { - printk("%s openwifi_tx: WARNING device_prep_slave_sg %d\n", sdr_compatible_str, (u32)(priv->txd)); + printk("%s openwifi_tx: WARNING device_prep_slave_sg %p\n", sdr_compatible_str, (void*)(priv->txd)); goto openwifi_tx_after_dma_mapping; } @@ -926,17 +927,17 @@ static int openwifi_start(struct ieee80211_hw *dev) // // xpu_api->XPU_REG_CSMA_CFG_write(3); // cw_min // xpu_api->XPU_REG_CSMA_CFG_write(3); - //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((1030-238)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) - //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((1030)<<16)|0 );//now our tx send out I/Q immediately - xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((1030+450)<<16)|(0+450) );//we have more time when we use FIR in AD9361 + //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) + //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately + xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 - xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (((45+2+2)*200 + 300)<<16) | 200 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) - xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2+2)*200 + 300)<<16) | 200 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) + xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) + xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) - tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*200)<<16)|(10*200) );//high 16bit 5GHz; low 16 bit 2.4GHz + tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed - //xpu_api->XPU_REG_BB_RF_DELAY_write(1020); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*200=810 - xpu_api->XPU_REG_BB_RF_DELAY_write(975);//add .5us for slightly longer fir + //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 + xpu_api->XPU_REG_BB_RF_DELAY_write(49);//add .5us for slightly longer fir xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); xpu_api->XPU_REG_SLICE_COUNT_TOTAL0_write(50000-1); // total 50ms. @@ -1736,12 +1737,18 @@ static int openwifi_dev_probe(struct platform_device *pdev) // //-------------find ad9361-phy driver for lo/channel control--------------- priv->actual_rx_lo = 0; tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); - if (!tmp_dev) { + if (tmp_dev == NULL) { printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); err = -ENOMEM; goto err_free_dev; } - printk("%s bus_find_device ad9361-phy: %s\n", sdr_compatible_str, tmp_dev->init_name); + printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); + if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { + printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); + err = -ENOMEM; + goto err_free_dev; + } + priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); if (!(priv->ad9361_phy)) { printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); @@ -2043,7 +2050,7 @@ static int openwifi_dev_remove(struct platform_device *pdev) struct ieee80211_hw *dev = platform_get_drvdata(pdev); if (!dev) { - pr_info("%s openwifi_dev_remove: dev %d\n", sdr_compatible_str, (u32)dev); + pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); return(-1); } diff --git a/driver/sdr.h b/driver/sdr.h index 18c6591..fa9abb1 100644 --- a/driver/sdr.h +++ b/driver/sdr.h @@ -71,6 +71,7 @@ union u16_byte2 { #define LEN_PHY_HEADER 16 #define LEN_PHY_CRC 4 +#define RING_ROOM_THRESHOLD 4 #define NUM_TX_BD 32 #define NUM_RX_BD 16 #define TX_BD_BUF_SIZE (8192) @@ -251,6 +252,35 @@ static const u16 wifi_n_dbps_table[16] = {24, 24, 24, 24, 24, 36, 48, // static const u8 wifi_mcs_table[8] = {6,9,12,18,24,36,48,54}; // static const u8 wifi_mcs_table_phy_tx[8] = {11,15,10,14,9,13,8,12}; +// ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c ===== +struct cf_axi_dds_state { + struct device *dev_spi; + struct clk *clk; + struct cf_axi_dds_chip_info *chip_info; + struct gpio_desc *plddrbypass_gpio; + struct gpio_desc *interpolation_gpio; + + bool standalone; + bool dp_disable; + bool enable; + bool pl_dma_fifo_en; + enum fifo_ctrl gpio_dma_fifo_ctrl; + + struct iio_info iio_info; + size_t regs_size; + void __iomem *regs; + void __iomem *slave_regs; + void __iomem *master_regs; + u64 dac_clk; + unsigned int ddr_dds_interp_en; + unsigned int cached_freq[16]; + unsigned int version; + unsigned int have_slave_channels; + unsigned int interpolation_factor; + struct notifier_block clk_nb; +}; +// ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c ===== + #define RX_DMA_CYCLIC_MODE struct openwifi_priv { struct platform_device *pdev; diff --git a/driver/tx_intf/Makefile b/driver/tx_intf/Makefile index 5635018..4a0a81c 100644 --- a/driver/tx_intf/Makefile +++ b/driver/tx_intf/Makefile @@ -3,7 +3,8 @@ obj-m += tx_intf.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/tx_intf/tx_intf.c b/driver/tx_intf/tx_intf.c index 5e04340..cbc37ab 100644 --- a/driver/tx_intf/tx_intf.c +++ b/driver/tx_intf/tx_intf.c @@ -78,6 +78,10 @@ static inline u32 TX_INTF_REG_CFG_DATA_TO_ANT_read(void){ return reg_read(TX_INTF_REG_CFG_DATA_TO_ANT_ADDR); } +static inline u32 TX_INTF_REG_TX_HOLD_THRESHOLD_read(void){ + return reg_read(TX_INTF_REG_TX_HOLD_THRESHOLD_ADDR); +} + static inline u32 TX_INTF_REG_INTERRUPT_SEL_read(void){ return reg_read(TX_INTF_REG_INTERRUPT_SEL_ADDR); } @@ -148,6 +152,10 @@ static inline void TX_INTF_REG_CFG_DATA_TO_ANT_write(u32 value){ reg_write(TX_INTF_REG_CFG_DATA_TO_ANT_ADDR, value); } +static inline void TX_INTF_REG_TX_HOLD_THRESHOLD_write(u32 value){ + reg_write(TX_INTF_REG_TX_HOLD_THRESHOLD_ADDR, value); +} + static inline void TX_INTF_REG_INTERRUPT_SEL_write(u32 value){ reg_write(TX_INTF_REG_INTERRUPT_SEL_ADDR, value); } @@ -257,11 +265,12 @@ static inline u32 hw_init(enum tx_intf_mode mode, u32 num_dma_symbol_to_pl, u32 tx_intf_api->TX_INTF_REG_MULTI_RST_write(0); tx_intf_api->TX_INTF_REG_IQ_SRC_SEL_write(duc_input_ch_sel); tx_intf_api->TX_INTF_REG_START_TRANS_TO_PS_MODE_write(2); - tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*200)<<16)|(10*200) );//high 16bit 5GHz; low 16 bit 2.4GHz + tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(num_dma_symbol_to_pl); tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write(num_dma_symbol_to_ps); tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write(0); + tx_intf_api->TX_INTF_REG_TX_HOLD_THRESHOLD_write(420); tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x40); //.src_sel0(slv_reg14[2:0]), .src_sel1(slv_reg14[6:4]), 0-s00_axis_tlast,1-ap_start,2-tx_start_from_acc,3-tx_end_from_acc,4-xpu signal tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30040); //disable interrupt tx_intf_api->TX_INTF_REG_BB_GAIN_write(100); @@ -316,6 +325,7 @@ static int dev_probe(struct platform_device *pdev) tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_read=TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_read; tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_read=TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_read; tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_read=TX_INTF_REG_CFG_DATA_TO_ANT_read; + tx_intf_api->TX_INTF_REG_TX_HOLD_THRESHOLD_read=TX_INTF_REG_TX_HOLD_THRESHOLD_read; tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_read=TX_INTF_REG_INTERRUPT_SEL_read; tx_intf_api->TX_INTF_REG_BB_GAIN_read=TX_INTF_REG_BB_GAIN_read; tx_intf_api->TX_INTF_REG_ANT_SEL_read=TX_INTF_REG_ANT_SEL_read; @@ -334,6 +344,7 @@ static int dev_probe(struct platform_device *pdev) tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write=TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write; tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write=TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write; tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write=TX_INTF_REG_CFG_DATA_TO_ANT_write; + tx_intf_api->TX_INTF_REG_TX_HOLD_THRESHOLD_write=TX_INTF_REG_TX_HOLD_THRESHOLD_write; tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write=TX_INTF_REG_INTERRUPT_SEL_write; tx_intf_api->TX_INTF_REG_BB_GAIN_write=TX_INTF_REG_BB_GAIN_write; tx_intf_api->TX_INTF_REG_ANT_SEL_write=TX_INTF_REG_ANT_SEL_write; @@ -346,10 +357,10 @@ static int dev_probe(struct platform_device *pdev) if (IS_ERR(base_addr)) return PTR_ERR(base_addr); - printk("%s dev_probe io start 0x%08x end 0x%08x name %s flags 0x%08x desc 0x%08x\n", tx_intf_compatible_str,io->start,io->end,io->name,(u32)io->flags,(u32)io->desc); - printk("%s dev_probe base_addr 0x%08x\n", tx_intf_compatible_str,(u32)base_addr); - printk("%s dev_probe tx_intf_driver_api_inst 0x%08x\n", tx_intf_compatible_str, (u32)(&tx_intf_driver_api_inst) ); - printk("%s dev_probe tx_intf_api 0x%08x\n", tx_intf_compatible_str, (u32)tx_intf_api); + printk("%s dev_probe io start 0x%08llx end 0x%08llx name %s flags 0x%08x desc 0x%08x\n", tx_intf_compatible_str,io->start,io->end,io->name,(u32)io->flags,(u32)io->desc); + printk("%s dev_probe base_addr 0x%p\n", tx_intf_compatible_str,(void*)base_addr); + printk("%s dev_probe tx_intf_driver_api_inst 0x%p\n", tx_intf_compatible_str, (void*)(&tx_intf_driver_api_inst) ); + printk("%s dev_probe tx_intf_api 0x%p\n", tx_intf_compatible_str, (void*)tx_intf_api); printk("%s dev_probe succeed!\n", tx_intf_compatible_str); @@ -364,9 +375,9 @@ static int dev_remove(struct platform_device *pdev) { printk("\n"); - printk("%s dev_remove base_addr 0x%08x\n", tx_intf_compatible_str,(u32)base_addr); - printk("%s dev_remove tx_intf_driver_api_inst 0x%08x\n", tx_intf_compatible_str, (u32)(&tx_intf_driver_api_inst) ); - printk("%s dev_remove tx_intf_api 0x%08x\n", tx_intf_compatible_str, (u32)tx_intf_api); + printk("%s dev_remove base_addr 0x%p\n", tx_intf_compatible_str,(void*)base_addr); + printk("%s dev_remove tx_intf_driver_api_inst 0x%p\n", tx_intf_compatible_str, (void*)(&tx_intf_driver_api_inst) ); + printk("%s dev_remove tx_intf_api 0x%p\n", tx_intf_compatible_str, (void*)tx_intf_api); printk("%s dev_remove succeed!\n", tx_intf_compatible_str); return 0; diff --git a/driver/xilinx_dma/make_xilinx_dma.sh b/driver/xilinx_dma/make_xilinx_dma.sh index d2c4ef6..65d097b 100755 --- a/driver/xilinx_dma/make_xilinx_dma.sh +++ b/driver/xilinx_dma/make_xilinx_dma.sh @@ -1,17 +1,55 @@ #!/bin/bash -set -x +if [ "$#" -ne 3 ]; then + echo "You must enter exactly 3 arguments: \$OPENWIFI_DIR \$XILINX_DIR \$ARCH(32 or 64)" + exit 1 +fi WORKDIR=$PWD -KDIR=$1 +OPENWIFI_DIR=$1 +XILINX_DIR=$2 +ARCH_OPTION=$3 + +set -x + +if [ -f "$OPENWIFI_DIR/LICENSE" ]; then + echo "\$OPENWIFI_DIR is found!" +else + echo "\$OPENWIFI_DIR is not correct. Please check!" + exit 1 +fi + +if [ -d "$XILINX_DIR/SDK" ]; then + echo "\$XILINX_DIR is found!" +else + echo "\$XILINX_DIR is not correct. Please check!" + exit 1 +fi + +if [ "$ARCH_OPTION" != "32" ] && [ "$ARCH_OPTION" != "64" ]; then + echo "\$ARCH_OPTION is not correct. Should be 32 or 64. Please check!" + exit 1 +else + echo "\$ARCH_OPTION is valid!" +fi + +source $XILINX_DIR/SDK/2018.3/settings64.sh +if [ "$ARCH_OPTION" == "64" ]; then + KDIR=$OPENWIFI_DIR/adi-linux-64/ + export ARCH=arm64 + export CROSS_COMPILE=aarch64-linux-gnu- +else + KDIR=$OPENWIFI_DIR/adi-linux/ + export ARCH=arm + export CROSS_COMPILE=arm-linux-gnueabihf- +fi + SUBMODULE=xilinx_dma -source $2 -export ARCH=arm -export CROSS_COMPILE=arm-linux-gnueabihf- - +cp $KDIR/drivers/dma/xilinx/xilinx_dma.c $KDIR/drivers/dma/xilinx/xilinx_dma.c.bak cp xilinx_dma.c $KDIR/drivers/dma/xilinx -rf cd $KDIR make $KDIR/drivers/dma/xilinx/$SUBMODULE.ko cp $KDIR/drivers/dma/xilinx/$SUBMODULE.ko $WORKDIR -rf +# cp $KDIR/drivers/dma/xilinx/xilinx_dma.c.bak $KDIR/drivers/dma/xilinx/xilinx_dma.c cd $WORKDIR ls $SUBMODULE.ko diff --git a/driver/xilinx_dma/xilinx_dma.c b/driver/xilinx_dma/xilinx_dma.c index 3dd2955..7c88955 100644 --- a/driver/xilinx_dma/xilinx_dma.c +++ b/driver/xilinx_dma/xilinx_dma.c @@ -74,9 +74,6 @@ #define XILINX_DMA_DMACR_CIRC_EN BIT(1) #define XILINX_DMA_DMACR_RUNSTOP BIT(0) #define XILINX_DMA_DMACR_FSYNCSRC_MASK GENMASK(6, 5) -#define XILINX_DMA_DMACR_DELAY_MASK GENMASK(31, 24) -#define XILINX_DMA_DMACR_FRAME_COUNT_MASK GENMASK(23, 16) -#define XILINX_DMA_DMACR_MASTER_MASK GENMASK(11, 8) #define XILINX_DMA_REG_DMASR 0x0004 #define XILINX_DMA_DMASR_EOL_LATE_ERR BIT(15) @@ -124,7 +121,7 @@ #define XILINX_VDMA_ENABLE_VERTICAL_FLIP BIT(0) /* HW specific definitions */ -#define XILINX_DMA_MAX_CHANS_PER_DEVICE 0x2 +#define XILINX_DMA_MAX_CHANS_PER_DEVICE 0x20 #define XILINX_DMA_DMAXR_ALL_IRQ_MASK \ (XILINX_DMA_DMASR_FRM_CNT_IRQ | \ @@ -178,6 +175,18 @@ #define XILINX_DMA_NUM_DESCS 255 #define XILINX_DMA_NUM_APP_WORDS 5 +/* Multi-Channel DMA Descriptor offsets*/ +#define XILINX_DMA_MCRX_CDESC(x) (0x40 + (x-1) * 0x20) +#define XILINX_DMA_MCRX_TDESC(x) (0x48 + (x-1) * 0x20) + +/* Multi-Channel DMA Masks/Shifts */ +#define XILINX_DMA_BD_HSIZE_MASK GENMASK(15, 0) +#define XILINX_DMA_BD_STRIDE_MASK GENMASK(15, 0) +#define XILINX_DMA_BD_VSIZE_MASK GENMASK(31, 19) +#define XILINX_DMA_BD_TDEST_MASK GENMASK(4, 0) +#define XILINX_DMA_BD_STRIDE_SHIFT 0 +#define XILINX_DMA_BD_VSIZE_SHIFT 19 + /* AXI CDMA Specific Registers/Offsets */ #define XILINX_CDMA_REG_SRCADDR 0x18 #define XILINX_CDMA_REG_DSTADDR 0x20 @@ -185,8 +194,6 @@ /* AXI CDMA Specific Masks */ #define XILINX_CDMA_CR_SGMODE BIT(3) -#define xilinx_prep_dma_addr_t(addr) \ - ((dma_addr_t)((u64)addr##_##msb << 32 | (addr))) /** * struct xilinx_vdma_desc_hw - Hardware Descriptor * @next_desc: Next Descriptor Pointer @0x00 @@ -214,8 +221,8 @@ struct xilinx_vdma_desc_hw { * @next_desc_msb: MSB of Next Descriptor Pointer @0x04 * @buf_addr: Buffer address @0x08 * @buf_addr_msb: MSB of Buffer address @0x0C - * @reserved1: Reserved @0x10 - * @reserved2: Reserved @0x14 + * @mcdma_control: Control field for mcdma @0x10 + * @vsize_stride: Vsize and Stride field for mcdma @0x14 * @control: Control field @0x18 * @status: Status field @0x1C * @app: APP Fields @0x20 - 0x30 @@ -225,8 +232,8 @@ struct xilinx_axidma_desc_hw { u32 next_desc_msb; u32 buf_addr; u32 buf_addr_msb; - u32 reserved1; - u32 reserved2; + u32 mcdma_control; + u32 vsize_stride; u32 control; u32 status; u32 app[XILINX_DMA_NUM_APP_WORDS]; @@ -296,16 +303,12 @@ struct xilinx_cdma_tx_segment { * @segments: TX segments list * @node: Node in the channel descriptors list * @cyclic: Check for cyclic transfers. - * @err: Whether the descriptor has an error. - * @residue: Residue of the completed descriptor */ struct xilinx_dma_tx_descriptor { struct dma_async_tx_descriptor async_tx; struct list_head segments; struct list_head node; bool cyclic; - bool err; - u32 residue; }; /** @@ -336,12 +339,14 @@ struct xilinx_dma_tx_descriptor { * @desc_pendingcount: Descriptor pending count * @ext_addr: Indicates 64 bit addressing is supported by dma channel * @desc_submitcount: Descriptor h/w submitted count + * @residue: Residue for AXI DMA * @seg_v: Statically allocated segments base * @seg_p: Physical allocated segments base * @cyclic_seg_v: Statically allocated segment base for cyclic transfers * @cyclic_seg_p: Physical allocated segments base for cyclic dma * @start_transfer: Differentiate b/w DMA IP's transfer * @stop_transfer: Differentiate b/w DMA IP's quiesce + * @tdest: TDEST value for mcdma * @has_vflip: S2MM vertical flip */ struct xilinx_dma_chan { @@ -371,12 +376,14 @@ struct xilinx_dma_chan { u32 desc_pendingcount; bool ext_addr; u32 desc_submitcount; + u32 residue; struct xilinx_axidma_tx_segment *seg_v; dma_addr_t seg_p; struct xilinx_axidma_tx_segment *cyclic_seg_v; dma_addr_t cyclic_seg_p; void (*start_transfer)(struct xilinx_dma_chan *chan); int (*stop_transfer)(struct xilinx_dma_chan *chan); + u16 tdest; bool has_vflip; u32 buf_idx; // each irq this value increase 1. in cyclic mode, we use residue return this idx via device_tx_status/xilinx_dma_tx_status }; @@ -409,6 +416,7 @@ struct xilinx_dma_config { * @common: DMA device structure * @chan: Driver specific DMA channel * @has_sg: Specifies whether Scatter-Gather is present or not + * @mcdma: Specifies whether Multi-Channel is present or not * @flush_on_fsync: Flush on frame sync * @ext_addr: Indicates 64 bit addressing is supported by dma device * @pdev: Platform device structure pointer @@ -428,6 +436,7 @@ struct xilinx_dma_device { struct dma_device common; struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; bool has_sg; + bool mcdma; u32 flush_on_fsync; bool ext_addr; struct platform_device *pdev; @@ -607,9 +616,6 @@ xilinx_axidma_alloc_tx_segment(struct xilinx_dma_chan *chan) } spin_unlock_irqrestore(&chan->lock, flags); - if (!segment) - dev_dbg(chan->dev, "Could not find free tx segment\n"); - return segment; } @@ -786,51 +792,6 @@ static void xilinx_dma_free_chan_resources(struct dma_chan *dchan) } } -/** - * xilinx_dma_get_residue - Compute residue for a given descriptor - * @chan: Driver specific dma channel - * @desc: dma transaction descriptor - * - * Return: The number of residue bytes for the descriptor. - */ -static u32 xilinx_dma_get_residue(struct xilinx_dma_chan *chan, - struct xilinx_dma_tx_descriptor *desc) -{ - struct xilinx_cdma_tx_segment *cdma_seg; - struct xilinx_axidma_tx_segment *axidma_seg; - struct xilinx_cdma_desc_hw *cdma_hw; - struct xilinx_axidma_desc_hw *axidma_hw; - struct list_head *entry; - u32 residue = 0; - - /** - * VDMA and simple mode do not support residue reporting, so the - * residue field will always be 0. - */ - if (chan->xdev->dma_config->dmatype == XDMA_TYPE_VDMA || !chan->has_sg) - return residue; - - list_for_each(entry, &desc->segments) { - if (chan->xdev->dma_config->dmatype == XDMA_TYPE_CDMA) { - cdma_seg = list_entry(entry, - struct xilinx_cdma_tx_segment, - node); - cdma_hw = &cdma_seg->hw; - residue += (cdma_hw->control - cdma_hw->status) & - chan->xdev->max_buffer_len; - } else { - axidma_seg = list_entry(entry, - struct xilinx_axidma_tx_segment, - node); - axidma_hw = &axidma_seg->hw; - residue += (axidma_hw->control - axidma_hw->status) & - chan->xdev->max_buffer_len; - } - } - - return residue; -} - /** * xilinx_dma_chan_handle_cyclic - Cyclic dma callback * @chan: Driver specific dma channel @@ -865,7 +826,7 @@ static void xilinx_dma_chan_desc_cleanup(struct xilinx_dma_chan *chan) spin_lock_irqsave(&chan->lock, flags); list_for_each_entry_safe(desc, next, &chan->done_list, node) { - struct dmaengine_result result; + struct dmaengine_desc_callback cb; if (desc->cyclic) { xilinx_dma_chan_handle_cyclic(chan, desc, &flags); @@ -875,21 +836,13 @@ static void xilinx_dma_chan_desc_cleanup(struct xilinx_dma_chan *chan) /* Remove from the list of running transactions */ list_del(&desc->node); - if (unlikely(desc->err)) { - if (chan->direction == DMA_DEV_TO_MEM) - result.result = DMA_TRANS_READ_FAILED; - else - result.result = DMA_TRANS_WRITE_FAILED; - } else { - result.result = DMA_TRANS_NOERROR; - } - - result.residue = desc->residue; - /* Run the link descriptor callback function */ - spin_unlock_irqrestore(&chan->lock, flags); - dmaengine_desc_get_callback_invoke(&desc->async_tx, &result); - spin_lock_irqsave(&chan->lock, flags); + dmaengine_desc_get_callback(&desc->async_tx, &cb); + if (dmaengine_desc_callback_valid(&cb)) { + spin_unlock_irqrestore(&chan->lock, flags); + dmaengine_desc_callback_invoke(&cb, NULL); + spin_lock_irqsave(&chan->lock, flags); + } /* Run any dependencies, then free the descriptor */ dma_run_dependencies(&desc->async_tx); @@ -1025,25 +978,36 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan, { struct xilinx_dma_chan *chan = to_xilinx_chan(dchan); struct xilinx_dma_tx_descriptor *desc; + struct xilinx_axidma_tx_segment *segment; + struct xilinx_axidma_desc_hw *hw; enum dma_status ret; unsigned long flags; + u32 residue = 0; ret = dma_cookie_status(dchan, cookie, txstate); if (ret == DMA_COMPLETE || !txstate) return ret; - spin_lock_irqsave(&chan->lock, flags); + if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { + spin_lock_irqsave(&chan->lock, flags); - desc = list_last_entry(&chan->active_list, - struct xilinx_dma_tx_descriptor, node); - desc->residue = xilinx_dma_get_residue(chan, desc); + desc = list_last_entry(&chan->active_list, + struct xilinx_dma_tx_descriptor, node); + if (chan->has_sg) { + list_for_each_entry(segment, &desc->segments, node) { + hw = &segment->hw; + residue += (hw->control - hw->status) & + chan->xdev->max_buffer_len; + } + } + spin_unlock_irqrestore(&chan->lock, flags); - spin_unlock_irqrestore(&chan->lock, flags); - - if (chan->cyclic) - dma_set_residue(txstate, chan->buf_idx); - else - dma_set_residue(txstate, desc->residue); + chan->residue = residue; + if (chan->cyclic) + dma_set_residue(txstate, chan->buf_idx); + else + dma_set_residue(txstate, chan->residue); + } return ret; } @@ -1062,9 +1026,8 @@ static int xilinx_dma_stop_transfer(struct xilinx_dma_chan *chan) /* Wait for the hardware to halt */ return xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMASR, val, - val | (XILINX_DMA_DMASR_IDLE | - XILINX_DMA_DMASR_HALTED), - 0, XILINX_DMA_LOOP_COUNT); + val & XILINX_DMA_DMASR_HALTED, 0, + XILINX_DMA_LOOP_COUNT); } /** @@ -1292,10 +1255,10 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan) hw = &segment->hw; - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, - xilinx_prep_dma_addr_t(hw->src_addr)); - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, - xilinx_prep_dma_addr_t(hw->dest_addr)); + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, (dma_addr_t) + ((u64)hw->src_addr_msb << 32 | hw->src_addr)); + xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, (dma_addr_t) + ((u64)hw->dest_addr_msb << 32 | hw->dest_addr)); /* Start the transfer */ dma_ctrl_write(chan, XILINX_DMA_REG_BTT, @@ -1342,23 +1305,53 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan) dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg); } - if (chan->has_sg) + if (chan->has_sg && !chan->xdev->mcdma) xilinx_write(chan, XILINX_DMA_REG_CURDESC, head_desc->async_tx.phys); + if (chan->has_sg && chan->xdev->mcdma) { + if (chan->direction == DMA_MEM_TO_DEV) { + dma_ctrl_write(chan, XILINX_DMA_REG_CURDESC, + head_desc->async_tx.phys); + } else { + if (!chan->tdest) { + dma_ctrl_write(chan, XILINX_DMA_REG_CURDESC, + head_desc->async_tx.phys); + } else { + dma_ctrl_write(chan, + XILINX_DMA_MCRX_CDESC(chan->tdest), + head_desc->async_tx.phys); + } + } + } + xilinx_dma_start(chan); if (chan->err) return; /* Start the transfer */ - if (chan->has_sg) { + if (chan->has_sg && !chan->xdev->mcdma) { if (chan->cyclic) xilinx_write(chan, XILINX_DMA_REG_TAILDESC, chan->cyclic_seg_v->phys); else xilinx_write(chan, XILINX_DMA_REG_TAILDESC, tail_segment->phys); + } else if (chan->has_sg && chan->xdev->mcdma) { + if (chan->direction == DMA_MEM_TO_DEV) { + dma_ctrl_write(chan, XILINX_DMA_REG_TAILDESC, + tail_segment->phys); + } else { + if (!chan->tdest) { + dma_ctrl_write(chan, XILINX_DMA_REG_TAILDESC, + tail_segment->phys); + } else { + dma_ctrl_write(chan, + XILINX_DMA_MCRX_TDESC(chan->tdest), + tail_segment->phys); + } + } } else { struct xilinx_axidma_tx_segment *segment; struct xilinx_axidma_desc_hw *hw; @@ -1368,8 +1361,7 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan) node); hw = &segment->hw; - xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR, - xilinx_prep_dma_addr_t(hw->buf_addr)); + xilinx_write(chan, XILINX_DMA_REG_SRCDSTADDR, hw->buf_addr); /* Start the transfer */ dma_ctrl_write(chan, XILINX_DMA_REG_BTT, @@ -1410,9 +1402,6 @@ static void xilinx_dma_complete_descriptor(struct xilinx_dma_chan *chan) return; list_for_each_entry_safe(desc, next, &chan->active_list, node) { - desc->residue = xilinx_dma_get_residue(chan, desc); - desc->err = chan->err; - list_del(&desc->node); if (!desc->cyclic) dma_cookie_complete(&desc->async_tx); @@ -1447,7 +1436,6 @@ static int xilinx_dma_reset(struct xilinx_dma_chan *chan) chan->err = false; chan->idle = true; - chan->desc_pendingcount = 0; chan->desc_submitcount = 0; return err; @@ -1585,12 +1573,7 @@ static void append_desc_queue(struct xilinx_dma_chan *chan, */ append: list_add_tail(&desc->node, &chan->pending_list); - /* - * In CDMA each segment is considered as a descriptor, so increment - * pending count in prep_slave_* implementation. - */ - if (chan->xdev->dma_config->dmatype != XDMA_TYPE_CDMA) - chan->desc_pendingcount++; + chan->desc_pendingcount++; if (chan->has_sg && (chan->xdev->dma_config->dmatype == XDMA_TYPE_VDMA) && unlikely(chan->desc_pendingcount > chan->num_frms)) { @@ -1770,7 +1753,6 @@ xilinx_cdma_prep_memcpy(struct dma_chan *dchan, dma_addr_t dma_dst, /* Insert the segment into the descriptor segments list. */ list_add_tail(&segment->node, &desc->segments); - chan->desc_pendingcount++; desc->async_tx.phys = segment->phys; hw->next_desc = segment->phys; @@ -1855,7 +1837,6 @@ static struct dma_async_tx_descriptor *xilinx_cdma_prep_sg( dst_avail -= len; src_avail -= len; list_add_tail(&segment->node, &desc->segments); - chan->desc_pendingcount++; fetch: /* Fetch the next dst scatterlist entry */ @@ -2101,6 +2082,90 @@ error: return NULL; } +/** + * xilinx_dma_prep_interleaved - prepare a descriptor for a + * DMA_SLAVE transaction + * @dchan: DMA channel + * @xt: Interleaved template pointer + * @flags: transfer ack flags + * + * Return: Async transaction descriptor on success and NULL on failure + */ +static struct dma_async_tx_descriptor * +xilinx_dma_prep_interleaved(struct dma_chan *dchan, + struct dma_interleaved_template *xt, + unsigned long flags) +{ + struct xilinx_dma_chan *chan = to_xilinx_chan(dchan); + struct xilinx_dma_tx_descriptor *desc; + struct xilinx_axidma_tx_segment *segment; + struct xilinx_axidma_desc_hw *hw; + + if (!is_slave_direction(xt->dir)) + return NULL; + + if (!xt->numf || !xt->sgl[0].size) + return NULL; + + if (xt->frame_size != 1) + return NULL; + + /* Allocate a transaction descriptor. */ + desc = xilinx_dma_alloc_tx_descriptor(chan); + if (!desc) + return NULL; + + chan->direction = xt->dir; + dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); + desc->async_tx.tx_submit = xilinx_dma_tx_submit; + + /* Get a free segment */ + segment = xilinx_axidma_alloc_tx_segment(chan); + if (!segment) + goto error; + + hw = &segment->hw; + + /* Fill in the descriptor */ + if (xt->dir != DMA_MEM_TO_DEV) + hw->buf_addr = xt->dst_start; + else + hw->buf_addr = xt->src_start; + + hw->mcdma_control = chan->tdest & XILINX_DMA_BD_TDEST_MASK; + hw->vsize_stride = (xt->numf << XILINX_DMA_BD_VSIZE_SHIFT) & + XILINX_DMA_BD_VSIZE_MASK; + hw->vsize_stride |= (xt->sgl[0].icg + xt->sgl[0].size) & + XILINX_DMA_BD_STRIDE_MASK; + hw->control = xt->sgl[0].size & XILINX_DMA_BD_HSIZE_MASK; + + /* + * Insert the segment into the descriptor segments + * list. + */ + list_add_tail(&segment->node, &desc->segments); + + + segment = list_first_entry(&desc->segments, + struct xilinx_axidma_tx_segment, node); + desc->async_tx.phys = segment->phys; + + /* For the last DMA_MEM_TO_DEV transfer, set EOP */ + if (xt->dir == DMA_MEM_TO_DEV) { + segment->hw.control |= XILINX_DMA_BD_SOP; + segment = list_last_entry(&desc->segments, + struct xilinx_axidma_tx_segment, + node); + segment->hw.control |= XILINX_DMA_BD_EOP; + } + + return &desc->async_tx; + +error: + xilinx_dma_free_tx_descriptor(chan, desc); + return NULL; +} + /** * xilinx_dma_terminate_all - Halt the channel and free descriptors * @dchan: Driver specific DMA Channel pointer @@ -2173,10 +2238,8 @@ int xilinx_vdma_channel_set_config(struct dma_chan *dchan, chan->config.gen_lock = cfg->gen_lock; chan->config.master = cfg->master; - dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; if (cfg->gen_lock && chan->genlock) { dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; - dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; } @@ -2192,13 +2255,11 @@ int xilinx_vdma_channel_set_config(struct dma_chan *dchan, chan->config.delay = cfg->delay; if (cfg->coalesc <= XILINX_DMA_DMACR_FRAME_COUNT_MAX) { - dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; chan->config.coalesc = cfg->coalesc; } if (cfg->delay <= XILINX_DMA_DMACR_DELAY_MAX) { - dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; chan->config.delay = cfg->delay; } @@ -2490,6 +2551,7 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, of_device_is_compatible(node, "xlnx,axi-cdma-channel")) { chan->direction = DMA_MEM_TO_DEV; chan->id = chan_id; + chan->tdest = chan_id; xdev->common.directions = BIT(DMA_MEM_TO_DEV); chan->ctrl_offset = XILINX_DMA_MM2S_CTRL_OFFSET; @@ -2507,6 +2569,7 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, "xlnx,axi-dma-s2mm-channel")) { chan->direction = DMA_DEV_TO_MEM; chan->id = chan_id; + chan->tdest = chan_id - xdev->nr_channels; xdev->common.directions |= BIT(DMA_DEV_TO_MEM); chan->has_vflip = of_property_read_bool(node, "xlnx,enable-vert-flip"); @@ -2586,7 +2649,11 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, static int xilinx_dma_child_probe(struct xilinx_dma_device *xdev, struct device_node *node) { - int i, nr_channels = 1; + int ret, i, nr_channels = 1; + + ret = of_property_read_u32(node, "dma-channels", &nr_channels); + if ((ret < 0) && xdev->mcdma) + dev_warn(xdev->dev, "missing dma-channels property\n"); for (i = 0; i < nr_channels; i++) xilinx_dma_chan_probe(xdev, node, xdev->chan_id++); @@ -2688,6 +2755,7 @@ static int xilinx_dma_probe(struct platform_device *pdev) xdev->max_buffer_len = GENMASK(XILINX_DMA_MAX_TRANS_LEN_MAX - 1, 0); if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) { + xdev->mcdma = of_property_read_bool(node, "xlnx,mcdma"); if (!of_property_read_u32(node, "xlnx,sg-length-width", &len_width)) { if (len_width < XILINX_DMA_MAX_TRANS_LEN_MIN || @@ -2754,7 +2822,9 @@ static int xilinx_dma_probe(struct platform_device *pdev) xdev->common.device_prep_slave_sg = xilinx_dma_prep_slave_sg; xdev->common.device_prep_dma_cyclic = xilinx_dma_prep_dma_cyclic; - /* Residue calculation is supported by only AXI DMA and CDMA */ + xdev->common.device_prep_interleaved_dma = + xilinx_dma_prep_interleaved; + /* Residue calculation is supported by only AXI DMA */ xdev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; } else if (xdev->dma_config->dmatype == XDMA_TYPE_CDMA) { @@ -2762,9 +2832,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) dma_cap_set(DMA_SG, xdev->common.cap_mask); xdev->common.device_prep_dma_memcpy = xilinx_cdma_prep_memcpy; xdev->common.device_prep_dma_sg = xilinx_cdma_prep_sg; - /* Residue calculation is supported by only AXI DMA and CDMA */ - xdev->common.residue_granularity = - DMA_RESIDUE_GRANULARITY_SEGMENT; } else { xdev->common.device_prep_interleaved_dma = xilinx_vdma_dma_prep_interleaved; @@ -2850,6 +2917,6 @@ static struct platform_driver xilinx_vdma_driver = { module_platform_driver(xilinx_vdma_driver); -MODULE_AUTHOR("Xilinx and Xianjun Jiao"); +MODULE_AUTHOR("Xilinx, Inc. and Xianjun Jiao"); MODULE_DESCRIPTION("Xilinx VDMA driver"); MODULE_LICENSE("GPL v2"); diff --git a/driver/xpu/Makefile b/driver/xpu/Makefile index 0c4619d..1873523 100644 --- a/driver/xpu/Makefile +++ b/driver/xpu/Makefile @@ -3,7 +3,8 @@ obj-m += xpu.o all: - make -C $(KDIR) M=$(PWD) modules ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- + make -C $(KDIR) M=$(PWD) modules + # ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean: rm -f *.ko *.o *.mod.o *.mod.c *.symvers *.order diff --git a/driver/xpu/xpu.c b/driver/xpu/xpu.c index b6bcfda..8f7d893 100644 --- a/driver/xpu/xpu.c +++ b/driver/xpu/xpu.c @@ -343,12 +343,12 @@ static inline u32 hw_init(enum xpu_mode mode){ //xpu_api->XPU_REG_ACK_FC_FILTER_write((3<<(2+16))|(2<<2)); // low 16 bits target FC 16 bits; high 16 bits -- mask // after send data frame wait for ACK, this will be set in real time in function ad9361_rf_set_channel - // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2)*200)<<16) | 200 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! - // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 1200 ); // +6 = 16us for 5GHz + // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! + // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 6*10 ); // +6 = 16us for 5GHz //xpu_api->XPU_REG_MAX_NUM_RETRANS_write(3); // if this > 0, it will override mac80211 set value, and set static retransmission limit - xpu_api->XPU_REG_BB_RF_DELAY_write(975); + xpu_api->XPU_REG_BB_RF_DELAY_write(49); xpu_api->XPU_REG_SLICE_COUNT_TOTAL0_write(50000-1); // total 50ms xpu_api->XPU_REG_SLICE_COUNT_START0_write(0); //start 0ms @@ -388,11 +388,11 @@ static inline u32 hw_init(enum xpu_mode mode){ //xpu_api->XPU_REG_CSMA_CFG_write(3); //normal CSMA xpu_api->XPU_REG_CSMA_CFG_write(0xe0000000); //high priority - // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((1030-238)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) - xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((1030)<<16)|0 );//now our tx send out I/Q immediately + // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) + xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately - xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (((45+2+2)*200 + 300)<<16) | 200 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) - xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2+2)*200 + 300)<<16) | 200 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) + xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) + xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) printk("%s hw_init err %d\n", xpu_compatible_str, err); return(err); diff --git a/kernel_boot/boards/adrv9361z7035/devicetree.dts b/kernel_boot/boards/adrv9361z7035/devicetree.dts index e804bfa..cfd0e27 100644 --- a/kernel_boot/boards/adrv9361z7035/devicetree.dts +++ b/kernel_boot/boards/adrv9361z7035/devicetree.dts @@ -217,6 +217,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -427,7 +428,7 @@ #size-cells = <0x0>; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -435,11 +436,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; disable-wp; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -447,10 +447,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; @@ -460,6 +460,7 @@ phandle = <0x8>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -668,8 +669,8 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c400000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 57 4>; - clocks = <0x2 0xf 0xf>; + interrupts = <0x0 0x39 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0xb>; phandle = <0xb>; @@ -683,7 +684,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -692,8 +692,8 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c420000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 56 4>; - clocks = <0x2 0xf 0xf>; + interrupts = <0x0 0x38 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0xd>; phandle = <0xd>; @@ -707,8 +707,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -855,6 +853,11 @@ compatible = "mathworks,mwipcore-axi4lite-v1.00"; reg = <0x43c00000 0xffff>; }; + + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; }; leds { diff --git a/kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts b/kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts index c9bb96e..4258848 100644 --- a/kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts +++ b/kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts @@ -217,6 +217,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -295,8 +296,8 @@ reset-gpios = <0x6 0x64 0x0>; enable-gpios = <0x6 0x65 0x0>; txnrx-gpios = <0x6 0x66 0x0>; - linux,phandle = <0x11>; - phandle = <0x11>; + linux,phandle = <0x10>; + phandle = <0x10>; }; ad9517@1 { @@ -441,24 +442,22 @@ phy-handle = <0x9>; phy-mode = "gmii"; - gmiitorgmii@8 { - compatible = "xlnx,gmii-to-rgmii-1.0"; - reg = <0x8>; - phy-handle = <0xa>; - linux,phandle = <0x9>; - phandle = <0x9>; - }; - phy@1 { device_type = "ethernet-phy"; reg = <0x1>; marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0x0>; - linux,phandle = <0xa>; - phandle = <0xa>; + linux,phandle = <0x9>; + phandle = <0x9>; + }; + + gmiitorgmii@8 { + compatible = "xlnx,gmii-to-rgmii-1.0"; + reg = <0x8>; + phy-handle = <0x9>; }; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -466,11 +465,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; disable-wp; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -478,19 +476,20 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; reg = <0xf8000000 0x1000>; ranges; - linux,phandle = <0xb>; - phandle = <0xb>; + linux,phandle = <0xa>; + phandle = <0xa>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -505,13 +504,13 @@ compatible = "xlnx,zynq-reset"; reg = <0x200 0x48>; #reset-cells = <0x1>; - syscon = <0xb>; + syscon = <0xa>; }; pinctrl@700 { compatible = "xlnx,pinctrl-zynq"; reg = <0x700 0x200>; - syscon = <0xb>; + syscon = <0xa>; }; }; @@ -526,8 +525,8 @@ #dma-requests = <0x4>; clocks = <0x2 0x1b>; clock-names = "apb_pclk"; - linux,phandle = <0x16>; - phandle = <0x16>; + linux,phandle = <0x15>; + phandle = <0x15>; }; devcfg@f8007000 { @@ -537,7 +536,7 @@ reg = <0xf8007000 0x100>; clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; - syscon = <0xb>; + syscon = <0xa>; linux,phandle = <0x4>; phandle = <0x4>; }; @@ -634,8 +633,8 @@ clock-frequency = <0x2625a00>; clock-accuracy = <0x30d40>; clock-output-names = "XO_40MHz"; - linux,phandle = <0xc>; - phandle = <0xc>; + linux,phandle = <0xb>; + phandle = <0xb>; }; clock@2 { @@ -643,8 +642,8 @@ compatible = "fixed-clock"; clock-frequency = <0x16e3600>; clock-output-names = "24MHz"; - linux,phandle = <0xd>; - phandle = <0xd>; + linux,phandle = <0xc>; + phandle = <0xc>; }; clock@3 { @@ -660,15 +659,15 @@ compatible = "fixed-clock"; #clock-cells = <0x0>; clock-frequency = <0xbb8000>; - linux,phandle = <0xf>; - phandle = <0xf>; + linux,phandle = <0xe>; + phandle = <0xe>; }; }; ad9361-refclk-gpio-gate@0 { #clock-cells = <0x0>; compatible = "gpio-gate-clock"; - clocks = <0xc>; + clocks = <0xb>; enable-gpios = <0x6 0x69 0x0>; clk-set-rate-parent-enable; clock-output-names = "ad9361_ext_refclk"; @@ -679,7 +678,7 @@ usb-ulpe-gpio-gate@0 { #clock-cells = <0x0>; compatible = "gpio-gate-clock"; - clocks = <0xd>; + clocks = <0xc>; enable-gpios = <0x6 0x9 0x1>; }; @@ -738,8 +737,8 @@ adi,input-justification = "left"; adi,clock-delay = <0x0>; #sound-dai-cells = <0x0>; - linux,phandle = <0x18>; - phandle = <0x18>; + linux,phandle = <0x17>; + phandle = <0x17>; ports { #address-cells = <0x1>; @@ -749,9 +748,9 @@ reg = <0x0>; endpoint { - remote-endpoint = <0xe>; - linux,phandle = <0x15>; - phandle = <0x15>; + remote-endpoint = <0xd>; + linux,phandle = <0x14>; + phandle = <0x14>; }; }; @@ -770,11 +769,11 @@ adau1761@3b { compatible = "adi,adau1761"; reg = <0x3b>; - clocks = <0xf>; + clocks = <0xe>; clock-names = "mclk"; #sound-dai-cells = <0x0>; - linux,phandle = <0x1a>; - phandle = <0x1a>; + linux,phandle = <0x19>; + phandle = <0x19>; }; }; @@ -818,10 +817,10 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c400000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 57 4>; - clocks = <0x2 0xf 0xf>; - linux,phandle = <0x10>; - phandle = <0x10>; + interrupts = <0x0 0x39 0x0>; + clocks = <0x2 0x10>; + linux,phandle = <0xf>; + phandle = <0xf>; adi,channels { #size-cells = <0x0>; @@ -833,7 +832,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -842,10 +840,10 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c420000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 56 4>; - clocks = <0x2 0xf 0xf>; - linux,phandle = <0x12>; - phandle = <0x12>; + interrupts = <0x0 0x38 0x0>; + clocks = <0x2 0x10>; + linux,phandle = <0x11>; + phandle = <0x11>; adi,channels { #size-cells = <0x0>; @@ -857,8 +855,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -987,17 +983,17 @@ cf-ad9361-lpc@79020000 { compatible = "adi,axi-ad9361-6.00.a"; reg = <0x79020000 0x6000>; - dmas = <0x10 0x0>; + dmas = <0xf 0x0>; dma-names = "rx"; - spibus-connected = <0x11>; + spibus-connected = <0x10>; }; cf-ad9361-dds-core-lpc@79024000 { compatible = "adi,axi-ad9361-dds-6.00.a"; reg = <0x79024000 0x1000>; - clocks = <0x11 0xd>; + clocks = <0x10 0xd>; clock-names = "sampl_clk"; - dmas = <0x12 0x0>; + dmas = <0x11 0x0>; dma-names = "tx"; }; @@ -1006,31 +1002,31 @@ reg = <0x43c00000 0xffff>; }; - axivdma@43000000 { - compatible = "xlnx,axi-vdma-1.00.a"; - clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk"; - clocks = <2 15>, <2 15>, <2 15>; - interrupt-names = "mm2s_introut"; - interrupt-parent = <1>; - interrupts = <0 59 4>; - #address-cells = <0x1>; - #size-cells = <0x1>; - #dma-cells = <0x1>; - #dma-channels = <0x1>; - reg = <0x43000000 0x1000>; - xlnx,addrwidth = <0x20>; - xlnx,flush-fsync = <0x1>; - xlnx,num-fstores = <0x3>; - linux,phandle = <0x13>; - phandle = <0x13>; + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; - dma-channel@43000000 { - compatible = "xlnx,axi-vdma-mm2s-channel"; - interrupts = <0 59 4>; - xlnx,datawidth = <0x40>; - xlnx,device-id = <0x0>; - xlnx,genlock-mode ; - xlnx,include-dre = <0x0>; + dma@43000000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x43000000 0x10000>; + #dma-cells = <0x1>; + interrupts = <0x0 0x3b 0x0>; + clocks = <0x2 0x10>; + linux,phandle = <0x12>; + phandle = <0x12>; + + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x0>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x1>; + }; }; }; @@ -1039,23 +1035,23 @@ reg = <0x79000000 0x10000>; #clock-cells = <0x0>; clocks = <0x2 0x10>; - linux,phandle = <0x14>; - phandle = <0x14>; + linux,phandle = <0x13>; + phandle = <0x13>; }; axi_hdmi@70e00000 { compatible = "adi,axi-hdmi-tx-1.00.a"; reg = <0x70e00000 0x10000>; - dmas = <0x13 0x0>; + dmas = <0x12 0x0>; dma-names = "video"; - clocks = <0x14>; + clocks = <0x13>; port { endpoint { - remote-endpoint = <0x15>; - linux,phandle = <0xe>; - phandle = <0xe>; + remote-endpoint = <0x14>; + linux,phandle = <0xd>; + phandle = <0xd>; }; }; }; @@ -1063,25 +1059,25 @@ axi-spdif-tx@75c00000 { compatible = "adi,axi-spdif-tx-1.00.a"; reg = <0x75c00000 0x1000>; - dmas = <0x16 0x0>; + dmas = <0x15 0x0>; dma-names = "tx"; - clocks = <0x2 0xf 0xf>; + clocks = <0x2 0xf 0xe>; clock-names = "axi", "ref"; #sound-dai-cells = <0x0>; - linux,phandle = <0x17>; - phandle = <0x17>; + linux,phandle = <0x16>; + phandle = <0x16>; }; axi-i2s@77600000 { compatible = "adi,axi-i2s-1.00.a"; reg = <0x77600000 0x1000>; - dmas = <0x16 0x1 0x16 0x2>; + dmas = <0x15 0x1 0x15 0x2>; dma-names = "tx", "rx"; - clocks = <0x2 0xf 0xf>; + clocks = <0x2 0xf 0xe>; clock-names = "axi", "ref"; #sound-dai-cells = <0x0>; - linux,phandle = <0x19>; - phandle = <0x19>; + linux,phandle = <0x18>; + phandle = <0x18>; }; }; @@ -1095,13 +1091,13 @@ format = "spdif"; cpu { - sound-dai = <0x17>; + sound-dai = <0x16>; frame-master; bitclock-master; }; codec { - sound-dai = <0x18>; + sound-dai = <0x17>; }; }; }; @@ -1116,13 +1112,13 @@ format = "i2s"; cpu { - sound-dai = <0x19>; + sound-dai = <0x18>; frame-master; bitclock-master; }; codec { - sound-dai = <0x1a>; + sound-dai = <0x19>; }; }; }; diff --git a/kernel_boot/boards/adrv9364z7020/devicetree.dts b/kernel_boot/boards/adrv9364z7020/devicetree.dts index c18e619..2bbd625 100644 --- a/kernel_boot/boards/adrv9364z7020/devicetree.dts +++ b/kernel_boot/boards/adrv9364z7020/devicetree.dts @@ -217,6 +217,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -427,7 +428,7 @@ #size-cells = <0x0>; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -435,11 +436,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; disable-wp; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -447,10 +447,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; @@ -460,6 +460,7 @@ phandle = <0x8>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -672,7 +673,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -696,8 +696,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -844,6 +842,11 @@ compatible = "mathworks,mwipcore-axi4lite-v1.00"; reg = <0x43c00000 0xffff>; }; + + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; }; leds { diff --git a/kernel_boot/boards/zc702_fmcs2/devicetree.dts b/kernel_boot/boards/zc702_fmcs2/devicetree.dts index 673e5dd..064c02a 100644 --- a/kernel_boot/boards/zc702_fmcs2/devicetree.dts +++ b/kernel_boot/boards/zc702_fmcs2/devicetree.dts @@ -192,9 +192,6 @@ #size-cells = <0x0>; ad9361-phy@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; - #clock-cells = <0x1>; compatible = "adi,ad9361"; reg = <0x0>; spi-cpha; @@ -202,6 +199,7 @@ clocks = <0x5 0x0>; clock-names = "ad9361_ext_refclk"; clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; + #clock-cells = <0x1>; adi,digital-interface-tune-skip-mode = <0x0>; adi,pp-tx-swap-enable; adi,pp-rx-swap-enable; @@ -217,6 +215,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -312,8 +311,6 @@ #size-cells = <0x0>; adf4351-udc-tx-pmod@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x0>; spi-max-frequency = <0x989680>; @@ -330,8 +327,6 @@ }; adf4351-udc-rx-pmod@1 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x1>; spi-max-frequency = <0x989680>; @@ -456,7 +451,7 @@ #size-cells = <0x0>; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -464,10 +459,9 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -475,10 +469,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; @@ -488,6 +482,7 @@ phandle = <0x9>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -813,22 +808,26 @@ }; }; /* - axivdma@43000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; + dma@43000000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x43000000 0x10000>; #dma-cells = <0x1>; - compatible = "xlnx,axi-vdma-1.00.a"; - reg = <0x43000000 0x1000>; - xlnx,num-fstores = <0x3>; + interrupts = <0x0 0x3b 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0xb>; phandle = <0xb>; - dma-channel@7e200000 { - compatible = "xlnx,axi-vdma-mm2s-channel"; - interrupts = <0x0 0x3b 0x4>; - xlnx,datawidth = <0x40>; - xlnx,genlock-mode = <0x0>; - xlnx,include-dre = <0x0>; + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x0>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x1>; + }; }; }; @@ -870,6 +869,11 @@ phandle = <0x13>; }; */ + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; + dma@7c400000 { compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c400000 0x10000>; @@ -889,7 +893,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -913,8 +916,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -1090,19 +1091,19 @@ clocks { clock@0 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x2625a00>; clock-output-names = "ad9361_ext_refclk"; + #clock-cells = <0x0>; linux,phandle = <0x5>; phandle = <0x5>; }; clock@1 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x17d7840>; clock-output-names = "refclk"; + #clock-cells = <0x0>; linux,phandle = <0x7>; phandle = <0x7>; }; diff --git a/kernel_boot/boards/zc706_fmcs2/devicetree.dts b/kernel_boot/boards/zc706_fmcs2/devicetree.dts index 46848e2..1fee3f7 100644 --- a/kernel_boot/boards/zc706_fmcs2/devicetree.dts +++ b/kernel_boot/boards/zc706_fmcs2/devicetree.dts @@ -192,9 +192,6 @@ #size-cells = <0x0>; ad9361-phy@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; - #clock-cells = <0x1>; compatible = "adi,ad9361"; reg = <0x0>; spi-cpha; @@ -202,6 +199,7 @@ clocks = <0x5 0x0>; clock-names = "ad9361_ext_refclk"; clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; + #clock-cells = <0x1>; adi,digital-interface-tune-skip-mode = <0x0>; adi,pp-tx-swap-enable; adi,pp-rx-swap-enable; @@ -217,6 +215,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -312,8 +311,6 @@ #size-cells = <0x0>; adf4351-udc-tx-pmod@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x0>; spi-max-frequency = <0x989680>; @@ -330,8 +327,6 @@ }; adf4351-udc-rx-pmod@1 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x1>; spi-max-frequency = <0x989680>; @@ -457,7 +452,7 @@ #size-cells = <0x0>; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -465,10 +460,9 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -476,10 +470,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; @@ -489,6 +483,7 @@ phandle = <0x9>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -808,30 +803,26 @@ }; }; - axivdma@43000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; + dma@43000000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x43000000 0x10000>; #dma-cells = <0x1>; - clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk"; - clocks = <2 15>, <2 15>, <2 15>; - compatible = "xlnx,axi-vdma-1.00.a"; - interrupt-names = "mm2s_introut"; - interrupt-parent = <1>; - interrupts = <0 59 4>; - reg = <0x43000000 0x1000>; - xlnx,addrwidth = <0x20>; - xlnx,flush-fsync = <0x1>; - xlnx,num-fstores = <0x3>; + interrupts = <0x0 0x3b 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0xb>; phandle = <0xb>; - dma-channel@43000000 { - compatible = "xlnx,axi-vdma-mm2s-channel"; - interrupts = <0 59 4>; - xlnx,datawidth = <0x40>; - xlnx,device-id = <0x0>; - xlnx,genlock-mode ; - xlnx,include-dre = <0x0>; + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x0>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x1>; + }; }; }; @@ -874,12 +865,17 @@ phandle = <0x13>; }; + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; + dma@7c400000 { compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c400000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 57 4>; - clocks = <0x2 0xf 0xf>; + interrupts = <0x0 0x39 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0x10>; phandle = <0x10>; @@ -893,7 +889,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -902,8 +897,8 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x7c420000 0x10000>; #dma-cells = <0x1>; - interrupts = <0 56 4>; - clocks = <0x2 0xf 0xf>; + interrupts = <0x0 0x38 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0x12>; phandle = <0x12>; @@ -917,8 +912,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -1059,8 +1052,6 @@ clock-names = "sampl_clk"; dmas = <0x12 0x0>; dma-names = "tx"; - adi,axi-dds-rate = <0x1>; - adi,axi-dds-1-rf-channel; }; mwipcore@43c00000 { @@ -1101,19 +1092,19 @@ clocks { clock@0 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x2625a00>; clock-output-names = "ad9361_ext_refclk"; + #clock-cells = <0x0>; linux,phandle = <0x5>; phandle = <0x5>; }; clock@1 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x17d7840>; clock-output-names = "refclk"; + #clock-cells = <0x0>; linux,phandle = <0x7>; phandle = <0x7>; }; diff --git a/kernel_boot/boards/zcu102_fmcs2/bl31.elf b/kernel_boot/boards/zcu102_fmcs2/bl31.elf new file mode 100644 index 0000000..7e8295a Binary files /dev/null and b/kernel_boot/boards/zcu102_fmcs2/bl31.elf differ diff --git a/kernel_boot/boards/zcu102_fmcs2/system.dts b/kernel_boot/boards/zcu102_fmcs2/system.dts new file mode 100644 index 0000000..4bf2081 --- /dev/null +++ b/kernel_boot/boards/zcu102_fmcs2/system.dts @@ -0,0 +1,2589 @@ +/dts-v1/; + +/ { + compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; + #address-cells = <0x2>; + #size-cells = <0x2>; + model = "ZynqMP ZCU102 Rev1.0"; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + operating-points-v2 = <0x1>; + reg = <0x0>; + cpu-idle-states = <0x2>; + clocks = <0x3 0xa>; + }; + + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x1>; + operating-points-v2 = <0x1>; + cpu-idle-states = <0x2>; + }; + + cpu@2 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x2>; + operating-points-v2 = <0x1>; + cpu-idle-states = <0x2>; + }; + + cpu@3 { + compatible = "arm,cortex-a53", "arm,armv8"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x3>; + operating-points-v2 = <0x1>; + cpu-idle-states = <0x2>; + }; + + idle-states { + entry-method = "arm,psci"; + + cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000000>; + local-timer-stop; + entry-latency-us = <0x12c>; + exit-latency-us = <0x258>; + min-residency-us = <0x2710>; + linux,phandle = <0x2>; + phandle = <0x2>; + }; + }; + }; + + cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + linux,phandle = <0x1>; + phandle = <0x1>; + + opp00 { + opp-hz = <0x0 0x47868bf4>; + opp-microvolt = <0xf4240>; + clock-latency-ns = <0x7a120>; + }; + + opp01 { + opp-hz = <0x0 0x23c345fa>; + opp-microvolt = <0xf4240>; + clock-latency-ns = <0x7a120>; + }; + + opp02 { + opp-hz = <0x0 0x17d783fc>; + opp-microvolt = <0xf4240>; + clock-latency-ns = <0x7a120>; + }; + + opp03 { + opp-hz = <0x0 0x11e1a2fd>; + opp-microvolt = <0xf4240>; + clock-latency-ns = <0x7a120>; + }; + }; + + dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + pinctrl { + compatible = "xlnx,zynqmp-pinctrl"; + status = "okay"; + + i2c0-default { + linux,phandle = <0x18>; + phandle = <0x18>; + + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + }; + + i2c0-gpio { + linux,phandle = <0x19>; + phandle = <0x19>; + + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + }; + + i2c1-default { + linux,phandle = <0x1c>; + phandle = <0x1c>; + + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + }; + + i2c1-gpio { + linux,phandle = <0x1d>; + phandle = <0x1d>; + + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + }; + + uart0-default { + linux,phandle = <0x31>; + phandle = <0x31>; + + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + uart1-default { + linux,phandle = <0x33>; + phandle = <0x33>; + + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + usb0-default { + linux,phandle = <0x35>; + phandle = <0x35>; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + gem3-default { + linux,phandle = <0x14>; + phandle = <0x14>; + + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + bias-disable; + }; + }; + + can1-default { + linux,phandle = <0x9>; + phandle = <0x9>; + + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + sdhci1-default { + linux,phandle = <0x28>; + phandle = <0x28>; + + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + bias-disable; + }; + + mux-cd { + groups = "sdio1_cd_0_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_cd_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + mux-wp { + groups = "sdio1_wp_0_grp"; + function = "sdio1_wp"; + }; + + conf-wp { + groups = "sdio1_wp_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + }; + + gpio-default { + linux,phandle = <0x16>; + phandle = <0x16>; + + mux-sw { + function = "gpio0"; + groups = "gpio0_22_grp", "gpio0_23_grp"; + }; + + conf-sw { + groups = "gpio0_22_grp", "gpio0_23_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + mux-msp { + function = "gpio0"; + groups = "gpio0_13_grp", "gpio0_38_grp"; + }; + + conf-msp { + groups = "gpio0_13_grp", "gpio0_38_grp"; + slew-rate = <0x1>; + io-standard = <0x1>; + }; + + conf-pull-up { + pins = "MIO22", "MIO23"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO13", "MIO38"; + bias-disable; + }; + }; + }; + + power-domains { + compatible = "xlnx,zynqmp-genpd"; + + pd-usb0 { + #power-domain-cells = <0x0>; + pd-id = <0x16>; + linux,phandle = <0x34>; + phandle = <0x34>; + }; + + pd-usb1 { + #power-domain-cells = <0x0>; + pd-id = <0x17>; + linux,phandle = <0x37>; + phandle = <0x37>; + }; + + pd-sata { + #power-domain-cells = <0x0>; + pd-id = <0x1c>; + linux,phandle = <0x24>; + phandle = <0x24>; + }; + + pd-spi0 { + #power-domain-cells = <0x0>; + pd-id = <0x23>; + linux,phandle = <0x29>; + phandle = <0x29>; + }; + + pd-spi1 { + #power-domain-cells = <0x0>; + pd-id = <0x24>; + linux,phandle = <0x2b>; + phandle = <0x2b>; + }; + + pd-uart0 { + #power-domain-cells = <0x0>; + pd-id = <0x21>; + linux,phandle = <0x30>; + phandle = <0x30>; + }; + + pd-uart1 { + #power-domain-cells = <0x0>; + pd-id = <0x22>; + linux,phandle = <0x32>; + phandle = <0x32>; + }; + + pd-eth0 { + #power-domain-cells = <0x0>; + pd-id = <0x1d>; + linux,phandle = <0xf>; + phandle = <0xf>; + }; + + pd-eth1 { + #power-domain-cells = <0x0>; + pd-id = <0x1e>; + linux,phandle = <0x10>; + phandle = <0x10>; + }; + + pd-eth2 { + #power-domain-cells = <0x0>; + pd-id = <0x1f>; + linux,phandle = <0x11>; + phandle = <0x11>; + }; + + pd-eth3 { + #power-domain-cells = <0x0>; + pd-id = <0x20>; + linux,phandle = <0x12>; + phandle = <0x12>; + }; + + pd-i2c0 { + #power-domain-cells = <0x0>; + pd-id = <0x25>; + linux,phandle = <0x17>; + phandle = <0x17>; + }; + + pd-i2c1 { + #power-domain-cells = <0x0>; + pd-id = <0x26>; + linux,phandle = <0x1b>; + phandle = <0x1b>; + }; + + pd-dp { + #power-domain-cells = <0x0>; + pd-id = <0x29>; + linux,phandle = <0x38>; + phandle = <0x38>; + }; + + pd-gdma { + #power-domain-cells = <0x0>; + pd-id = <0x2a>; + linux,phandle = <0xb>; + phandle = <0xb>; + }; + + pd-adma { + #power-domain-cells = <0x0>; + pd-id = <0x2b>; + linux,phandle = <0xd>; + phandle = <0xd>; + }; + + pd-ttc0 { + #power-domain-cells = <0x0>; + pd-id = <0x18>; + linux,phandle = <0x2c>; + phandle = <0x2c>; + }; + + pd-ttc1 { + #power-domain-cells = <0x0>; + pd-id = <0x19>; + linux,phandle = <0x2d>; + phandle = <0x2d>; + }; + + pd-ttc2 { + #power-domain-cells = <0x0>; + pd-id = <0x1a>; + linux,phandle = <0x2e>; + phandle = <0x2e>; + }; + + pd-ttc3 { + #power-domain-cells = <0x0>; + pd-id = <0x1b>; + linux,phandle = <0x2f>; + phandle = <0x2f>; + }; + + pd-sd0 { + #power-domain-cells = <0x0>; + pd-id = <0x27>; + linux,phandle = <0x26>; + phandle = <0x26>; + }; + + pd-sd1 { + #power-domain-cells = <0x0>; + pd-id = <0x28>; + linux,phandle = <0x27>; + phandle = <0x27>; + }; + + pd-nand { + #power-domain-cells = <0x0>; + pd-id = <0x2c>; + linux,phandle = <0xe>; + phandle = <0xe>; + }; + + pd-qspi { + #power-domain-cells = <0x0>; + pd-id = <0x2d>; + linux,phandle = <0x21>; + phandle = <0x21>; + }; + + pd-gpio { + #power-domain-cells = <0x0>; + pd-id = <0x2e>; + linux,phandle = <0x15>; + phandle = <0x15>; + }; + + pd-can0 { + #power-domain-cells = <0x0>; + pd-id = <0x2f>; + linux,phandle = <0x7>; + phandle = <0x7>; + }; + + pd-can1 { + #power-domain-cells = <0x0>; + pd-id = <0x30>; + linux,phandle = <0x8>; + phandle = <0x8>; + }; + + pd-pcie { + #power-domain-cells = <0x0>; + pd-id = <0x3b>; + linux,phandle = <0x20>; + phandle = <0x20>; + }; + + pd-gpu { + #power-domain-cells = <0x0>; + pd-id = <0x3a 0x14 0x15>; + linux,phandle = <0xc>; + phandle = <0xc>; + }; + }; + + mailbox@ff990400 { + compatible = "xlnx,zynqmp-ipi-mailbox"; + reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region"; + #mbox-cells = <0x1>; + xlnx,ipi-ids = <0x0 0x4>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x23 0x4>; + linux,phandle = <0x5>; + phandle = <0x5>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + firmware { + + zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + }; + }; + + zynqmp-power { + compatible = "xlnx,zynqmp-power"; + mboxes = <0x5 0x0 0x5 0x1>; + mbox-names = "tx", "rx"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <0x4>; + interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>; + }; + + edac { + compatible = "arm,cortex-a53-edac"; + }; + + fpga-full { + compatible = "fpga-region"; + fpga-mgr = <0x6>; + #address-cells = <0x2>; + #size-cells = <0x2>; + }; + + nvmem_firmware { + compatible = "xlnx,zynqmp-nvmem-fw"; + #address-cells = <0x1>; + #size-cells = <0x1>; + + soc_revision@0 { + reg = <0x0 0x4>; + linux,phandle = <0x22>; + phandle = <0x22>; + }; + + efuse_dna@c { + reg = <0xc 0xc>; + }; + + efuse_usr0@20 { + reg = <0x20 0x4>; + }; + + efuse_usr1@24 { + reg = <0x24 0x4>; + }; + + efuse_usr2@28 { + reg = <0x28 0x4>; + }; + + efuse_usr3@2c { + reg = <0x2c 0x4>; + }; + + efuse_usr4@30 { + reg = <0x30 0x4>; + }; + + efuse_usr5@34 { + reg = <0x34 0x4>; + }; + + efuse_usr6@38 { + reg = <0x38 0x4>; + }; + + efuse_usr7@3c { + reg = <0x3c 0x4>; + }; + + efuse_miscusr@40 { + reg = <0x40 0x4>; + }; + + efuse_chash@50 { + reg = <0x50 0x4>; + }; + + efuse_pufmisc@54 { + reg = <0x54 0x4>; + }; + + efuse_sec@58 { + reg = <0x58 0x4>; + }; + + efuse_spkid@5c { + reg = <0x5c 0x4>; + }; + + efuse_ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + + efuse_ppk1hash@d0 { + reg = <0xd0 0x30>; + }; + }; + + pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + clock-names = "ref_clk"; + clocks = <0x3 0x29>; + linux,phandle = <0x6>; + phandle = <0x6>; + }; + + reset-controller { + compatible = "xlnx,zynqmp-reset"; + #reset-cells = <0x1>; + linux,phandle = <0x23>; + phandle = <0x23>; + }; + + zynqmp_rsa { + compatible = "xlnx,zynqmp-rsa"; + }; + + sha384 { + compatible = "xlnx,zynqmp-keccak-384"; + }; + + zynqmp_aes { + compatible = "xlnx,zynqmp-aes"; + }; + + amba_apu@0 { + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x1>; + ranges = <0x0 0x0 0x0 0x0 0xffffffff>; + + interrupt-controller@f9010000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + #interrupt-cells = <0x3>; + reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>; + interrupt-controller; + interrupt-parent = <0x4>; + interrupts = <0x1 0x9 0xf04>; + linux,phandle = <0x4>; + phandle = <0x4>; + }; + }; + + smmu@fd800000 { + compatible = "arm,mmu-500"; + reg = <0x0 0xfd800000 0x0 0x20000>; + #iommu-cells = <0x1>; + status = "disabled"; + #global-interrupts = <0x1>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>; + linux,phandle = <0xa>; + phandle = <0xa>; + }; + + amba { + compatible = "simple-bus"; + u-boot,dm-pre-reloc; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + can@ff060000 { + compatible = "xlnx,zynq-can-1.0"; + status = "disabled"; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff060000 0x0 0x1000>; + interrupts = <0x0 0x17 0x4>; + interrupt-parent = <0x4>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + power-domains = <0x7>; + clocks = <0x3 0x3f 0x3 0x1f>; + }; + + can@ff070000 { + compatible = "xlnx,zynq-can-1.0"; + status = "okay"; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff070000 0x0 0x1000>; + interrupts = <0x0 0x18 0x4>; + interrupt-parent = <0x4>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + power-domains = <0x8>; + clocks = <0x3 0x40 0x3 0x1f>; + pinctrl-names = "default"; + pinctrl-0 = <0x9>; + }; + + cci@fd6e0000 { + compatible = "arm,cci-400"; + reg = <0x0 0xfd6e0000 0x0 0x9000>; + ranges = <0x0 0x0 0xfd6e0000 0x10000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + pmu@9000 { + compatible = "arm,cci-400-pmu,r1"; + reg = <0x9000 0x5000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>; + }; + }; + + dma@fd500000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd500000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x7c 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14e8>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd510000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd510000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x7d 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14e9>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd520000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd520000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x7e 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14ea>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd530000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd530000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x7f 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14eb>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd540000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd540000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x80 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14ec>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd550000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd550000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x81 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14ed>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd560000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd560000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x82 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14ee>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + dma@fd570000 { + status = "okay"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xfd570000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x83 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x80>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x14ef>; + power-domains = <0xb>; + clocks = <0x3 0x13 0x3 0x1f>; + }; + + gpu@fd4b0000 { + status = "okay"; + compatible = "arm,mali-400", "arm,mali-utgard"; + reg = <0x0 0xfd4b0000 0x0 0x10000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>; + interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + clock-names = "gpu", "gpu_pp0", "gpu_pp1"; + power-domains = <0xc>; + clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>; + }; + + dma@ffa80000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffa80000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x4d 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffa90000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffa90000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x4e 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffaa0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffaa0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x4f 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffab0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffab0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x50 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffac0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffac0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x51 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffad0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffad0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x52 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffae0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffae0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x53 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + dma@ffaf0000 { + status = "disabled"; + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xffaf0000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x54 0x4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <0x40>; + #stream-id-cells = <0x1>; + power-domains = <0xd>; + clocks = <0x3 0x44 0x3 0x1f>; + }; + + memory-controller@fd070000 { + compatible = "xlnx,zynqmp-ddrc-2.40a"; + reg = <0x0 0xfd070000 0x0 0x30000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x70 0x4>; + }; + + nand@ff100000 { + compatible = "arasan,nfc-v3p10"; + status = "disabled"; + reg = <0x0 0xff100000 0x0 0x1000>; + clock-names = "clk_sys", "clk_flash"; + interrupt-parent = <0x4>; + interrupts = <0x0 0xe 0x4>; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x872>; + power-domains = <0xe>; + clocks = <0x3 0x3c 0x3 0x1f>; + }; + + ethernet@ff0b0000 { + compatible = "cdns,zynqmp-gem", "cdns,gem"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>; + reg = <0x0 0xff0b0000 0x0 0x1000>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x874>; + power-domains = <0xf>; + clocks = <0x3 0x1f 0x3 0x68 0x3 0x2d 0x3 0x31 0x3 0x2c>; + }; + + ethernet@ff0c0000 { + compatible = "cdns,zynqmp-gem", "cdns,gem"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>; + reg = <0x0 0xff0c0000 0x0 0x1000>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x875>; + power-domains = <0x10>; + clocks = <0x3 0x1f 0x3 0x69 0x3 0x2e 0x3 0x32 0x3 0x2c>; + }; + + ethernet@ff0d0000 { + compatible = "cdns,zynqmp-gem", "cdns,gem"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>; + reg = <0x0 0xff0d0000 0x0 0x1000>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x876>; + power-domains = <0x11>; + clocks = <0x3 0x1f 0x3 0x6a 0x3 0x2f 0x3 0x33 0x3 0x2c>; + }; + + ethernet@ff0e0000 { + compatible = "cdns,zynqmp-gem", "cdns,gem"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>; + reg = <0x0 0xff0e0000 0x0 0x1000>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x877>; + power-domains = <0x12>; + clocks = <0x3 0x1f 0x3 0x6b 0x3 0x30 0x3 0x34 0x3 0x2c>; + phy-handle = <0x13>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <0x14>; + + phy@c { + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,rxctrl-strap-worka; + linux,phandle = <0x13>; + phandle = <0x13>; + }; + }; + + gpio@ff0a0000 { + compatible = "xlnx,zynqmp-gpio-1.0"; + status = "okay"; + #gpio-cells = <0x2>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x10 0x4>; + interrupt-controller; + #interrupt-cells = <0x2>; + reg = <0x0 0xff0a0000 0x0 0x1000>; + gpio-controller; + power-domains = <0x15>; + clocks = <0x3 0x1f>; + pinctrl-names = "default"; + pinctrl-0 = <0x16>; + linux,phandle = <0x1a>; + phandle = <0x1a>; + }; + + i2c@ff020000 { + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x11 0x4>; + reg = <0x0 0xff020000 0x0 0x1000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <0x17>; + clocks = <0x3 0x3d>; + clock-frequency = <0x61a80>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <0x18>; + pinctrl-1 = <0x19>; + scl-gpios = <0x1a 0xe 0x0>; + sda-gpios = <0x1a 0xf 0x0>; + + gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <0x2>; + + gtr_sel0 { + gpio-hog; + gpios = <0x0 0x0>; + output-low; + line-name = "sel0"; + }; + + gtr_sel1 { + gpio-hog; + gpios = <0x1 0x0>; + output-high; + line-name = "sel1"; + }; + + gtr_sel2 { + gpio-hog; + gpios = <0x2 0x0>; + output-high; + line-name = "sel2"; + }; + + gtr_sel3 { + gpio-hog; + gpios = <0x3 0x0>; + output-high; + line-name = "sel3"; + }; + }; + + gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <0x2>; + }; + + i2c-mux@75 { + compatible = "nxp,pca9544"; + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x75>; + + i2c@0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x0>; + + ina226@40 { + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <0x1388>; + }; + + ina226@41 { + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <0x1388>; + }; + + ina226@42 { + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <0x1388>; + }; + + ina226@43 { + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <0x1388>; + }; + + ina226@44 { + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <0x1388>; + }; + + ina226@45 { + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <0x1388>; + }; + + ina226@46 { + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <0x1388>; + }; + + ina226@47 { + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <0x1388>; + }; + + ina226@4a { + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <0x1388>; + }; + + ina226@4b { + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <0x1388>; + }; + }; + + i2c@1 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x1>; + + ina226@40 { + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <0x7d0>; + }; + + ina226@41 { + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <0x1388>; + }; + + ina226@42 { + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <0x1388>; + }; + + ina226@43 { + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <0x1388>; + }; + + ina226@44 { + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <0x1388>; + }; + + ina226@45 { + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <0x1388>; + }; + + ina226@46 { + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <0x1388>; + }; + + ina226@47 { + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <0x1388>; + }; + }; + + i2c@2 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x2>; + + max15301@a { + compatible = "maxim,max15301"; + reg = <0xa>; + }; + + max15303@b { + compatible = "maxim,max15303"; + reg = <0xb>; + }; + + max15303@10 { + compatible = "maxim,max15303"; + reg = <0x10>; + }; + + max15301@13 { + compatible = "maxim,max15301"; + reg = <0x13>; + }; + + max15303@14 { + compatible = "maxim,max15303"; + reg = <0x14>; + }; + + max15303@15 { + compatible = "maxim,max15303"; + reg = <0x15>; + }; + + max15303@16 { + compatible = "maxim,max15303"; + reg = <0x16>; + }; + + max15303@17 { + compatible = "maxim,max15303"; + reg = <0x17>; + }; + + max15301@18 { + compatible = "maxim,max15301"; + reg = <0x18>; + }; + + max15303@1a { + compatible = "maxim,max15303"; + reg = <0x1a>; + }; + + max15303@1d { + compatible = "maxim,max15303"; + reg = <0x1d>; + }; + + max20751@72 { + compatible = "maxim,max20751"; + reg = <0x72>; + }; + + max20751@73 { + compatible = "maxim,max20751"; + reg = <0x73>; + }; + + max15303@1b { + compatible = "maxim,max15303"; + reg = <0x1b>; + }; + }; + }; + }; + + i2c@ff030000 { + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x12 0x4>; + reg = <0x0 0xff030000 0x0 0x1000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <0x1b>; + clocks = <0x3 0x3e>; + clock-frequency = <0x61a80>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <0x1c>; + pinctrl-1 = <0x1d>; + scl-gpios = <0x1a 0x10 0x0>; + sda-gpios = <0x1a 0x11 0x0>; + + i2c-mux@74 { + compatible = "nxp,pca9548"; + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x74>; + + i2c@0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x0>; + + eeprom@54 { + compatible = "atmel,24c08"; + reg = <0x54>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + board-sn@0 { + reg = <0x0 0x14>; + }; + + eth-mac@20 { + reg = <0x20 0x6>; + }; + + board-name@d0 { + reg = <0xd0 0x6>; + }; + + board-revision@e0 { + reg = <0xe0 0x3>; + }; + }; + }; + + i2c@1 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x1>; + + clock-generator@36 { + compatible = "silabs,si5341"; + reg = <0x36>; + }; + }; + + i2c@2 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x2>; + + clock-generator@5d { + #clock-cells = <0x0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <0x32>; + factory-fout = <0x11e1a300>; + clock-frequency = <0x11e1a300>; + clock-output-names = "si570_user"; + }; + }; + + i2c@3 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x3>; + + clock-generator@5d { + #clock-cells = <0x0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <0x32>; + factory-fout = <0x9502f90>; + clock-frequency = <0x8d9ee20>; + clock-output-names = "si570_mgt"; + }; + }; + + i2c@4 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x4>; + + clock-generator@69 { + compatible = "silabs,si5328"; + reg = <0x69>; + }; + }; + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x75>; + + i2c@0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x0>; + + ad7291@2f { + compatible = "adi,ad7291"; + reg = <0x2f>; + }; + + eeprom@50 { + compatible = "at24,24c02"; + reg = <0x50>; + }; + }; + + i2c@1 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x1>; + }; + + i2c@2 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x2>; + }; + + i2c@3 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x3>; + }; + + i2c@4 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x4>; + }; + + i2c@5 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x5>; + }; + + i2c@6 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x6>; + }; + + i2c@7 { + #address-cells = <0x1>; + #size-cells = <0x0>; + reg = <0x7>; + }; + }; + }; + + memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0xa 0x4>; + }; + + perf-monitor@ffa00000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xffa00000 0x0 0x10000>; + interrupts = <0x0 0x19 0x4>; + interrupt-parent = <0x4>; + xlnx,enable-profile = <0x0>; + xlnx,enable-trace = <0x0>; + xlnx,num-monitor-slots = <0x4>; + xlnx,enable-event-count = <0x1>; + xlnx,enable-event-log = <0x1>; + xlnx,have-sampled-metric-cnt = <0x1>; + xlnx,num-of-counters = <0x8>; + xlnx,metric-count-width = <0x20>; + xlnx,metrics-sample-count-width = <0x20>; + xlnx,global-count-width = <0x20>; + xlnx,metric-count-scale = <0x1>; + clocks = <0x3 0x1f>; + }; + + pcie@fd0e0000 { + compatible = "xlnx,nwl-pcie-2.11"; + status = "okay"; + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + msi-controller; + device_type = "pci"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>; + interrupt-names = "misc", "dummy", "intx", "msi1", "msi0"; + msi-parent = <0x1e>; + reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>; + reg-names = "breg", "pcireg", "cfg"; + ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>; + bus-range = <0x0 0xff>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 0x1f 0x1 0x0 0x0 0x0 0x2 0x1f 0x2 0x0 0x0 0x0 0x3 0x1f 0x3 0x0 0x0 0x0 0x4 0x1f 0x4>; + power-domains = <0x20>; + clocks = <0x3 0x17>; + linux,phandle = <0x1e>; + phandle = <0x1e>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0x0>; + #interrupt-cells = <0x1>; + linux,phandle = <0x1f>; + phandle = <0x1f>; + }; + }; + + spi@ff0f0000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-qspi-1.0"; + status = "okay"; + clock-names = "ref_clk", "pclk"; + interrupts = <0x0 0xf 0x4>; + interrupt-parent = <0x4>; + num-cs = <0x1>; + reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x873>; + power-domains = <0x21>; + clocks = <0x3 0x35 0x3 0x1f>; + is-dual = <0x1>; + + flash@0 { + compatible = "m25p80", "spi-flash"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x0>; + spi-tx-bus-width = <0x1>; + spi-rx-bus-width = <0x4>; + spi-max-frequency = <0x66ff300>; + + partition@qspi-fsbl-uboot { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + + partition@qspi-linux { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + + partition@qspi-device-tree { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + + partition@qspi-rootfs { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + }; + }; + + rtc@ffa60000 { + compatible = "xlnx,zynqmp-rtc"; + status = "okay"; + reg = <0x0 0xffa60000 0x0 0x100>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>; + interrupt-names = "alarm", "sec"; + calibration = <0x8000>; + }; + + zynqmp_phy@fd400000 { + compatible = "xlnx,zynqmp-psgtr-v1.1"; + status = "okay"; + reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>; + reg-names = "serdes", "siou"; + nvmem-cells = <0x22>; + nvmem-cell-names = "soc_revision"; + resets = <0x23 0x10 0x23 0x3b 0x23 0x3c 0x23 0x3d 0x23 0x3e 0x23 0x3f 0x23 0x40 0x23 0x3 0x23 0x1d 0x23 0x1e 0x23 0x1f 0x23 0x20>; + reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst"; + + lane0 { + #phy-cells = <0x4>; + }; + + lane1 { + #phy-cells = <0x4>; + linux,phandle = <0x3a>; + phandle = <0x3a>; + }; + + lane2 { + #phy-cells = <0x4>; + linux,phandle = <0x36>; + phandle = <0x36>; + }; + + lane3 { + #phy-cells = <0x4>; + linux,phandle = <0x25>; + phandle = <0x25>; + }; + }; + + ahci@fd0c0000 { + compatible = "ceva,ahci-1v84"; + status = "okay"; + reg = <0x0 0xfd0c0000 0x0 0x2000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x85 0x4>; + power-domains = <0x24>; + #stream-id-cells = <0x4>; + clocks = <0x3 0x16>; + ceva,p0-cominit-params = <0x18401828>; + ceva,p0-comwake-params = <0x614080e>; + ceva,p0-burst-params = <0x13084a06>; + ceva,p0-retry-params = <0x96a43ffc>; + ceva,p1-cominit-params = <0x18401828>; + ceva,p1-comwake-params = <0x614080e>; + ceva,p1-burst-params = <0x13084a06>; + ceva,p1-retry-params = <0x96a43ffc>; + phy-names = "sata-phy"; + phys = <0x25 0x1 0x1 0x1 0x7735940>; + }; + + mmc@ff160000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x30 0x4>; + reg = <0x0 0xff160000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0x0>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x870>; + power-domains = <0x26>; + nvmem-cells = <0x22>; + nvmem-cell-names = "soc_revision"; + broken-mmc-highspeed; + clocks = <0x3 0x36 0x3 0x1f>; + }; + + mmc@ff170000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x31 0x4>; + reg = <0x0 0xff170000 0x0 0x1000>; + clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0x1>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x871>; + power-domains = <0x27>; + nvmem-cells = <0x22>; + nvmem-cell-names = "soc_revision"; + broken-mmc-highspeed; + clocks = <0x3 0x37 0x3 0x1f>; + pinctrl-names = "default"; + pinctrl-0 = <0x28>; + no-1-8-v; + xlnx,mio_bank = <0x1>; + }; + + spi@ff040000 { + compatible = "cdns,spi-r1p6"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x13 0x4>; + reg = <0x0 0xff040000 0x0 0x1000>; + clock-names = "ref_clk", "pclk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <0x29>; + clocks = <0x3 0x3a 0x3 0x1f>; + + ad9361-phy@0 { + compatible = "adi,ad9361"; + reg = <0x0>; + spi-cpha; + spi-max-frequency = <0x989680>; + clocks = <0x2a 0x0>; + clock-names = "ad9361_ext_refclk"; + clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; + #clock-cells = <0x1>; + adi,digital-interface-tune-skip-mode = <0x0>; + adi,pp-tx-swap-enable; + adi,pp-rx-swap-enable; + adi,rx-frame-pulse-mode-enable; + adi,lvds-mode-enable; + adi,lvds-bias-mV = <0x96>; + adi,lvds-rx-onchip-termination-enable; + adi,rx-data-delay = <0x4>; + adi,tx-fb-clock-delay = <0x7>; + adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; + adi,2rx-2tx-mode-enable; + adi,frequency-division-duplex-mode-enable; + adi,rx-rf-port-input-select = <0x0>; + adi,tx-rf-port-input-select = <0x0>; + adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; + adi,rf-rx-bandwidth-hz = <0x112a880>; + adi,rf-tx-bandwidth-hz = <0x112a880>; + adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; + adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; + adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; + adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; + adi,gc-rx1-mode = <0x2>; + adi,gc-rx2-mode = <0x2>; + adi,gc-adc-ovr-sample-size = <0x4>; + adi,gc-adc-small-overload-thresh = <0x2f>; + adi,gc-adc-large-overload-thresh = <0x3a>; + adi,gc-lmt-overload-high-thresh = <0x320>; + adi,gc-lmt-overload-low-thresh = <0x2c0>; + adi,gc-dec-pow-measurement-duration = <0x2000>; + adi,gc-low-power-thresh = <0x18>; + adi,mgc-inc-gain-step = <0x2>; + adi,mgc-dec-gain-step = <0x2>; + adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; + adi,agc-attack-delay-extra-margin-us = <0x1>; + adi,agc-outer-thresh-high = <0x5>; + adi,agc-outer-thresh-high-dec-steps = <0x2>; + adi,agc-inner-thresh-high = <0xa>; + adi,agc-inner-thresh-high-dec-steps = <0x1>; + adi,agc-inner-thresh-low = <0xc>; + adi,agc-inner-thresh-low-inc-steps = <0x1>; + adi,agc-outer-thresh-low = <0x12>; + adi,agc-outer-thresh-low-inc-steps = <0x2>; + adi,agc-adc-small-overload-exceed-counter = <0xa>; + adi,agc-adc-large-overload-exceed-counter = <0xa>; + adi,agc-adc-large-overload-inc-steps = <0x2>; + adi,agc-lmt-overload-large-exceed-counter = <0xa>; + adi,agc-lmt-overload-small-exceed-counter = <0xa>; + adi,agc-lmt-overload-large-inc-steps = <0x2>; + adi,agc-gain-update-interval-us = <0x3e8>; + adi,fagc-dec-pow-measurement-duration = <0x40>; + adi,fagc-lp-thresh-increment-steps = <0x1>; + adi,fagc-lp-thresh-increment-time = <0x5>; + adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; + adi,fagc-final-overrange-count = <0x3>; + adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; + adi,fagc-lmt-final-settling-steps = <0x1>; + adi,fagc-lock-level = <0xa>; + adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; + adi,fagc-lock-level-lmt-gain-increase-enable; + adi,fagc-lpf-final-settling-steps = <0x1>; + adi,fagc-optimized-gain-offset = <0x5>; + adi,fagc-power-measurement-duration-in-state5 = <0x40>; + adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; + adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; + adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; + adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; + adi,fagc-rst-gla-large-adc-overload-enable; + adi,fagc-rst-gla-large-lmt-overload-enable; + adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; + adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; + adi,fagc-state-wait-time-ns = <0x104>; + adi,fagc-use-last-lock-level-for-set-gain-enable; + adi,rssi-restart-mode = <0x3>; + adi,rssi-delay = <0x1>; + adi,rssi-wait = <0x1>; + adi,rssi-duration = <0x3e8>; + adi,ctrl-outs-index = <0x0>; + adi,ctrl-outs-enable-mask = <0xff>; + adi,temp-sense-measurement-interval-ms = <0x3e8>; + adi,temp-sense-offset-signed = <0xce>; + adi,temp-sense-periodic-measurement-enable; + adi,aux-dac-manual-mode-enable; + adi,aux-dac1-default-value-mV = <0x0>; + adi,aux-dac1-rx-delay-us = <0x0>; + adi,aux-dac1-tx-delay-us = <0x0>; + adi,aux-dac2-default-value-mV = <0x0>; + adi,aux-dac2-rx-delay-us = <0x0>; + adi,aux-dac2-tx-delay-us = <0x0>; + en_agc-gpios = <0x1a 0x7a 0x0>; + sync-gpios = <0x1a 0x7b 0x0>; + reset-gpios = <0x1a 0x7c 0x0>; + enable-gpios = <0x1a 0x7d 0x0>; + txnrx-gpios = <0x1a 0x7e 0x0>; + linux,phandle = <0x45>; + phandle = <0x45>; + }; + }; + + spi@ff050000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x14 0x4>; + reg = <0x0 0xff050000 0x0 0x1000>; + clock-names = "ref_clk", "pclk"; + #address-cells = <0x1>; + #size-cells = <0x0>; + power-domains = <0x2b>; + clocks = <0x3 0x3b 0x3 0x1f>; + }; + + timer@ff110000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>; + reg = <0x0 0xff110000 0x0 0x1000>; + timer-width = <0x20>; + power-domains = <0x2c>; + clocks = <0x3 0x1f>; + }; + + timer@ff120000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>; + reg = <0x0 0xff120000 0x0 0x1000>; + timer-width = <0x20>; + power-domains = <0x2d>; + clocks = <0x3 0x1f>; + }; + + timer@ff130000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>; + reg = <0x0 0xff130000 0x0 0x1000>; + timer-width = <0x20>; + power-domains = <0x2e>; + clocks = <0x3 0x1f>; + }; + + timer@ff140000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>; + reg = <0x0 0xff140000 0x0 0x1000>; + timer-width = <0x20>; + power-domains = <0x2f>; + clocks = <0x3 0x1f>; + }; + + serial@ff000000 { + u-boot,dm-pre-reloc; + compatible = "cdns,uart-r1p12", "xlnx,xuartps"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x15 0x4>; + reg = <0x0 0xff000000 0x0 0x1000>; + clock-names = "uart_clk", "pclk"; + power-domains = <0x30>; + clocks = <0x3 0x38 0x3 0x1f>; + pinctrl-names = "default"; + pinctrl-0 = <0x31>; + }; + + serial@ff010000 { + u-boot,dm-pre-reloc; + compatible = "cdns,uart-r1p12", "xlnx,xuartps"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x16 0x4>; + reg = <0x0 0xff010000 0x0 0x1000>; + clock-names = "uart_clk", "pclk"; + power-domains = <0x32>; + clocks = <0x3 0x39 0x3 0x1f>; + pinctrl-names = "default"; + pinctrl-0 = <0x33>; + }; + + usb0@ff9d0000 { + #address-cells = <0x2>; + #size-cells = <0x2>; + status = "okay"; + compatible = "xlnx,zynqmp-dwc3"; + reg = <0x0 0xff9d0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; + power-domains = <0x34>; + ranges; + nvmem-cells = <0x22>; + nvmem-cell-names = "soc_revision"; + clocks = <0x3 0x20 0x3 0x22>; + pinctrl-names = "default"; + pinctrl-0 = <0x35>; + + dwc3@fe200000 { + compatible = "snps,dwc3"; + status = "okay"; + reg = <0x0 0xfe200000 0x0 0x40000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x860>; + snps,quirk-frame-length-adjustment = <0x20>; + snps,refclk_fladj; + snps,enable_guctl1_resume_quirk; + snps,enable_guctl1_ipd_quirk; + snps,xhci-stream-quirk; + dr_mode = "otg"; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; + phys = <0x36 0x4 0x0 0x2 0x18cba80>; + maximum-speed = "super-speed"; + }; + }; + + usb1@ff9e0000 { + #address-cells = <0x2>; + #size-cells = <0x2>; + status = "disabled"; + compatible = "xlnx,zynqmp-dwc3"; + reg = <0x0 0xff9e0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; + power-domains = <0x37>; + ranges; + nvmem-cells = <0x22>; + nvmem-cell-names = "soc_revision"; + clocks = <0x3 0x21 0x3 0x22>; + + dwc3@fe300000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xfe300000 0x0 0x40000>; + interrupt-parent = <0x4>; + interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>; + #stream-id-cells = <0x1>; + iommus = <0xa 0x861>; + snps,quirk-frame-length-adjustment = <0x20>; + snps,refclk_fladj; + snps,enable_guctl1_resume_quirk; + snps,enable_guctl1_ipd_quirk; + snps,xhci-stream-quirk; + }; + }; + + watchdog@fd4d0000 { + compatible = "cdns,wdt-r1p2"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x71 0x1>; + reg = <0x0 0xfd4d0000 0x0 0x1000>; + timeout-sec = <0x3c>; + reset-on-timeout; + clocks = <0x3 0x4b>; + }; + + watchdog@ff150000 { + compatible = "cdns,wdt-r1p2"; + status = "disabled"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x34 0x1>; + reg = <0x0 0xff150000 0x0 0x1000>; + timeout-sec = <0xa>; + clocks = <0x3 0x4b>; + }; + + ams@ffa50000 { + compatible = "xlnx,zynqmp-ams"; + status = "okay"; + interrupt-parent = <0x4>; + interrupts = <0x0 0x38 0x4>; + interrupt-names = "ams-irq"; + reg = <0x0 0xffa50000 0x0 0x800>; + reg-names = "ams-base"; + #address-cells = <0x2>; + #size-cells = <0x2>; + #io-channel-cells = <0x1>; + ranges; + clocks = <0x3 0x46>; + + ams_ps@ffa50800 { + compatible = "xlnx,zynqmp-ams-ps"; + status = "okay"; + reg = <0x0 0xffa50800 0x0 0x400>; + }; + + ams_pl@ffa50c00 { + compatible = "xlnx,zynqmp-ams-pl"; + status = "okay"; + reg = <0x0 0xffa50c00 0x0 0x400>; + }; + }; + + dma@fd4c0000 { + compatible = "xlnx,dpdma"; + status = "okay"; + reg = <0x0 0xfd4c0000 0x0 0x1000>; + interrupts = <0x0 0x7a 0x4>; + interrupt-parent = <0x4>; + clock-names = "axi_clk"; + power-domains = <0x38>; + dma-channels = <0x6>; + #dma-cells = <0x1>; + clocks = <0x3 0x14>; + linux,phandle = <0x3b>; + phandle = <0x3b>; + + dma-video0channel { + compatible = "xlnx,video0"; + }; + + dma-video1channel { + compatible = "xlnx,video1"; + }; + + dma-video2channel { + compatible = "xlnx,video2"; + }; + + dma-graphicschannel { + compatible = "xlnx,graphics"; + }; + + dma-audio0channel { + compatible = "xlnx,audio0"; + }; + + dma-audio1channel { + compatible = "xlnx,audio1"; + }; + }; + + zynqmp-display@fd4a0000 { + compatible = "xlnx,zynqmp-dpsub-1.7"; + status = "okay"; + reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf", "aud"; + interrupts = <0x0 0x77 0x4>; + interrupt-parent = <0x4>; + clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in"; + power-domains = <0x38>; + clocks = <0x39 0x3 0x11 0x3 0x10>; + phy-names = "dp-phy0"; + phys = <0x3a 0x5 0x0 0x3 0x19bfcc0>; + + vid-layer { + dma-names = "vid0", "vid1", "vid2"; + dmas = <0x3b 0x0 0x3b 0x1 0x3b 0x2>; + }; + + gfx-layer { + dma-names = "gfx0"; + dmas = <0x3b 0x3>; + }; + + i2c-bus { + }; + + zynqmp_dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + clock-names = "aud_clk"; + clocks = <0x3 0x11>; + status = "okay"; + linux,phandle = <0x3e>; + phandle = <0x3e>; + }; + + zynqmp_dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <0x3b 0x4>; + dma-names = "tx"; + status = "okay"; + linux,phandle = <0x3c>; + phandle = <0x3c>; + }; + + zynqmp_dp_snd_pcm1 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <0x3b 0x5>; + dma-names = "tx"; + status = "okay"; + linux,phandle = <0x3d>; + phandle = <0x3d>; + }; + + zynqmp_dp_snd_card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <0x3c 0x3d>; + xlnx,dp-snd-codec = <0x3e>; + status = "okay"; + }; + }; + }; + + fclk0 { + status = "disabled"; + compatible = "xlnx,fclk"; + clocks = <0x3 0x47>; + }; + + fclk1 { + status = "disabled"; + compatible = "xlnx,fclk"; + clocks = <0x3 0x48>; + }; + + fclk2 { + status = "disabled"; + compatible = "xlnx,fclk"; + clocks = <0x3 0x49>; + }; + + fclk3 { + status = "disabled"; + compatible = "xlnx,fclk"; + clocks = <0x3 0x4a>; + }; + + pss_ref_clk { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x1fca055>; + linux,phandle = <0x3f>; + phandle = <0x3f>; + }; + + video_clk { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x19bfcc0>; + linux,phandle = <0x40>; + phandle = <0x40>; + }; + + pss_alt_ref_clk { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x0>; + linux,phandle = <0x41>; + phandle = <0x41>; + }; + + gt_crx_ref_clk { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x66ff300>; + linux,phandle = <0x43>; + phandle = <0x43>; + }; + + aux_ref_clk { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x19bfcc0>; + linux,phandle = <0x42>; + phandle = <0x42>; + }; + + clk { + u-boot,dm-pre-reloc; + #clock-cells = <0x1>; + compatible = "xlnx,zynqmp-clk"; + clocks = <0x3f 0x40 0x41 0x42 0x43>; + clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk"; + linux,phandle = <0x3>; + phandle = <0x3>; + }; + + dp_aclk { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <0x5f5e100>; + clock-accuracy = <0x64>; + linux,phandle = <0x39>; + phandle = <0x39>; + }; + + aliases { + ethernet0 = "/amba/ethernet@ff0e0000"; + gpio0 = "/amba/gpio@ff0a0000"; + i2c0 = "/amba/i2c@ff020000"; + i2c1 = "/amba/i2c@ff030000"; + mmc0 = "/amba/mmc@ff170000"; + rtc0 = "/amba/rtc@ffa60000"; + serial0 = "/amba/serial@ff000000"; + serial1 = "/amba/serial@ff010000"; + serial2 = "/dcc"; + spi0 = "/amba/spi@ff0f0000"; + usb0 = "/amba/usb0@ff9d0000"; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000 0x8 0x0 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + sw19 { + label = "sw19"; + gpios = <0x1a 0x16 0x0>; + linux,code = <0x6c>; + gpio-key,wakeup; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat_led { + label = "heartbeat"; + gpios = <0x1a 0x17 0x0>; + linux,default-trigger = "heartbeat"; + }; + }; + + fpga-axi@0 { + interrupt-parent = <0x4>; + compatible = "simple-bus"; + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges = <0x0 0x0 0x0 0xffffffff>; + + dma@9c400000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x9c400000 0x10000>; + #dma-cells = <0x1>; + #clock-cells = <0x0>; + interrupts = <0x0 0x6d 0x0>; + clocks = <0x3 0x47>; + linux,phandle = <0x44>; + phandle = <0x44>; + + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x2>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x0>; + }; + }; + }; + + dma@9c420000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x9c420000 0x10000>; + #dma-cells = <0x1>; + #clock-cells = <0x0>; + interrupts = <0x0 0x6c 0x0>; + clocks = <0x3 0x47>; + linux,phandle = <0x46>; + phandle = <0x46>; + + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x0>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x2>; + }; + }; + }; + + sdr: sdr { + compatible ="sdr,sdr"; + dmas = <&rx_dma 0 + &rx_dma 1 + &tx_dma 0 + &tx_dma 1>; + dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm"; + interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1"; + interrupts = <0 89 1 0 90 1 0 93 1 0 94 1>; + } ; + + axidmatest_1: axidmatest@1 { + compatible ="xlnx,axi-dma-test-1.00.a"; + dmas = <&rx_dma 0 + &rx_dma 1>; + dma-names = "axidma0", "axidma1"; + } ; + + tx_dma: dma@a0000000 { + #dma-cells = <1>; + clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; + clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>, <0x3 0x49>; + compatible = "xlnx,axi-dma-1.00.a"; + interrupt-names = "mm2s_introut", "s2mm_introut"; + interrupts = <0 95 4 0 96 4>; + reg = <0xA0000000 0x1000>; + xlnx,addrwidth = <0x28>; + xlnx,include-sg ; + xlnx,sg-length-width = <0xe>; + dma-channel@a0000000 { + compatible = "xlnx,axi-dma-mm2s-channel"; + dma-channels = <0x1>; + interrupts = <0 95 4>; + xlnx,datawidth = <0x40>; + xlnx,device-id = <0x0>; + }; + dma-channel@A0000030 { + compatible = "xlnx,axi-dma-s2mm-channel"; + dma-channels = <0x1>; + interrupts = <0 96 4>; + xlnx,datawidth = <0x40>; + xlnx,device-id = <0x0>; + }; + }; + + rx_dma: dma@a0001000 { + #dma-cells = <1>; + clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; + clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>, <0x3 0x49>; + compatible = "xlnx,axi-dma-1.00.a"; + //dma-coherent ; + interrupt-names = "mm2s_introut", "s2mm_introut"; + interrupts = <0 91 4 0 92 4>; + reg = <0xA0001000 0x1000>; + xlnx,addrwidth = <0x28>; + xlnx,include-sg ; + xlnx,sg-length-width = <0xe>; + dma-channel@a0001000 { + compatible = "xlnx,axi-dma-mm2s-channel"; + dma-channels = <0x1>; + interrupts = <0 91 4>; + xlnx,datawidth = <0x40>; + xlnx,device-id = <0x1>; + }; + dma-channel@A0001030 { + compatible = "xlnx,axi-dma-s2mm-channel"; + dma-channels = <0x1>; + interrupts = <0 92 4>; + xlnx,datawidth = <0x40>; + xlnx,device-id = <0x1>; + }; + }; + + tx_intf_0: tx_intf@a0005000 { + clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk"; + clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>, <0x3 0x49>; + compatible = "sdr,tx_intf"; + interrupt-names = "tx_itrpt0", "tx_itrpt1"; + interrupts = <0 93 1 0 94 1>; + reg = <0xA0005000 0x1000>; + xlnx,s00-axi-addr-width = <0x7>; + xlnx,s00-axi-data-width = <0x20>; + }; + + rx_intf_0: rx_intf@a0004000 { + clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk"; + clocks = <0x3 0x49>, <0x3 0x49>, <0x3 0x49>; + compatible = "sdr,rx_intf"; + interrupt-names = "not_valid_anymore", "rx_pkt_intr"; + interrupts = <0 89 1 0 90 1>; + reg = <0xA0004000 0x1000>; + xlnx,s00-axi-addr-width = <0x7>; + xlnx,s00-axi-data-width = <0x20>; + }; + + openofdm_tx_0: openofdm_tx@a0003000 { + clock-names = "clk"; + clocks = <0x3 0x49>; + compatible = "sdr,openofdm_tx"; + reg = <0xA0003000 0x1000>; + }; + + openofdm_rx_0: openofdm_rx@a0002000 { + clock-names = "clk"; + clocks = <0x3 0x49>; + compatible = "sdr,openofdm_rx"; + reg = <0xA0002000 0x1000>; + }; + + xpu_0: xpu@a0006000 { + clock-names = "s00_axi_aclk"; + clocks = <0x3 0x49>; + compatible = "sdr,xpu"; + reg = <0xA0006000 0x1000>; + }; + + cf-ad9361-lpc@99020000 { + compatible = "adi,axi-ad9361-6.00.a"; + reg = <0x99020000 0x6000>; + dmas = <0x44 0x0>; + dma-names = "rx"; + spibus-connected = <0x45>; + }; + + cf-ad9361-dds-core-lpc@99024000 { + compatible = "adi,axi-ad9361-dds-6.00.a"; + reg = <0x99024000 0x1000>; + clocks = <0x45 0xd>; + clock-names = "sampl_clk"; + dmas = <0x46 0x0>; + dma-names = "tx"; + }; + + axi-sysid-0@85000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x85000000 0x10000>; + }; + }; + + clocks { + + clock@0 { + compatible = "fixed-clock"; + clock-frequency = <0x2625a00>; + clock-output-names = "ad9361_ext_refclk"; + #clock-cells = <0x0>; + linux,phandle = <0x2a>; + phandle = <0x2a>; + }; + }; +}; diff --git a/kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf b/kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf new file mode 100644 index 0000000..d4edf69 Binary files /dev/null and b/kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf differ diff --git a/kernel_boot/boards/zed_fmcs2/devicetree.dts b/kernel_boot/boards/zed_fmcs2/devicetree.dts index b3b3727..b99efaa 100644 --- a/kernel_boot/boards/zed_fmcs2/devicetree.dts +++ b/kernel_boot/boards/zed_fmcs2/devicetree.dts @@ -192,9 +192,6 @@ #size-cells = <0x0>; ad9361-phy@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; - #clock-cells = <0x1>; compatible = "adi,ad9361"; reg = <0x0>; spi-cpha; @@ -202,6 +199,7 @@ clocks = <0x5 0x0>; clock-names = "ad9361_ext_refclk"; clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; + #clock-cells = <0x1>; adi,digital-interface-tune-skip-mode = <0x0>; adi,pp-tx-swap-enable; adi,pp-rx-swap-enable; @@ -217,6 +215,7 @@ adi,rx-rf-port-input-select = <0x0>; adi,tx-rf-port-input-select = <0x0>; adi,tx-attenuation-mdB = <0x2710>; + adi,tx-lo-powerdown-managed-enable; adi,rf-rx-bandwidth-hz = <0x112a880>; adi,rf-tx-bandwidth-hz = <0x112a880>; adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; @@ -312,8 +311,6 @@ #size-cells = <0x0>; adf4351-udc-tx-pmod@0 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x0>; spi-max-frequency = <0x989680>; @@ -330,8 +327,6 @@ }; adf4351-udc-rx-pmod@1 { - #address-cells = <0x1>; - #size-cells = <0x0>; compatible = "adi,adf4351"; reg = <0x1>; spi-max-frequency = <0x989680>; @@ -456,7 +451,7 @@ #size-cells = <0x0>; }; - sdhci@e0100000 { + mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "okay"; clock-names = "clk_xin", "clk_ahb"; @@ -464,10 +459,9 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x18 0x4>; reg = <0xe0100000 0x1000>; - broken-adma2; }; - sdhci@e0101000 { + mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -475,10 +469,10 @@ interrupt-parent = <0x1>; interrupts = <0x0 0x2f 0x4>; reg = <0xe0101000 0x1000>; - broken-adma2; }; slcr@f8000000 { + u-boot,dm-pre-reloc; #address-cells = <0x1>; #size-cells = <0x1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; @@ -488,6 +482,7 @@ phandle = <0x9>; clkc@100 { + u-boot,dm-pre-reloc; #clock-cells = <0x1>; compatible = "xlnx,ps7-clkc"; fclk-enable = <0xf>; @@ -685,23 +680,26 @@ }; /* - axivdma@43000000 { - compatible = "xlnx,axi-vdma-1.00.a"; - #address-cells = <0x1>; - #size-cells = <0x1>; + dma@43000000 { + compatible = "adi,axi-dmac-1.00.a"; + reg = <0x43000000 0x10000>; #dma-cells = <0x1>; - #dma-channels = <0x1>; - reg = <0x43000000 0x1000>; - xlnx,num-fstores = <0x3>; + interrupts = <0x0 0x3b 0x0>; + clocks = <0x2 0x10>; linux,phandle = <0xc>; phandle = <0xc>; - dma-channel@43000000 { - compatible = "xlnx,axi-vdma-mm2s-channel"; - interrupts = <0x0 0x3b 0x4>; - xlnx,datawidth = <0x40>; - xlnx,genlock-mode = <0x0>; - xlnx,include-dre = <0x0>; + adi,channels { + #size-cells = <0x0>; + #address-cells = <0x1>; + + dma-channel@0 { + reg = <0x0>; + adi,source-bus-width = <0x40>; + adi,source-bus-type = <0x0>; + adi,destination-bus-width = <0x40>; + adi,destination-bus-type = <0x1>; + }; }; }; @@ -756,6 +754,11 @@ phandle = <0x15>; }; + axi-sysid-0@45000000 { + compatible = "adi,axi-sysid-1.00.a"; + reg = <0x45000000 0x10000>; + }; + i2c@41620000 { compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a"; reg = <0x41620000 0x10000>; @@ -796,7 +799,6 @@ adi,source-bus-type = <0x2>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x0>; - adi,length-width = <0x18>; }; }; }; @@ -820,8 +822,6 @@ adi,source-bus-type = <0x0>; adi,destination-bus-width = <0x40>; adi,destination-bus-type = <0x2>; - adi,length-width = <0x18>; - adi,cyclic; }; }; }; @@ -1064,19 +1064,19 @@ clocks { clock@0 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x2625a00>; clock-output-names = "ad9361_ext_refclk"; + #clock-cells = <0x0>; linux,phandle = <0x5>; phandle = <0x5>; }; clock@1 { - #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x17d7840>; clock-output-names = "refclk"; + #clock-cells = <0x0>; linux,phandle = <0x7>; phandle = <0x7>; }; diff --git a/kernel_boot/build_boot_bin.sh b/kernel_boot/build_boot_bin.sh index 9ae14a8..668d61c 100755 --- a/kernel_boot/build_boot_bin.sh +++ b/kernel_boot/build_boot_bin.sh @@ -1,13 +1,14 @@ #!/bin/bash +# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynq_2014r2 if [ "$#" -ne 1 ]; then echo "You must enter the \$BOARD_NAME as argument" - echo "Like: adrv9364z7020 adrv9361z7035 adrv9361z7035_fmc zc706_fmcs2 zed_fmcs2 zc702_fmcs2" + echo "Like: adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371" exit 1 fi BOARD_NAME=$1 -if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9361z7035_fmc" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then +if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then echo "\$BOARD_NAME is not correct. Please check!" exit 1 else diff --git a/kernel_boot/build_zynqmp_boot_bin.sh b/kernel_boot/build_zynqmp_boot_bin.sh new file mode 100755 index 0000000..72af9c6 --- /dev/null +++ b/kernel_boot/build_zynqmp_boot_bin.sh @@ -0,0 +1,162 @@ +#!/bin/bash +# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynqmp + +set -ex + +HDF_FILE=$1 +UBOOT_FILE=$2 +ATF_FILE=${3:-download} +BUILD_DIR=build_boot_bin +OUTPUT_DIR=output_boot_bin + +usage () { + echo "usage: $0 system_top.hdf u-boot.elf (download | bl31.elf | ) [output-archive]" + exit 1 +} + +depends () { + echo "Xilinx $1 must be installed and in your PATH" + echo "try: source /opt/Xilinx/Vivado/201x.x/settings64.sh" + exit 1 +} + +### Check command line parameters +echo $HDF_FILE | grep -q ".hdf" || usage +echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" || usage + +if [ ! -f $HDF_FILE ]; then + echo $HDF_FILE: File not found! + usage +fi + +if [ ! -f $UBOOT_FILE ]; then + echo $UBOOT_FILE: File not found! + usage +fi + +### Check for required Xilinx tools +command -v xsdk >/dev/null 2>&1 || depends xsdk +command -v bootgen >/dev/null 2>&1 || depends bootgen +command -v hsi >/dev/null 2>&1 || depends hsi + +rm -Rf $BUILD_DIR $OUTPUT_DIR +mkdir -p $OUTPUT_DIR +mkdir -p $BUILD_DIR + +# 2017.4 use 47af34b94a52b8cdc8abbac44b6f3ffab33a2206 +# 2018.1 use df4a7e97d57494c7d79de51b1e0e450d982cea98 +# 2018.2 use 93a69a5a3bc318027da4af5911124537f4907642 +# 2018.3 use 08560c36ea5b6f48b962cb4bd9a79b35bb3d95ce + +hsi_ver=$(hsi -version | head -1 | cut -d' ' -f2) +if [ -z "$hsi_ver" ] ; then + echo "Could not determine Vivado version" + exit 1 +fi +atf_version=xilinx-$hsi_ver + +### Check if ATF_FILE is .elf or path to arm-trusted-firmware +if [ "$ATF_FILE" != "" ] && [ -d $ATF_FILE ]; then +### Build arm-trusted-firmware bl31.elf +( + cd $ATF_FILE + make distclean + git checkout $atf_version + make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 +) + cp $ATF_FILE/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf +elif [ "$ATF_FILE" == "download" ]; then +( + command -v git >/dev/null 2>&1 || depends git + cd $BUILD_DIR + git clone https://github.com/Xilinx/arm-trusted-firmware.git + cd arm-trusted-firmware + git checkout $atf_version + make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 +) + cp $BUILD_DIR/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf +else + echo $ATF_FILE | grep -q -e "bl31.elf" || usage + if [ ! -f $ATF_FILE ]; then + echo $ATF_FILE: File not found! + usage + fi + cp $ATF_FILE $OUTPUT_DIR/bl31.elf +fi + +cp $HDF_FILE $BUILD_DIR/ +cp $UBOOT_FILE $OUTPUT_DIR/u-boot.elf +cp $HDF_FILE $OUTPUT_DIR/ + +# get the tools version (e.g., v2018.3) +tool_version=$(hsi -version) +tool_version=${tool_version#hsi\ } +tool_version=${tool_version%\ (64-bit)*} + +# Work-arownd for MPSoC ZCU102 and ZCU106 Evaluation Kits - DDR4 SODIMM change +# (https://www.xilinx.com/support/answers/71961.html) +if [ $tool_version == "v2018.3" ];then +( + wget https://www.xilinx.com/Attachment/72113-files.zip -P $BUILD_DIR + unzip $BUILD_DIR/72113-files.zip -d $BUILD_DIR +) +fi + +### Create create_fsbl_project.tcl file used by xsdk to create the fsbl +echo "hsi open_hw_design `basename $HDF_FILE`" > $BUILD_DIR/create_fsbl_project.tcl +echo 'set cpu_name [lindex [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 0]' >> $BUILD_DIR/create_fsbl_project.tcl +echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl +echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl +echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq MP FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl +echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl +if [ $tool_version == "v2018.3" ];then +( + echo "file copy -force xfsbl_ddr_init.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl + echo "file copy -force xfsbl_hooks.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl + echo "file copy -force xfsbl_hooks.h ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl +) +fi +echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl + +### Create create_pmufw_project.tcl +echo "set hwdsgn [open_hw_design `basename $HDF_FILE`]" > $BUILD_DIR/create_pmufw_project.tcl +echo 'generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -sw pmufw -dir pmufw' >> $BUILD_DIR/create_pmufw_project.tcl +echo 'quit' >> $BUILD_DIR/create_pmufw_project.tcl + +### Create zynq.bif file used by bootgen +echo "the_ROM_image:" > $OUTPUT_DIR/zynq.bif +echo "{" >> $OUTPUT_DIR/zynq.bif +echo "[bootloader,destination_cpu=a53-0] fsbl.elf" >> $OUTPUT_DIR/zynq.bif +echo "[pmufw_image] pmufw.elf" >> $OUTPUT_DIR/zynq.bif +echo "[destination_device=pl] system_top.bit" >> $OUTPUT_DIR/zynq.bif +echo "[destination_cpu=a53-0,exception_level=el-3,trustzone] bl31.elf" >> $OUTPUT_DIR/zynq.bif +echo "[destination_cpu=a53-0, exception_level=el-2] u-boot.elf" >> $OUTPUT_DIR/zynq.bif +echo "}" >> $OUTPUT_DIR/zynq.bif + + +### Build fsbl.elf & pmufw.elf +( + cd $BUILD_DIR + xsdk -batch -source create_fsbl_project.tcl + hsi -source create_pmufw_project.tcl + ### There was a bug in some vivado version where they build would fail -> check CC_FLAGS + grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile + cd pmufw + make +) + +### Copy fsbl and system_top.bit into the output folder +cp $BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf $OUTPUT_DIR/fsbl.elf +cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit +cp $BUILD_DIR/pmufw/executable.elf $OUTPUT_DIR/pmufw.elf + +### Build BOOT.BIN +( + cd $OUTPUT_DIR + bootgen -arch zynqmp -image zynq.bif -o BOOT.BIN -w +) + +### Optionally tar.gz the entire output folder with the name given in argument 3 +if [ ${#4} -ne 0 ]; then + tar czvf $4.tar.gz $OUTPUT_DIR +fi diff --git a/kernel_boot/kernel_config b/kernel_boot/kernel_config index 44619d9..d2f84b0 100644 --- a/kernel_boot/kernel_config +++ b/kernel_boot/kernel_config @@ -1459,6 +1459,7 @@ CONFIG_SWPHY=y # # MII PHY device drivers # +# CONFIG_ADIN_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_AQUANTIA_PHY is not set # CONFIG_AT803X_PHY is not set @@ -1676,7 +1677,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_IFX6X60 is not set CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y -CONFIG_SERIAL_XILINX_NR_UARTS=2 # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set @@ -1932,6 +1932,7 @@ CONFIG_HWMON=y # # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set @@ -1966,6 +1967,8 @@ CONFIG_HWMON=y # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2378,6 +2381,7 @@ CONFIG_VIDEO_IMAGEON_BRIDGE=y # CONFIG_SOC_CAMERA is not set # CONFIG_VIDEO_XILINX is not set # CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_ADI_AXI_VIDEO_FRAME_BUFFER is not set # CONFIG_V4L_TEST_DRIVERS is not set # @@ -2668,6 +2672,8 @@ CONFIG_SND_SOC_ADRV936X_BOX=y # STMicroelectronics STM32 SOC audio support # # CONFIG_SND_SOC_XILINX_DP is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_I2S is not set # CONFIG_SND_SOC_XTFPGA_I2S is not set # CONFIG_ZX_TDM is not set CONFIG_SND_SOC_I2C_AND_SPI=y @@ -2677,6 +2683,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # # CONFIG_SND_SOC_AC97_CODEC is not set CONFIG_SND_SOC_ADAU_UTILS=y +# CONFIG_SND_SOC_ADAU1373 is not set CONFIG_SND_SOC_ADAU1701=y CONFIG_SND_SOC_ADAU17X1=y CONFIG_SND_SOC_ADAU1761=y @@ -3410,9 +3417,6 @@ CONFIG_ADIS16240=y # # Analog to digital converters # -CONFIG_AD7606=y -# CONFIG_AD7606_IFACE_PARALLEL is not set -CONFIG_AD7606_IFACE_SPI=y CONFIG_AD7780=y CONFIG_AD7816=y CONFIG_AD7192=y @@ -3536,6 +3540,7 @@ CONFIG_FB_FLEX=y # CONFIG_TYPEC_TCPM is not set # CONFIG_PI433 is not set # CONFIG_XILINX_FCLK is not set +# CONFIG_XROE_FRAMER is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set CONFIG_CLKDEV_LOOKUP=y @@ -3545,12 +3550,12 @@ CONFIG_COMMON_CLK=y # # Common Clock Framework # -# CONFIG_COMMON_CLK_ADF4360 is not set CONFIG_ICST=y # CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI514 is not set CONFIG_COMMON_CLK_SI570=y +# CONFIG_COMMON_CLK_SI5324 is not set # CONFIG_COMMON_CLK_IDT8T49N24X is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CDCE925 is not set @@ -3681,15 +3686,21 @@ CONFIG_ADXL345_SPI=y # Analog to digital converters # CONFIG_AD_SIGMA_DELTA=y +# CONFIG_AD400X is not set CONFIG_AD7091R5=y +# CONFIG_AD7124 is not set CONFIG_AD7173=y CONFIG_AD7266=y CONFIG_AD7291=y CONFIG_AD7298=y CONFIG_AD738X=y CONFIG_AD7476=y +CONFIG_AD7606=y +# CONFIG_AD7606_IFACE_PARALLEL is not set +CONFIG_AD7606_IFACE_SPI=y CONFIG_AD7766=y CONFIG_AD7768=y +# CONFIG_AD7768_1 is not set CONFIG_AD7791=y CONFIG_AD7793=y CONFIG_AD7887=y @@ -3698,6 +3709,7 @@ CONFIG_AD799X=y CONFIG_AD9963=y CONFIG_ADM1177=y CONFIG_CF_AXI_ADC=y +# CONFIG_AD9208 is not set CONFIG_AD9361=m # CONFIG_AD9361_EXT_BAND_CONTROL is not set CONFIG_AD9371=y @@ -3707,6 +3719,7 @@ CONFIG_AD9467=y CONFIG_AD9680=y CONFIG_ADMC=y CONFIG_CF_AXI_TDD=y +# CONFIG_AXI_PULSE_CAPTURE is not set # CONFIG_AXI_FMCADC5_SYNC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set @@ -3780,11 +3793,13 @@ CONFIG_AD5593R=y CONFIG_AD5504=y CONFIG_AD5624R_SPI=y CONFIG_LTC2632=y -CONFIG_AD5686=y +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set CONFIG_AD5755=y # CONFIG_AD5758 is not set CONFIG_AD5761=y CONFIG_AD5764=y +# CONFIG_AD5770R is not set CONFIG_AD5791=y CONFIG_AD7303=y CONFIG_AD8801=y @@ -3821,13 +3836,17 @@ CONFIG_CF_AXI_DDS=y CONFIG_CF_AXI_DDS_AD9122=y CONFIG_CF_AXI_DDS_AD9144=y CONFIG_CF_AXI_DDS_AD9162=y +# CONFIG_CF_AXI_DDS_AD9172 is not set CONFIG_CF_AXI_DDS_AD9739A=y +# CONFIG_M2K_DAC is not set # # Phase-Locked Loop (PLL) frequency synthesizers # CONFIG_ADF4350=y CONFIG_ADF5355=y +# CONFIG_ADF4371 is not set +# CONFIG_ADF4360 is not set # # Digital gyroscope sensors @@ -4007,6 +4026,7 @@ CONFIG_IIO_SYSFS_TRIGGER=y # Temperature sensors # # CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_LTC2983 is not set # CONFIG_MLX90614 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set @@ -4061,13 +4081,16 @@ CONFIG_ARM_PMU=y # CONFIG_ANDROID is not set # CONFIG_DAX is not set CONFIG_NVMEM=y +# CONFIG_NVMEM_AXI_SYSID is not set # CONFIG_STM is not set # CONFIG_INTEL_TH is not set CONFIG_FPGA=y +# CONFIG_FPGA_MGR_DEBUG_FS is not set # CONFIG_FPGA_MGR_ICE40_SPI is not set # CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set # CONFIG_FPGA_MGR_XILINX_SPI is not set CONFIG_FPGA_MGR_ZYNQ_FPGA=y +# CONFIG_FPGA_MGR_ZYNQ_AFI_FPGA is not set # CONFIG_FPGA_BRIDGE is not set # CONFIG_ALTERA_PR_IP_CORE is not set diff --git a/kernel_boot/kernel_config_zynqmp b/kernel_boot/kernel_config_zynqmp new file mode 100644 index 0000000..4cf6295 --- /dev/null +++ b/kernel_boot/kernel_config_zynqmp @@ -0,0 +1,5257 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.14.0 Kernel Configuration +# +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_SMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_WATCH=y +CONFIG_AUDIT_TREE=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CGROUPS=y +# CONFIG_MEMCG is not set +# CONFIG_BLK_CGROUP is not set +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +# CONFIG_CGROUP_HUGETLB is not set +# CONFIG_CPUSETS is not set +# CONFIG_CGROUP_DEVICE is not set +# CONFIG_CGROUP_CPUACCT is not set +# CONFIG_CGROUP_PERF is not set +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_SOCK_CGROUP_DATA is not set +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_NAMESPACES is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_POSIX_TIMERS=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_GCC_PLUGINS=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_THIN_ARCHIVES=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +# CONFIG_HAVE_ARCH_HASH is not set +# CONFIG_ISA_BUS_API is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +# CONFIG_CPU_NO_EFFICIENT_FFS is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +# CONFIG_REFCOUNT_FULL is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VULCAN is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +CONFIG_ARCH_ZYNQMP=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# DesignWare PCI Core Support +# +# CONFIG_PCIE_DW_PLAT is not set +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set + +# +# PCI host controller drivers +# +CONFIG_PCIE_XILINX_NWL=y +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XDMA_PL is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=8 +CONFIG_HOTPLUG_CPU=y +# CONFIG_NUMA is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_SECCOMP is not set +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_VHE=y + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_MODULE_CMODEL_LARGE=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +CONFIG_EFI_STUB=y +CONFIG_EFI=y +# CONFIG_DMI is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set +# CONFIG_HIBERNATION is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_STAT is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +# CONFIG_QORIQ_CPUFREQ is not set +CONFIG_NET=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_NET_INGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=y +# CONFIG_IP_MROUTE is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_UDP_TUNNEL is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=y +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_FOU is not set +# CONFIG_IPV6_FOU_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_NETLINK=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=y +# CONFIG_NF_LOG_NETDEV is not set +CONFIG_NF_CONNTRACK_MARK=y +# CONFIG_NF_CONNTRACK_SECMARK is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +CONFIG_NF_CT_NETLINK=m +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +CONFIG_NF_NAT_REDIRECT=m +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=m + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=y +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_NAT is not set +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=y +CONFIG_NF_REJECT_IPV4=y +CONFIG_NF_NAT_IPV4=m +# CONFIG_NF_NAT_MASQUERADE_IPV4 is not set +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +# CONFIG_IP_NF_NAT is not set +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=y +CONFIG_NF_LOG_IPV6=y +CONFIG_NF_NAT_IPV6=m +# CONFIG_NF_NAT_MASQUERADE_IPV6 is not set +CONFIG_IP6_NF_IPTABLES=y +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=y +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_NAT is not set +CONFIG_BRIDGE_NF_EBTABLES=y +# CONFIG_BRIDGE_EBT_BROUTE is not set +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +# CONFIG_BRIDGE_EBT_802_3 is not set +# CONFIG_BRIDGE_EBT_AMONG is not set +# CONFIG_BRIDGE_EBT_ARP is not set +# CONFIG_BRIDGE_EBT_IP is not set +# CONFIG_BRIDGE_EBT_IP6 is not set +# CONFIG_BRIDGE_EBT_LIMIT is not set +# CONFIG_BRIDGE_EBT_MARK is not set +# CONFIG_BRIDGE_EBT_PKTTYPE is not set +# CONFIG_BRIDGE_EBT_STP is not set +# CONFIG_BRIDGE_EBT_VLAN is not set +# CONFIG_BRIDGE_EBT_ARPREPLY is not set +# CONFIG_BRIDGE_EBT_DNAT is not set +CONFIG_BRIDGE_EBT_MARK_T=y +# CONFIG_BRIDGE_EBT_REDIRECT is not set +# CONFIG_BRIDGE_EBT_SNAT is not set +# CONFIG_BRIDGE_EBT_LOG is not set +# CONFIG_BRIDGE_EBT_NFLOG is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +# CONFIG_BPF_JIT is not set +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=y +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y +CONFIG_CAN_GW=y + +# +# CAN Device Drivers +# +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_LEDS is not set +# CONFIG_CAN_GRCAN is not set +CONFIG_CAN_XILINXCAN=y +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set + +# +# CAN USB interfaces +# +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +CONFIG_BT_LEDS=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=y +CONFIG_BT_BCM=y +CONFIG_BT_RTL=y +CONFIG_BT_QCA=y +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTUSB_BCM=y +CONFIG_BT_HCIBTUSB_RTL=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_QCA=y +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +CONFIG_BT_ATH3K=y +CONFIG_BT_WILINK=y +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +# CONFIG_STREAM_PARSER is not set +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_CERTIFICATION_ONUS=y +CONFIG_CFG80211_REG_CELLULAR_HINTS=y +CONFIG_CFG80211_REG_RELAX_NO_IR=y +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +# CONFIG_MAC80211_RC_MINSTREL_VHT is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +CONFIG_MAC80211_MESSAGE_TRACING=y +CONFIG_MAC80211_DEBUG_MENU=y +# CONFIG_MAC80211_NOINLINE is not set +# CONFIG_MAC80211_VERBOSE_DEBUG is not set +# CONFIG_MAC80211_MLME_DEBUG is not set +# CONFIG_MAC80211_STA_DEBUG is not set +# CONFIG_MAC80211_HT_DEBUG is not set +# CONFIG_MAC80211_OCB_DEBUG is not set +# CONFIG_MAC80211_IBSS_DEBUG is not set +# CONFIG_MAC80211_PS_DEBUG is not set +# CONFIG_MAC80211_TDLS_DEBUG is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_NET_9P=y +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="Mykonos_M3.bin TaliseStream.bin TaliseTDDArmFirmware.bin TaliseTxArmFirmware.bin TaliseRxArmFirmware.bin" +CONFIG_EXTRA_FIRMWARE_DIR="./firmware" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +CONFIG_GENERIC_ARCH_TOPOLOGY=y + +# +# Bus devices +# +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI_PMU=y +CONFIG_ARM_CCI400_COMMON=y +CONFIG_ARM_CCI400_PMU=y +# CONFIG_ARM_CCI5xx_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_SIMPLE_PM_BUS is not set +# CONFIG_VEXPRESS_CONFIG is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# Partition parsers +# + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +CONFIG_MTD_OOPS=y +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PHYSMAP_OF is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_DENALI_PCI is not set +# CONFIG_MTD_NAND_DENALI_DT is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_ARASAN=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_XILINX_TRAFGEN is not set +CONFIG_XILINX_JESD204B=y +CONFIG_XILINX_JESD204B_PHY=y +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +CONFIG_TI_ST=y +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# MathWorks IP Drivers +# +CONFIG_MATHWORKS_IP_CORE=m +CONFIG_MWIPCORE=m +CONFIG_MWIPCORE_DMA_STREAMING=m +CONFIG_MWIPCORE_IIO_STREAMING=m +CONFIG_MATHWORKS_GENERIC_OF=m +CONFIG_MATHWORKS_GENERIC_PCI=m + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_AFU_DRIVER_OPS is not set +# CONFIG_CXL_LIB is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_HISI_SAS is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_ATA_SFF is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_TUN=y +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +# CONFIG_AMD_XGBE is not set +# CONFIG_AMD_XGBE_HAVE_ECC is not set +CONFIG_NET_VENDOR_AQUANTIA=y +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_ALX is not set +# CONFIG_NET_VENDOR_AURORA is not set +CONFIG_NET_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2X is not set +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CAVIUM=y +# CONFIG_THUNDER_NIC_PF is not set +# CONFIG_THUNDER_NIC_VF is not set +# CONFIG_THUNDER_NIC_BGX is not set +# CONFIG_THUNDER_NIC_RGX is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_EXAR=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +# CONFIG_HNS is not set +# CONFIG_HNS_DSAF is not set +# CONFIG_HNS_ENET is not set +# CONFIG_HNS3 is not set +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_HUAWEI=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_FM10K is not set +CONFIG_NET_VENDOR_I825XX=y +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLX4_EN is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_MLX5_CORE is not set +# CONFIG_MLXSW_CORE is not set +# CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_PACKET_ENGINE=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCOM_EMAC is not set +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SMSC=y +# CONFIG_SMC91X is not set +# CONFIG_EPIC100 is not set +# CONFIG_SMSC911X is not set +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_STMICRO=y +# CONFIG_STMMAC_ETH is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_ALE is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +CONFIG_NET_VENDOR_XILINX=y +CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y +# CONFIG_XILINX_AXI_EMAC_HWTSTAMP is not set +# CONFIG_AXIENET_HAS_MCDMA is not set +# CONFIG_XILINX_TSN is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +CONFIG_ADIN_PHY=y +CONFIG_AMD_PHY=y +# CONFIG_AQUANTIA_PHY is not set +CONFIG_AT803X_PHY=y +CONFIG_BCM7XXX_PHY=y +CONFIG_BCM87XX_PHY=y +CONFIG_BCM_NET_PHYLIB=y +CONFIG_BROADCOM_PHY=y +CONFIG_CICADA_PHY=y +# CONFIG_CORTINA_PHY is not set +CONFIG_DAVICOM_PHY=y +# CONFIG_DP83848_PHY is not set +CONFIG_DP83867_PHY=y +CONFIG_FIXED_PHY=y +CONFIG_ICPLUS_PHY=y +# CONFIG_INTEL_XWAY_PHY is not set +CONFIG_LSI_ET1011C_PHY=y +CONFIG_LXT_PHY=y +CONFIG_MARVELL_PHY=y +# CONFIG_MARVELL_10G_PHY is not set +CONFIG_MICREL_PHY=y +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +CONFIG_NATIONAL_PHY=y +CONFIG_QSEMI_PHY=y +CONFIG_REALTEK_PHY=y +# CONFIG_ROCKCHIP_PHY is not set +CONFIG_SMSC_PHY=y +CONFIG_STE10XP=y +# CONFIG_TERANETICS_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_XILINX_PHY is not set +CONFIG_XILINX_GMII2RGMII=y +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=y +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMSMAC is not set +# CONFIG_BRCMFMAC is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=y +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=y +CONFIG_WLCORE=y +CONFIG_WLCORE_SPI=y +CONFIG_WLCORE_SDIO=y +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PEARL_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_FSL=y +# CONFIG_SERIAL_8250_DW is not set +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_MAX310X=y +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set +# CONFIG_AXI_INTR_MONITOR is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +CONFIG_I2C_MUX_PCA9541=y +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_CADENCE=y +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +CONFIG_I2C_XILINX=y + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BITBANG=y +CONFIG_SPI_CADENCE=y +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_AD9250FMC is not set +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_ZYNQMP=y +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_XGENE is not set +CONFIG_GPIO_XILINX=y +CONFIG_GPIO_ZYNQ=y + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_TPIC2810 is not set + +# +# MFD GPIO expanders +# +CONFIG_GPIO_TPS65086=y + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_ADI_DAQ1 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +# CONFIG_POWER_AVS is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +CONFIG_POWER_RESET_LTC2952=y +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LTC3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +CONFIG_SENSORS_AXI_FAN_CONTROL=y +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +CONFIG_SENSORS_IIO_HWMON=y +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2947_I2C is not set +# CONFIG_SENSORS_LTC2947_SPI is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +CONFIG_PMBUS=y +CONFIG_SENSORS_PMBUS=y +# CONFIG_SENSORS_ADM1275 is not set +# CONFIG_SENSORS_IBM_CFFPS is not set +# CONFIG_SENSORS_IR35221 is not set +# CONFIG_SENSORS_LM25066 is not set +# CONFIG_SENSORS_LTC2978 is not set +# CONFIG_SENSORS_LTC3815 is not set +# CONFIG_SENSORS_MAX16064 is not set +CONFIG_SENSORS_MAX20751=y +# CONFIG_SENSORS_MAX34440 is not set +# CONFIG_SENSORS_MAX8688 is not set +# CONFIG_SENSORS_TPS40422 is not set +# CONFIG_SENSORS_TPS53679 is not set +# CONFIG_SENSORS_UCD9000 is not set +# CONFIG_SENSORS_UCD9200 is not set +# CONFIG_SENSORS_ZL6100 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=y +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +CONFIG_XILINX_WATCHDOG=y +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +CONFIG_CADENCE_WATCHDOG=y +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SYSCON is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +CONFIG_MFD_TPS65086=y +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_REGULATOR_TPS65086=y +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +CONFIG_RC_CORE=y +CONFIG_RC_MAP=y +CONFIG_RC_DECODERS=y +# CONFIG_LIRC is not set +CONFIG_IR_NEC_DECODER=y +CONFIG_IR_RC5_DECODER=y +CONFIG_IR_RC6_DECODER=y +CONFIG_IR_JVC_DECODER=y +CONFIG_IR_SONY_DECODER=y +CONFIG_IR_SANYO_DECODER=y +CONFIG_IR_SHARP_DECODER=y +CONFIG_IR_MCE_KBD_DECODER=y +CONFIG_IR_XMP_DECODER=y +# CONFIG_RC_DEVICES is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_PCI_SKELETON is not set +CONFIG_V4L2_FWNODE=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_VIDEOBUF2_VMALLOC=y +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=y +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_AXI_HDMI_RX is not set +# CONFIG_VIDEO_IMAGEON_BRIDGE is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_VIDEO_XILINX=y +# CONFIG_VIDEO_XILINX_AXI4S_SWITCH is not set +CONFIG_VIDEO_XILINX_CFA=y +CONFIG_VIDEO_XILINX_CRESAMPLE=y +# CONFIG_VIDEO_XILINX_DEMOSAIC is not set +# CONFIG_VIDEO_XILINX_GAMMA is not set +CONFIG_VIDEO_XILINX_HLS=y +CONFIG_VIDEO_XILINX_REMAPPER=y +CONFIG_VIDEO_XILINX_RGB2YUV=y +CONFIG_VIDEO_XILINX_SCALER=y +# CONFIG_VIDEO_XILINX_MULTISCALER is not set +CONFIG_VIDEO_XILINX_SDIRXSS=y +CONFIG_VIDEO_XILINX_SWITCH=y +CONFIG_VIDEO_XILINX_TPG=y +# CONFIG_VIDEO_XILINX_VPSS_CSC is not set +# CONFIG_VIDEO_XILINX_VPSS_SCALER is not set +CONFIG_VIDEO_XILINX_VTC=y +# CONFIG_VIDEO_XILINX_CSI2RXSS is not set +# CONFIG_VIDEO_XILINX_SCD is not set +# CONFIG_VIDEO_XILINX_M2M is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_ADI_AXI_VIDEO_FRAME_BUFFER is not set +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_VIDEO_IR_I2C=y + +# +# Audio decoders, processors and mixers +# + +# +# RDS decoders +# + +# +# Video decoders +# + +# +# Video and audio decoders +# + +# +# Video encoders +# + +# +# Camera sensor devices +# + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Audio/Video compression chips +# + +# +# SDR tuner chips +# + +# +# Miscellaneous helper chips +# + +# +# Sensors used on soc_camera driver +# + +# +# Tools to develop new frontends +# + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +CONFIG_DRM=y +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM is not set +# CONFIG_DRM_DEBUG_MM_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +# CONFIG_DRM_I2C_ADV7511_LEGACY is not set +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_ADI_AXI_HDMI is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_XILINX is not set +# CONFIG_DRM_ZOCL is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_PL111 is not set +CONFIG_DRM_XLNX=y +CONFIG_DRM_XLNX_BRIDGE=y +# CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS is not set +CONFIG_DRM_ZYNQMP_DPSUB=y +CONFIG_DRM_XLNX_DSI=y +CONFIG_DRM_XLNX_MIXER=y +CONFIG_DRM_XLNX_PL_DISP=y +CONFIG_DRM_XLNX_SDI=y +CONFIG_DRM_XLNX_BRIDGE_CSC=y +CONFIG_DRM_XLNX_BRIDGE_SCALER=y +CONFIG_DRM_XLNX_BRIDGE_VTC=y +# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_LIB_RANDOM is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +CONFIG_FB_XILINX=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_S6E63M0 is not set +# CONFIG_LCD_LD9040 is not set +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_DMAENGINE_PCM=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set + +# +# STMicroelectronics STM32 SOC audio support +# +CONFIG_SND_SOC_XILINX_DP=y +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SDI is not set +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1373 is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4554 is not set +# CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_DIO2125 is not set +# CONFIG_SND_SOC_ES7134 is not set +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_RT5677_SPI is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +# CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +# CONFIG_SND_SOC_TAS571X is not set +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SND_SIMPLE_SCU_CARD is not set +# CONFIG_SND_AUDIO_GRAPH_CARD is not set +# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEFAULT_PERSIST is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_OTG_FSM=y +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +# CONFIG_USB_DWC3_DUAL_ROLE is not set +CONFIG_USB_DWC3_OTG=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_OF_SIMPLE=y +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +# CONFIG_U_SERIAL_CONSOLE is not set + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_SNP_UDC_PLAT is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +CONFIG_USB_GADGET_XILINX=y +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_ACM=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_U_ETHER=y +CONFIG_USB_F_ECM=m +CONFIG_USB_F_EEM=y +CONFIG_USB_F_SUBSET=m +CONFIG_USB_F_RNDIS=m +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_FS=y +CONFIG_USB_CONFIGFS=y +# CONFIG_USB_CONFIGFS_SERIAL is not set +CONFIG_USB_CONFIGFS_ACM=y +# CONFIG_USB_CONFIGFS_OBEX is not set +# CONFIG_USB_CONFIGFS_NCM is not set +# CONFIG_USB_CONFIGFS_ECM is not set +# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set +# CONFIG_USB_CONFIGFS_RNDIS is not set +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_FS=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_ETH_EEM=y +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_MASS_STORAGE=m +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set + +# +# USB Power Delivery and Type-C drivers +# +# CONFIG_TYPEC_UCSI is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_CAVIUM_THUNDERX is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_USER is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +# CONFIG_LEDS_TRIGGER_DISK is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_CAMERA=y +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_EFI is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +CONFIG_RTC_DRV_ZYNQMP=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +# CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_AXI_DMAC=y +# CONFIG_BCM_SBA_RAID is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +# CONFIG_PL330_DMA is not set +CONFIG_XILINX_DMA_ENGINES=y +CONFIG_XILINX_DMATEST=m +# CONFIG_XILINX_VDMATEST is not set +# CONFIG_XILINX_CDMATEST is not set +CONFIG_XILINX_DPDMA=y +# CONFIG_XILINX_DPDMA_DEBUG_FS is not set +CONFIG_XILINX_FRMBUF=y +CONFIG_XILINX_DMA=m +CONFIG_XILINX_ZYNQMP_DMA=y +# CONFIG_XILINX_PS_PCIE_DMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +CONFIG_DMATEST=y +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=y +# CONFIG_UIO_CIF is not set +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +CONFIG_UIO_XILINX_APM=y +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_HYPERV_TSCPAGE is not set +CONFIG_STAGING=y +# CONFIG_IRDA is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8822BE is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16240 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Light sensors +# +# CONFIG_TSL2x7x is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_MTD_SPINAND_MT29F is not set +# CONFIG_LNET is not set +# CONFIG_DGNC is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_XILINX_APF is not set +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +# CONFIG_MOST is not set +# CONFIG_KS7010 is not set +# CONFIG_GREYBUS is not set + +# +# USB Power Delivery and Type-C drivers +# +# CONFIG_TYPEC_TCPM is not set +# CONFIG_PI433 is not set +CONFIG_XILINX_FCLK=y +# CONFIG_XROE_FRAMER is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +CONFIG_COMMON_CLK_SI570=y +# CONFIG_COMMON_CLK_SI5324 is not set +# CONFIG_COMMON_CLK_IDT8T49N24X is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +CONFIG_COMMON_CLK_AXI_CLKGEN=y +# CONFIG_CLK_QORIQ is not set +# CONFIG_COMMON_CLK_XGENE is not set +# CONFIG_COMMON_CLK_NXP is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_PIC32 is not set +# CONFIG_COMMON_CLK_VC5 is not set +CONFIG_COMMON_CLK_ZYNQMP=y +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_MAILBOX=y +# CONFIG_ARM_MHU is not set +# CONFIG_PLATFORM_MHU is not set +# CONFIG_PL320_MBOX is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +# CONFIG_BCM_FLEXRM_MBOX is not set +CONFIG_ZYNQMP_IPI_MBOX=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set + +# +# i.MX SoC drivers +# + +# +# Qualcomm SoC drivers +# +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +CONFIG_XILINX_VCU=m + +# +# Zynq MPSoC SoC Drivers +# +CONFIG_ZYNQMP_POWER=y +CONFIG_ZYNQMP_PM_DOMAINS=y +# CONFIG_PM_DEVFREQ is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +# CONFIG_EXTCON_USB_GPIO is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +CONFIG_IIO_BUFFER_DMA=y +CONFIG_IIO_BUFFER_DMAENGINE=y +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_TRIGGERED_BUFFER=y +CONFIG_IIO_HW_CONSUMER=y +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +CONFIG_ADXL372=y +CONFIG_ADXL372_SPI=y +CONFIG_ADXL372_I2C=y +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +CONFIG_AD_SIGMA_DELTA=y +# CONFIG_AD400X is not set +CONFIG_AD7091R5=y +# CONFIG_AD7124 is not set +CONFIG_AD7173=y +CONFIG_AD7266=y +CONFIG_AD7291=y +CONFIG_AD7298=y +CONFIG_AD738X=y +CONFIG_AD7476=y +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768 is not set +# CONFIG_AD7768_1 is not set +CONFIG_AD7791=y +CONFIG_AD7793=y +CONFIG_AD7887=y +CONFIG_AD7923=y +CONFIG_AD799X=y +# CONFIG_AD9963 is not set +CONFIG_ADM1177=y +CONFIG_CF_AXI_ADC=y +CONFIG_AD9208=y +CONFIG_AD9361=m +# CONFIG_AD9361_EXT_BAND_CONTROL is not set +CONFIG_AD9371=m +CONFIG_ADRV9009=y +CONFIG_AD6676=y +CONFIG_AD9467=y +CONFIG_AD9680=y +CONFIG_ADMC=y +CONFIG_CF_AXI_TDD=y +CONFIG_AXI_PULSE_CAPTURE=y +CONFIG_AXI_FMCADC5_SYNC=y +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +CONFIG_LTC2471=y +CONFIG_LTC2485=y +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_NAU7802 is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +CONFIG_XILINX_XADC=y +CONFIG_XILINX_AMS=y + +# +# Amplifiers +# +CONFIG_AD8366=y + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Counters +# + +# +# Digital to analog converters +# +CONFIG_AD5064=y +CONFIG_AD5270=y +CONFIG_AD5360=y +CONFIG_AD5380=y +CONFIG_AD5421=y +CONFIG_AD5446=y +CONFIG_AD5449=y +CONFIG_AD5592R_BASE=y +CONFIG_AD5592R=y +CONFIG_AD5593R=y +CONFIG_AD5504=y +CONFIG_AD5624R_SPI=y +# CONFIG_LTC2632 is not set +CONFIG_AD5686=y +CONFIG_AD5686_SPI=y +# CONFIG_AD5696_I2C is not set +CONFIG_AD5755=y +# CONFIG_AD5758 is not set +CONFIG_AD5761=y +CONFIG_AD5764=y +# CONFIG_AD5770R is not set +CONFIG_AD5791=y +CONFIG_AD7303=y +CONFIG_AD8801=y +# CONFIG_DPOT_DAC is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_VF610_DAC is not set + +# +# IIO dummy driver +# + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +CONFIG_AD9508=y +CONFIG_AD9523=y +CONFIG_AD9528=y +CONFIG_AD9548=y +CONFIG_AD9517=y +CONFIG_HMC7044=y + +# +# Direct Digital Synthesis +# +CONFIG_CF_AXI_DDS=y +CONFIG_CF_AXI_DDS_AD9122=y +CONFIG_CF_AXI_DDS_AD9144=y +CONFIG_CF_AXI_DDS_AD9162=y +CONFIG_CF_AXI_DDS_AD9172=y +CONFIG_CF_AXI_DDS_AD9739A=y +# CONFIG_M2K_DAC is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +CONFIG_ADF4350=y +CONFIG_ADF5355=y +# CONFIG_ADF4371 is not set +CONFIG_ADF4360=y + +# +# Digital gyroscope sensors +# +CONFIG_ADIS16080=y +CONFIG_ADIS16130=y +CONFIG_ADIS16136=y +CONFIG_ADIS16260=y +CONFIG_ADXRS450=y +# CONFIG_BMG160 is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +CONFIG_ADIS16400=y +CONFIG_ADIS16460=y +CONFIG_ADIS16480=y +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +CONFIG_IIO_ADIS_LIB=y +CONFIG_IIO_ADIS_LIB_BUFFER=y +CONFIG_JESD204=y +# CONFIG_ALTERA_ARRIA10_JESD204_PHY is not set +CONFIG_AXI_ADXCVR=y +# CONFIG_AXI_JESD204B is not set +CONFIG_AXI_JESD204_TX=y +CONFIG_AXI_JESD204_RX=y +CONFIG_XILINX_TRANSCEIVER=y + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_MAX44000 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set + +# +# Logic Analyzers +# +# CONFIG_M2K_LOGIC_ANALYZER is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set + +# +# Inclinometer sensors +# + +# +# Triggers - standalone +# +CONFIG_IIO_INTERRUPT_TRIGGER=y +CONFIG_IIO_SYSFS_TRIGGER=y + +# +# Digital potentiometers +# +# CONFIG_DS1803 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity and distance sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_LTC2983 is not set +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_XILINX_INTC=y +CONFIG_PARTITION_PERCPU=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_ATH79 is not set +# CONFIG_RESET_BERLIN is not set +# CONFIG_RESET_IMX7 is not set +# CONFIG_RESET_LANTIQ is not set +# CONFIG_RESET_LPC18XX is not set +# CONFIG_RESET_MESON is not set +# CONFIG_RESET_PISTACHIO is not set +# CONFIG_RESET_SOCFPGA is not set +# CONFIG_RESET_STM32 is not set +# CONFIG_RESET_SUNXI is not set +# CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_ZYNQ is not set +CONFIG_ZYNQMP_RESET_CONTROLLER=y +# CONFIG_RESET_TEGRA_BPMP is not set +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +CONFIG_PHY_XILINX_ZYNQMP=y +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +# CONFIG_RAS is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_AXI_SYSID=y +CONFIG_NVMEM_ZYNQMP=y +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +CONFIG_FPGA=y +CONFIG_FPGA_REGION=y +# CONFIG_FPGA_MGR_DEBUG_FS is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +CONFIG_FPGA_MGR_ZYNQMP_FPGA=y +CONFIG_XILINX_AFI_FPGA=y +CONFIG_FPGA_BRIDGE=y +# CONFIG_ALTERA_PR_IP_CORE is not set +CONFIG_XILINX_PR_DECOUPLER=y + +# +# FSI support +# +# CONFIG_FSI is not set +# CONFIG_TEE is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_ARMSTUB=y +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_MESON_SM is not set + +# +# Tegra firmware driver +# + +# +# Zynq MPSoC Firmware Drivers +# +CONFIG_ZYNQMP_FIRMWARE=y +# CONFIG_ZYNQMP_FIRMWARE_DEBUG is not set +# CONFIG_ACPI is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=y +# CONFIG_BTRFS_FS_POSIX_ACL is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +CONFIG_QUOTA_TREE=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set +# CONFIG_OVERLAY_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=m +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +CONFIG_ECRYPT_FS=y +# CONFIG_ECRYPT_FS_MESSAGING is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_RUBIN=y +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_VIRTUALIZATION is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_ARCH_HAS_KCOV=y +# CONFIG_KCOV is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACE_CLOCK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_MEMTEST is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_CORE is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_XOR_BLOCKS=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_ACOMP2=y +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_MCRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +# CONFIG_CRYPTO_HW is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# CONFIG_ARM64_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_RAID6_PQ=y +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_RADIX_TREE_MULTIORDER=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set diff --git a/user_space/boot_bin_gen.sh b/user_space/boot_bin_gen.sh index def02d6..d15dead 100755 --- a/user_space/boot_bin_gen.sh +++ b/user_space/boot_bin_gen.sh @@ -22,7 +22,7 @@ else exit 1 fi -if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9361z7035_fmc" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then +if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then echo "\$BOARD_NAME is not correct. Please check!" exit 1 else @@ -34,19 +34,9 @@ home_dir=$(pwd) set -ex # check if user entered the right path to SDK -if [ -d "$XILINX_DIR" ]; then - source $XILINX_DIR/SDK/2017.4/settings64.sh -else - echo "Error: XILINX_DIR: ${XILINX_DIR} not found. Can not continue." - exit 1 -fi +source $XILINX_DIR/SDK/2018.3/settings64.sh -if [ -d "$OPENWIFI_DIR" ]; then - cd $OPENWIFI_DIR/kernel_boot -else - echo "Error: OPENWIFI_DIR: ${OPENWIFI_DIR} not found. Can not continue." - exit 1 -fi +cd $OPENWIFI_DIR/kernel_boot ./build_boot_bin.sh $BOARD_NAME diff --git a/user_space/boot_bin_gen_zynqmp.sh b/user_space/boot_bin_gen_zynqmp.sh new file mode 100755 index 0000000..0c33ef8 --- /dev/null +++ b/user_space/boot_bin_gen_zynqmp.sh @@ -0,0 +1,47 @@ +#!/bin/bash +if [ "$#" -ne 3 ]; then + echo "You must enter exactly 3 arguments: \$OPENWIFI_DIR \$XILINX_DIR \$BOARD_NAME" + exit 1 +fi + +OPENWIFI_DIR=$1 +XILINX_DIR=$2 +BOARD_NAME=$3 + +if [ -f "$OPENWIFI_DIR/LICENSE" ]; then + echo "\$OPENWIFI_DIR is found!" +else + echo "\$OPENWIFI_DIR is not correct. Please check!" + exit 1 +fi + +if [ -d "$XILINX_DIR/SDK" ]; then + echo "\$XILINX_DIR is found!" +else + echo "\$XILINX_DIR is not correct. Please check!" + exit 1 +fi + +if [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then + echo "\$BOARD_NAME is not correct. Please check!" + exit 1 +else + echo "\$BOARD_NAME is found!" +fi + +home_dir=$(pwd) + +set -ex + +# check if user entered the right path to SDK +source $XILINX_DIR/SDK/2018.3/settings64.sh + +cd $OPENWIFI_DIR/kernel_boot + +./build_zynqmp_boot_bin.sh ../openwifi-hw/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf boards/$BOARD_NAME/u-boot-zcu.elf boards/$BOARD_NAME/bl31.elf +# ./build_zynqmp_boot_bin.sh ../openwifi-hw/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf boards/$BOARD_NAME/u-boot-zcu.elf download +rm -rf build_boot_bin +rm -rf boards/$BOARD_NAME/output_boot_bin +mv output_boot_bin boards/$BOARD_NAME/ + +cd $home_dir diff --git a/user_space/get_fpga.sh b/user_space/get_fpga.sh index 9a698ed..9f049d0 100755 --- a/user_space/get_fpga.sh +++ b/user_space/get_fpga.sh @@ -22,7 +22,7 @@ cd $OPENWIFI_DIR/ git submodule init openwifi-hw git submodule update openwifi-hw cd openwifi-hw -git checkout master +git checkout zcu102_fmcs2 git pull cd $home_dir diff --git a/user_space/post_config.sh b/user_space/post_config.sh index 4a3ab8c..9d678d5 100755 --- a/user_space/post_config.sh +++ b/user_space/post_config.sh @@ -2,15 +2,27 @@ set -ex +MACHINE_TYPE=`uname -m` + # setup kernel module directory if [ -d "/lib/modules/$(uname -r)" ]; then echo "/lib/modules/$(uname -r) already exists." else - ln -s /lib/modules/openwifi /lib/modules/$(uname -r) + if [ ${MACHINE_TYPE} == 'aarch64' ]; then + ln -s /lib/modules/adi-linux-64 /lib/modules/$(uname -r) + else + ln -s /lib/modules/adi-linux /lib/modules/$(uname -r) + fi fi depmod modprobe mac80211 +if [ ${MACHINE_TYPE} == 'aarch64' ]; then + cp ~/openwifi/drv64/* ~/openwifi/ -rf +else + cp ~/openwifi/drv32/* ~/openwifi/ -rf +fi + # add gateway (PC) for internet access route add default gw 192.168.10.1 || true diff --git a/user_space/prepare_kernel.sh b/user_space/prepare_kernel.sh new file mode 100755 index 0000000..b76396a --- /dev/null +++ b/user_space/prepare_kernel.sh @@ -0,0 +1,74 @@ + +#!/bin/bash +if [ "$#" -lt 3 ]; then + echo "You must enter at least 3 arguments: \$OPENWIFI_DIR \$XILINX_DIR ARCH_BIT(32 or 64)" + exit 1 +fi + +OPENWIFI_DIR=$1 +XILINX_DIR=$2 +ARCH_OPTION=$3 + +if [ -f "$OPENWIFI_DIR/LICENSE" ]; then + echo "\$OPENWIFI_DIR is found!" +else + echo "\$OPENWIFI_DIR is not correct. Please check!" + exit 1 +fi + +if [ -d "$XILINX_DIR/SDK" ]; then + echo "\$XILINX_DIR is found!" +else + echo "\$XILINX_DIR is not correct. Please check!" + exit 1 +fi + +if [ "$ARCH_OPTION" != "32" ] && [ "$ARCH_OPTION" != "64" ]; then + echo "\$ARCH_OPTION is not correct. Should be 32 or 64. Please check!" + exit 1 +else + echo "\$ARCH_OPTION is valid!" +fi + +if [ "$ARCH_OPTION" == "64" ]; then + LINUX_KERNEL_SRC_DIR_NAME=adi-linux-64 + LINUX_KERNEL_CONFIG_FILE=$OPENWIFI_DIR/kernel_boot/kernel_config_zynqmp + ARCH_NAME="arm64" + CROSS_COMPILE_NAME="aarch64-linux-gnu-" + IMAGE_TYPE=Image +else + LINUX_KERNEL_SRC_DIR_NAME=adi-linux + LINUX_KERNEL_CONFIG_FILE=$OPENWIFI_DIR/kernel_boot/kernel_config + ARCH_NAME="arm" + CROSS_COMPILE_NAME="arm-linux-gnueabihf-" + IMAGE_TYPE=uImage +fi + +home_dir=$(pwd) + +set -x + +cd $OPENWIFI_DIR/ +git submodule init $LINUX_KERNEL_SRC_DIR_NAME +git submodule update $LINUX_KERNEL_SRC_DIR_NAME +cd $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME +git checkout 2019_R1 +git pull origin 2019_R1 +cp $OPENWIFI_DIR/driver/xilinx_dma/xilinx_dma.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/dma/xilinx/xilinx_dma.c +cp $LINUX_KERNEL_CONFIG_FILE ./.config +source $XILINX_DIR/SDK/2018.3/settings64.sh +export ARCH=$ARCH_NAME +export CROSS_COMPILE=$CROSS_COMPILE_NAME + +make oldconfig && make prepare && make modules_prepare + +if [ "$#" -gt 3 ]; then + if [ -f "$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/arch/$ARCH_NAME/boot/$IMAGE_TYPE" ]; then + echo "Kernel found! Skip the time costly Linux kernel compiling." + else + make -j12 $IMAGE_TYPE UIMAGE_LOADADDR=0x8000 + make modules + fi +fi + +cd $home_dir diff --git a/user_space/prepare_kernel_src.sh b/user_space/prepare_kernel_src.sh deleted file mode 100755 index 14b819b..0000000 --- a/user_space/prepare_kernel_src.sh +++ /dev/null @@ -1,39 +0,0 @@ - -#!/bin/bash -if [ "$#" -ne 2 ]; then - echo "You must enter exactly 2 arguments: \$OPENWIFI_DIR \$XILINX_DIR" - exit 1 -fi - -OPENWIFI_DIR=$1 -XILINX_DIR=$2 - - -if [ -f "$OPENWIFI_DIR/LICENSE" ]; then - echo "\$OPENWIFI_DIR is found!" -else - echo "\$OPENWIFI_DIR is not correct. Please check!" - exit 1 -fi - -if [ -d "$XILINX_DIR/SDK" ]; then - echo "\$XILINX_DIR is found!" -else - echo "\$XILINX_DIR is not correct. Please check!" - exit 1 -fi - -home_dir=$(pwd) - -cd $OPENWIFI_DIR/ -git submodule init adi-linux -git submodule update adi-linux -cd adi-linux -git reset --hard 4220d5d24c6c7589fc702db4f941f0632b5ad767 -cp ../kernel_boot/kernel_config ./.config -source $XILINX_DIR/SDK/2017.4/settings64.sh -export ARCH=arm -export CROSS_COMPILE=arm-linux-gnueabihf- -make oldconfig && make prepare && make modules_prepare - -cd $home_dir diff --git a/user_space/sdcard_boot_update.sh b/user_space/sdcard_boot_update.sh index 8f76a81..d732291 100755 --- a/user_space/sdcard_boot_update.sh +++ b/user_space/sdcard_boot_update.sh @@ -1,36 +1,62 @@ #!/bin/bash if [ "$#" -ne 1 ]; then echo "You must enter the \$BOARD_NAME as argument" - echo "Like: adrv9364z7020 adrv9361z7035 adrv9361z7035_fmc zc706_fmcs2 zed_fmcs2 zc702_fmcs2" + echo "Like: adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371" exit 1 fi BOARD_NAME=$1 +if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then + echo "\$BOARD_NAME is not correct. Please check!" + exit 1 +else + echo "\$BOARD_NAME is found!" +fi + +if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then + dtb_filename="system.dtb" + image_filepath="arch/arm64/boot/" + image_filename="Image" + LINUX_KERNEL_SRC_DIR_NAME=adi-linux-64 +else + dtb_filename="devicetree.dtb" + image_filepath="arch/arm/boot/" + image_filename="uImage" + LINUX_KERNEL_SRC_DIR_NAME=adi-linux +fi +echo $dtb_filename +echo $image_filepath +echo $image_filename + set -x rm BOOT.BIN sync wget ftp://192.168.10.1/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN sync -rm uImage +rm $image_filename sync -wget ftp://192.168.10.1/adi-linux/arch/arm/boot/uImage +wget ftp://192.168.10.1/$LINUX_KERNEL_SRC_DIR_NAME/$image_filepath/$image_filename sync -rm devicetree.dtb +rm $dtb_filename sync -wget ftp://192.168.10.1/kernel_boot/boards/$BOARD_NAME/devicetree.dtb +wget ftp://192.168.10.1/kernel_boot/boards/$BOARD_NAME/$dtb_filename sync #slepp 0.5 mount /dev/mmcblk0p1 /mnt sync #sleep 0.5 cp BOOT.BIN /mnt/ -f -cp uImage /mnt/ -f -cp devicetree.dtb /mnt/ -f +rm /mnt/Image -f +rm /mnt/uImage -f +cp $image_filename /mnt/ -f +rm /mnt/*.dtb -f +cp $dtb_filename /mnt/ -f +cd /mnt/ sync +cd ~ #sleep 0.5 umount /mnt sync #sleep 3 sudo reboot now - diff --git a/user_space/set_csma_high.sh b/user_space/set_csma_high.sh old mode 100644 new mode 100755 diff --git a/user_space/set_csma_normal.sh b/user_space/set_csma_normal.sh old mode 100644 new mode 100755 diff --git a/user_space/slice_cfg.sh b/user_space/slice_cfg.sh old mode 100644 new mode 100755 diff --git a/user_space/update_sdcard.sh b/user_space/update_sdcard.sh index 0503c25..d1c75bc 100755 --- a/user_space/update_sdcard.sh +++ b/user_space/update_sdcard.sh @@ -25,7 +25,7 @@ else exit 1 fi -if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9361z7035_fmc" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then +if [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then echo "\$BOARD_NAME is not correct. Please check!" exit 1 else @@ -36,6 +36,7 @@ fi if [ -d "$SDCARD_DIR/BOOT/" ]; then echo "$SDCARD_DIR/BOOT/" mkdir $SDCARD_DIR/BOOT/openwifi + rm -rf $SDCARD_DIR/BOOT/README.txt else echo "$SDCARD_DIR/BOOT/ does not exist!" exit 1 @@ -48,65 +49,96 @@ else exit 1 fi -sudo ls +if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then + dtb_filename="system.dtb" + dts_filename="system.dts" +else + dtb_filename="devicetree.dtb" + dts_filename="devicetree.dts" +fi +echo $dtb_filename +echo $dts_filename + +sudo true home_dir=$(pwd) set -x -if [ -f "$OPENWIFI_DIR/adi-linux/arch/arm/boot/uImage" ]; then - echo "Skip the time costly Linux kernel compiling." -else - # Build the Linux kernel uImage and modules - cd $OPENWIFI_DIR/ - git submodule init adi-linux - git submodule update adi-linux - cd adi-linux - git reset --hard 4220d5d24c6c7589fc702db4f941f0632b5ad767 - cp ../kernel_boot/kernel_config ./.config - source $XILINX_DIR/SDK/2017.4/settings64.sh - export ARCH=arm - export CROSS_COMPILE=arm-linux-gnueabihf- - make oldconfig && make prepare && make modules_prepare - make -j12 UIMAGE_LOADADDR=0x8000 uImage - make modules -fi +cd $OPENWIFI_DIR/user_space/ +./prepare_kernel.sh $OPENWIFI_DIR $XILINX_DIR 32 build +sudo true +./prepare_kernel.sh $OPENWIFI_DIR $XILINX_DIR 64 build +sudo true + +LINUX_KERNEL_SRC_DIR_NAME32=adi-linux +LINUX_KERNEL_SRC_DIR_NAME64=adi-linux-64 $OPENWIFI_DIR/user_space/get_fpga.sh $OPENWIFI_DIR -BOARD_NAME_ALL="zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9361z7035_fmc adrv9364z7020" +BOARD_NAME_ALL="zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9364z7020 zcu102_fmcs2 zcu102_9371" +# BOARD_NAME_ALL="zcu102_fmcs2" +# BOARD_NAME_ALL="adrv9361z7035" for BOARD_NAME_TMP in $BOARD_NAME_ALL do -# if [ -f "$OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN" ]; then -# echo "Skip the BOOT.BIN generation." -# else -# # Build BOOT.BIN - $OPENWIFI_DIR/user_space/boot_bin_gen.sh $OPENWIFI_DIR $XILINX_DIR $BOARD_NAME_TMP -# fi - dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/devicetree.dtb $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/devicetree.dts + if [ "$BOARD_NAME_TMP" == "zcu102_fmcs2" ] || [ "$BOARD_NAME_TMP" == "zcu102_9371" ]; then + dtb_filename_tmp="system.dtb" + dts_filename_tmp="system.dts" + $OPENWIFI_DIR/user_space/boot_bin_gen_zynqmp.sh $OPENWIFI_DIR $XILINX_DIR $BOARD_NAME_TMP + else + dtb_filename_tmp="devicetree.dtb" + dts_filename_tmp="devicetree.dts" + $OPENWIFI_DIR/user_space/boot_bin_gen.sh $OPENWIFI_DIR $XILINX_DIR $BOARD_NAME_TMP + fi + echo $dtb_filename_tmp + echo $dts_filename_tmp + + dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dts_filename_tmp mkdir $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP - cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/devicetree.dtb $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP + cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP + sudo true done +mkdir $SDCARD_DIR/BOOT/openwifi/zynq-common +cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/BOOT/openwifi/zynq-common/ +mkdir $SDCARD_DIR/BOOT/openwifi/zynqmp-common +cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/openwifi/zynqmp-common/ + # Copy uImage BOOT.BIN and devicetree to SD card BOOT partition -cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/devicetree.dtb $SDCARD_DIR/BOOT/ +cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/$dtb_filename $SDCARD_DIR/BOOT/ cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/ -cp $OPENWIFI_DIR/adi-linux/arch/arm/boot/uImage $SDCARD_DIR/BOOT/ +if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then + cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/ +else + cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/BOOT/ +fi -# build openwifi driver -$OPENWIFI_DIR/driver/make_all.sh $OPENWIFI_DIR $XILINX_DIR - -# Copy files to SD card rootfs partition sudo mkdir $SDCARD_DIR/rootfs/root/openwifi -sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/ \; sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf sudo wget -P $SDCARD_DIR/rootfs/root/openwifi/webserver/ https://users.ugent.be/~xjiao/openwifi-low-aac.mp4 +# build openwifi driver +$OPENWIFI_DIR/driver/make_all.sh $OPENWIFI_DIR $XILINX_DIR 32 +# Copy files to SD card rootfs partition +sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv32 +sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv32 \; + +# build openwifi driver +$OPENWIFI_DIR/driver/make_all.sh $OPENWIFI_DIR $XILINX_DIR 64 +# Copy files to SD card rootfs partition +sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv64 +sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv64 \; + sudo mkdir $SDCARD_DIR/rootfs/lib/modules -sudo mkdir $SDCARD_DIR/rootfs/lib/modules/openwifi -sudo find $OPENWIFI_DIR/adi-linux -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/openwifi/ \; -sudo rm $SDCARD_DIR/rootfs/lib/modules/openwifi/{axidmatest.ko,xilinx_dma.ko,adi_axi_hdmi.ko,ad9361_drv.ko} -f + +sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32 +sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/ \; +sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/{axidmatest.ko,xilinx_dma.ko,adi_axi_hdmi.ko,ad9361_drv.ko} -f + +sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64 +sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/ \; +sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/{axidmatest.ko,xilinx_dma.ko,adi_axi_hdmi.ko,ad9361_drv.ko} -f sudo rm $SDCARD_DIR/rootfs/etc/udev/rules.d/70-persistent-net.rules sudo cp $OPENWIFI_DIR/kernel_boot/70-persistent-net.rules $SDCARD_DIR/rootfs/etc/udev/rules.d/