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gpio gain delay and rssi:
Fine tune the rssi calculation sync with gpio gain (add the same gpio gain smoothing like iq_rssi in FPGA)
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@ -416,7 +416,7 @@ static inline u32 hw_init(enum xpu_mode mode){
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}
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xpu_api->XPU_REG_BAND_CHANNEL_write((false<<24)|(BAND_5_8GHZ<<16)|44);//use_short_slot==false; 5.8GHz; channel 44 -- default setting to sync with priv->band/channel/use_short_slot
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agc_gain_delay = 50; //samples
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agc_gain_delay = 39; //samples
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rssi_half_db_offset = 75<<1;
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xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) );
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xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) );
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