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https://github.com/open-sdr/openwifi.git
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update sdrpi
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@ -55,7 +55,7 @@ adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-c
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adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
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zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
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antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
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sdrpi|[HexSDR](https://github.com/HexSDR/) |Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
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sdrpi|[HexSDR](https://github.com/HexSDR/) Powerful SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
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zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[64bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-64bit.img.xz)|Need
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zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [ADRV9371](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9371.html)|Future|Future|Need
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@ -417,16 +417,24 @@
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};
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};
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ethernet@e000c000 {
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compatible = "cdns,zynq-gem", "cdns,gem";
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reg = <0xe000c000 0x1000>;
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status = "disabled";
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status = "okay";
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interrupts = <0x0 0x2d 0x4>;
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clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
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clock-names = "pclk", "hclk", "tx_clk";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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phy-mode = "gmii";
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phy-handle = <&phy1>;
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phy1: phy@0{
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reg = <0>;
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};
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};
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mmc@e0100000 {
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compatible = "arasan,sdhci-8.9a";
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15
kernel_boot/boards/sdrpi/notes.md
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15
kernel_boot/boards/sdrpi/notes.md
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@ -0,0 +1,15 @@
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# sdrpi for openwifi
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## Introduction
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[SDRPi](https://github.com/hexsdr/) is a smart and powerful SDR platform according Raspberry Pi size,which is based on [xilinx zynq7020](https://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html) and [adi ad936x](https://www.analog.com/en/products/ad9361.html).
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Hareware feature is : ZYNQ 7Z020CLG400 ,1GB DDR3 memory fo PS, 1G Ethernet RJ45 for PS,1G Ethernet RJ45 for PL, USB OTG(act as USB host or USB SLAVE ), dual USB uarts for PS and PL,on board USB to JTAG debuger,TF card , bootable QSPI FLASH and also external 27 IO pins from PL bank in 3.3v vatage with enable this board connect to other boards or modules. AD9361 RF design is based FMCOMMS3 with RF amplifier additionally.It also has a Ublox m8t GPS module and 40MHZ VCXO.
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It could be used as a traditional SDR device such as PlutoSDR or FMCOMMS2/3/4 with Xilinx evaluation board, and it also be used as hardware platform to support openwifi.
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@ -1557,7 +1557,7 @@ CONFIG_MARVELL_PHY=y
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# CONFIG_MICROSEMI_PHY is not set
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# CONFIG_NATIONAL_PHY is not set
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# CONFIG_QSEMI_PHY is not set
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# CONFIG_REALTEK_PHY is not set
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CONFIG_REALTEK_PHY=y
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# CONFIG_ROCKCHIP_PHY is not set
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# CONFIG_SMSC_PHY is not set
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# CONFIG_STE10XP is not set
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