ExternalVendorCode/openwifi
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update sdrpi

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hexsdr 2022-10-02 20:56:06 +08:00 committed by Jiao Xianjun
parent 39ab677c00
commit 9594dc72b7
5 changed files with 27 additions and 4 deletions
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2
README.md
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@ -55,7 +55,7 @@ adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-c
adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
sdrpi|[HexSDR](https://github.com/HexSDR/) |Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need sdrpi|[HexSDR](https://github.com/HexSDR/) Powerful SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[64bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-64bit.img.xz)|Need zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[64bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-64bit.img.xz)|Need
zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [ADRV9371](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9371.html)|Future|Future|Need zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [ADRV9371](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9371.html)|Future|Future|Need

10
kernel_boot/boards/sdrpi/devicetree.dts
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@ -417,17 +417,25 @@
}; };
}; };
ethernet@e000c000 { ethernet@e000c000 {
compatible = "cdns,zynq-gem", "cdns,gem"; compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000c000 0x1000>; reg = <0xe000c000 0x1000>;
status = "disabled"; status = "okay";
interrupts = <0x0 0x2d 0x4>; interrupts = <0x0 0x2d 0x4>;
clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <0x1>; #address-cells = <0x1>;
#size-cells = <0x0>; #size-cells = <0x0>;
phy-mode = "gmii";
phy-handle = <&phy1>;
phy1: phy@0{
reg = <0>;
};
}; };
mmc@e0100000 { mmc@e0100000 {
compatible = "arasan,sdhci-8.9a"; compatible = "arasan,sdhci-8.9a";
status = "okay"; status = "okay";

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kernel_boot/boards/sdrpi/notes.md Normal file
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@ -0,0 +1,15 @@
# sdrpi for openwifi
## Introduction
[SDRPi](https://github.com/hexsdr/) is a smart and powerful SDR platform according Raspberry Pi size,which is based on [xilinx zynq7020](https://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html) and [adi ad936x](https://www.analog.com/en/products/ad9361.html).
Hareware feature is : ZYNQ 7Z020CLG400 ,1GB DDR3 memory fo PS, 1G Ethernet RJ45 for PS,1G Ethernet RJ45 for PL, USB OTG(act as USB host or USB SLAVE ), dual USB uarts for PS and PL,on board USB to JTAG debuger,TF card , bootable QSPI FLASH and also external 27 IO pins from PL bank in 3.3v vatage with enable this board connect to other boards or modules. AD9361 RF design is based FMCOMMS3 with RF amplifier additionally.It also has a Ublox m8t GPS module and 40MHZ VCXO.
It could be used as a traditional SDR device such as PlutoSDR or FMCOMMS2/3/4 with Xilinx evaluation board, and it also be used as hardware platform to support openwifi.

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kernel_boot/boards/sdrpi/u-boot.elf
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kernel_boot/kernel_config
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@ -1557,7 +1557,7 @@ CONFIG_MARVELL_PHY=y
# CONFIG_MICROSEMI_PHY is not set # CONFIG_MICROSEMI_PHY is not set
# CONFIG_NATIONAL_PHY is not set # CONFIG_NATIONAL_PHY is not set
# CONFIG_QSEMI_PHY is not set # CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set CONFIG_REALTEK_PHY=y
# CONFIG_ROCKCHIP_PHY is not set # CONFIG_ROCKCHIP_PHY is not set
# CONFIG_SMSC_PHY is not set # CONFIG_SMSC_PHY is not set
# CONFIG_STE10XP is not set # CONFIG_STE10XP is not set