Merge pull request #267 from open-sdr/pre-release

Pre release
2025-01-31 16:35:26 +00:00 · 2023-01-28 11:55:04 +01:00 · 2023-01-28 11:55:04 +01:00 · 8b98c36d82
commit 8b98c36d82
parent 910b487a3c bfa0a5cda4
67 changed files with 9145 additions and 14656 deletions
--- a/README.md
+++ b/README.md
@ -43,23 +43,25 @@ Openwifi code has dual licenses. [AGPLv3](https://github.com/open-sdr/openwifi/b

 **Performance (best case: aggregation/AMPDU on):**
 - iperf: TCP 40~50Mbps; UDP 50Mbps
- EVM -38dB; MCS0 sensitivity -87dBm; MCS7 -72dBm. (FMCOMMS2 2.4GHz; cable and OTA test)
+- EVM -38dB; MCS0 sensitivity -92dBm; MCS7 -73dBm. (FMCOMMS2 2.4GHz; cable and OTA test)

-**Supported SDR platforms:** (Check [Porting guide](#Porting-guide) for your new board if it isn't in the list)
+**Supported SDR platforms:** ([openwifi img](https://drive.google.com/file/d/1fb8eJGJAntOciCiGFVLfQs7m7ucRtSWD/view?usp=share_link))

-board_name|board combination|status|SD card img|Vivado license
-------|-------|----|----|-----
-zc706_fmcs2|[Xilinx ZC706 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
-zed_fmcs2|[Xilinx zed board](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
-adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/adrv9364-z7020.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
-adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
-zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
-antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
-sdrpi|[HexSDR](https://github.com/HexSDR/) Powerful SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
-zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[64bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-64bit.img.xz)|Need
-zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [ADRV9371](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9371.html)|Future|Future|Need
+board_name|Description|Vivado license
+----------|-----------|--------------
+zc706_fmcs2|[Xilinx ZC706 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Need
+zed_fmcs2|[Xilinx zed board](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|**NO** need
+adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/adrv9364-z7020.html)|**NO** need
+adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Need
+zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|**NO** need
+antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|**NO** need
+antsdr_e200|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO (smaller/cheaper) [Notes](kernel_boot/boards/antsdr_e200/README.md)|**NO** need
+sdrpi|[HexSDR](https://github.com/HexSDR/) SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|**NO** need
+zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Need
+neptunesdr|Low cost Zynq 7020 + AD9361 board|**NO** need

- board_name is used to identify FPGA design in openwifi-hw/boards/
+- Check [Porting guide](#Porting-guide) for your new board if it isn't in the list.
+- board_name is used to identify FPGA design in openwifi-hw/boards/ and FPGA image in openwifi-hw-img/boards
 - Don't have any boards? Or you like JTAG boot instead of SD card? Check our test bed [w-iLab.t](https://doc.ilabt.imec.be/ilabt/wilab/tutorials/openwifi.html) tutorial.

 [[Quick start](#Quick-start)]
@ -76,16 +78,23 @@ zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kit
 [[Application notes](doc/app_notes/README.md)]

 ## Quick start
- Restore openwifi board specific img file (from the table) into a SD card. To do this, program "Disks" in Ubuntu can be used (Install: "sudo apt install gnome-disk-utility"). After restoring, the SD card should have two partitions: BOOT and rootfs. You need to config the **correct files in the BOOT partition** according to the **board you have** by operation on your computer: 
-  - Copy files in **openwifi/board_name** to the base directory of BOOT partition.
-  - Copy **openwifi/zynqmp-common/Image** (zcu102 board) or **openwifi/zynq-common/uImage** (other boards) to the base directory of BOOT partition
- Connect two antennas to RXA/TXA ports. Config the board to SD card boot mode (check the board manual). Insert the SD card to the board. Power on. 
+- Download [openwifi img](https://drive.google.com/file/d/1fb8eJGJAntOciCiGFVLfQs7m7ucRtSWD/view?usp=share_link) and burn it into a 16GB SD card. After this operation, the SD card should have two partitions: BOOT and rootfs. To flash the SD card, SD card tool software (such as Startup Disk Creator in Ubuntu) or dd command can be used:
+  ```
+  sudo dd bs=512 count=31116288 if=openwifi-xyz.img of=/dev/your_sdcard_dev
+  (To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename")
+  ```
+- Config the **correct files in the BOOT partition** according to the **board you have** by operation on your computer: 
+  - Copy files in **BOOT/openwifi/board_name** to the base directory of BOOT partition.
+  - Delete the **rootfs/root/kernel_modules** directory (if exist).
+- Insert the SD card to the board. Configure the board in SD booting mode. Connect antennas. Power on. 
 - Login to the board from your PC (PC Ethernet should have IP 192.168.10.1) with password **openwifi**.
  ```
  ssh root@192.168.10.122
  ```
+- If not successful, check [known issue](doc/known_issue/notter.md)
 - Then, run openwifi AP and the on board webserver
  ```
+  ./openwifi/setup_once.sh (Only need to run once for new board)
  cd openwifi
  ./wgd.sh
  ./fosdem.sh
@ -95,7 +104,7 @@ zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kit
  **NOTE** adrv9361z7035 has ultra low TX power in 5GHz. Move **CLOSER** when you use that board in 5GHz!!!
 - After you see the "openwifi" SSID on your device (Phone/Laptop/etc), connect it. Browser to 192.168.13.1 on your device, you should see the webpage hosted by the webserver on board.
  - Note 1: If your device doesn't support 5GHz (ch44), please change the **hostapd-openwifi.conf** on board and re-run fosdem.sh.
-  - Note 2: After ~2 hours, the Viterbi decoder will halt (Xilinx Evaluation License). Just power cycle the board if it happens. (If output of "./sdrctl dev sdr0 get reg rx 20" is always the same, it means the decoder halts)
+  - Note 2: After ~2 hours, the Viterbi decoder will halt (Xilinx Evaluation License). Just reload FPGA ([method](doc/app_notes/drv_fpga_dynamic_loading.md)) or simply power cycle the board if it happens. (If output of "./sdrctl dev sdr0 get reg rx 20" is always the same, it means the decoder halts)
 - To give the Wi-Fi client internet access, configure routing/NAT **on the PC**:
  ```
  sudo sysctl -w net.ipv4.ip_forward=1
@ -127,28 +136,23 @@ The board actually is an Linux/Ubuntu computer which is running **hostapd** to o

 ## Update FPGA

-(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files)
+(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle)

 Since the pre-built SD card image might not have the latest bug-fixes/updates, it is recommended to always copy the latest files in the [user_space](./user_space) directory on to the board. Then update the fpga bitstream and driver (see next section) on to the board.

- Install Vivado/SDK 2018.3 (Vivado Design Suite - HLx Editions - 2018.3 Full Product Installation. If you don't need to generate new FPGA bitstream, WebPack version without license is enough)
+- Install Vivado 2021.1. Make sure install Vitis as well. You should have this directory: your_Xilinx_install_directory/Vitis (NOT Vitis_HLS!)
+  - If the Vitis is not installed, you can add it by running "Xilinx Design Tools --> Add Design Tools for Devices 2021.1" from Xilinx program group/menu in your OS start menu.
 - Setup environment variables (use absolute path):
  ```
  export XILINX_DIR=your_Xilinx_install_directory
-  (Example: export XILINX_DIR=/opt/Xilinx. The Xilinx directory should include sth like: Downloads, SDK, Vivado, xic)
-  export OPENWIFI_HW_DIR=your_openwifi-hw_directory
-  (The directory where you store the open-sdr/openwifi-hw repo via git clone)
+  (Example: export XILINX_DIR=/opt/Xilinx. The Xilinx directory should include sth like: Downloads, Vitis, etc.)
+  export OPENWIFI_HW_IMG_DIR=your_openwifi-hw-img_directory
+  (The directory where you get the open-sdr/openwifi-hw-img repo via git clone)
  export BOARD_NAME=your_board_name
  ```
- Pick the FPGA bitstream from openwifi-hw, and generate BOOT.BIN and transfer it on board via ssh channel:
+- Pick the FPGA bitstream from openwifi-hw-img, and generate BOOT.BIN and transfer it on board via ssh channel:
  ```
-  For Zynq 7000:
-  
-  cd openwifi/user_space; ./boot_bin_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
-  
-  For Zynq MPSoC (like zcu102 board):
-  cd openwifi/user_space; ./boot_bin_gen_zynqmp.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
-  
+  cd openwifi/user_space; ./boot_bin_gen.sh $XILINX_DIR $BOARD_NAME $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top.xsa
  cd openwifi/kernel_boot/boards/$BOARD_NAME/output_boot_bin; scp ./BOOT.BIN root@192.168.10.122:
  ```
 - On board: Put the BOOT.BIN into the BOOT partition.
@ -162,20 +166,20 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
  ```
  **Power cycle** the board to load new FPGA bitstream.
  
-  To load FPGA dynamically without rebooting/power-cycle, check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md).
+  To avoid above manual operation, after BOOT.BIN is generated you can run **transfer_kernel_image_module_to_board.sh** from openwifi/user_space directory and then run **populate_kernel_image_module_reboot.sh** on board to have new FPGA and kernel image (check **prepare_kernel.sh** in the next section) taken effect.

 ## Update Driver

-(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files)
+(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle)

 Since the pre-built SD card image might not have the latest bug-fixes/updates, it is recommended to always copy the latest files in the [user_space](./user_space) directory on to the board. Then update the fpga bitstream (see previous section) and driver on to the board.

 - Prepare Analog Devices Linux kernel source code (only need to run once):
  ```
-  cd openwifi/user_space; ./prepare_kernel.sh $XILINX_DIR ARCH_BIT build
+  sudo apt install flex bison libssl-dev device-tree-compiler u-boot-tools -y
+  cd openwifi/user_space; ./prepare_kernel.sh $XILINX_DIR ARCH_BIT
  (For Zynq 7000, ARCH_BIT should be 32, for Zynq MPSoC, ARCH_BIT should be 64)
  ```
-  **Note**: In Ubuntu, gcc-10 might have issue ('yylloc' error), so use gcc-9 if you encounter error.
 - Compile the latest openwifi driver
  ```
  cd openwifi/driver; ./make_all.sh $XILINX_DIR ARCH_BIT
@ -189,7 +193,7 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
  Now you can use **wgd.sh** on board to load the new openwifi driver. **wgd.sh** also tries to reload FPGA img if system_top.bit.bin presents in the same directory. 
  Find more information in [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md).
  
-  **Note**: If you have symbol or version error while loadng the driver, it could be because the kernel in the SD card image is too old. In this case, you need to follow [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to generate your new SD card image.
+  **Note**: If you have symbol or version error while loadng the driver, it could be because the kernel in the SD card image is too old. In this case, you need put the linux kernel image generated by prepare_kernel.sh (check [[Update Driver](#Update-Driver)]) to the BOOT partition of SD card. The kernel image file name: adi-linux/arch/arm/boot/uImage (32bit); adi-linux-64/arch/arm64/boot/Image (64bit).

 ## Update sdrctl
 - Copy the sdrctl source files to the board via ssh channel
@ -198,11 +202,11 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
  ```
 - Compile the sdrctl **on board**:
  ```
-  cd ~/openwifi/sdrctl_src/ && make && cp sdrctl ../ && cd ..
+  cd ~/openwifi/sdrctl_src/ && make clean && make && cp sdrctl ../ && cd ..
  ```
 ## Easy Access and etc

- Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files.
+- Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle.
 - FPGA and driver on board update scripts
  - Setup [ftp server](https://ubuntu.com/server/docs/service-ftp) on PC, allow anonymous and change ftp root directory to the openwifi directory.
  - On board:
@ -217,45 +221,7 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
   - Input password "openwifi"

 ## Build openwifi Linux img from scratch
- Install the devicetree compiler -- dtc. (For Ubuntu: sudo apt install device-tree-compiler)
- Install the mkimage tool. (For Ubuntu: sudo apt install u-boot-tools)
- Download [2019_R1-2020_06_22.img.xz](http://swdownloads.analog.com/cse/2019_R1-2020_06_22.img.xz) from [Analog Devices Wiki](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images). Burn it to a SD card.
- Insert the SD card to your Linux PC. Find out the mount point (that has two sub directories BOOT and rootfs), and setup environment variables (use absolute path):
-  ```
-  export SDCARD_DIR=sdcard_mount_point
-  export XILINX_DIR=your_Xilinx_install_directory
-  export OPENWIFI_HW_DIR=your_openwifi-hw_directory
-  export BOARD_NAME=your_board_name
-  ```
- Run script to update SD card:
-  ```
-  cd openwifi/user_space; ./update_sdcard.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME $SDCARD_DIR
-  ```
- Config your board to SD card boot mode (check the board manual). Insert the SD card to the board. Power on.
- Login to the board from your PC (PC Ethernet should have IP 192.168.10.1) with one time password **analog**.
-  ```
-  ssh root@192.168.10.122
-  ```
- Setup routing/NAT **on the PC** for your board -- this internet connection is **important** for post installation/config.
-  ```
-  sudo sysctl -w net.ipv4.ip_forward=1
-  sudo iptables -t nat -A POSTROUTING -o NICY -j MASQUERADE
-  sudo ip route add 192.168.13.0/24 via 192.168.10.122 dev ethX
-  ```
-  **ethX** is the PC NIC name connecting the board ethernet. **NICY** is the PC NIC name connecting internet (WiFi or another ethernet).
-  
-  If you want, uncommenting "net.ipv4.ip_forward=1" in /etc/sysctl.conf to make IP forwarding persistent on PC.
- Test the connectivity. Run on board (in the ssh session):
-  ```
-  route add default gw 192.168.10.1
-  ping IP_YOU_KNOW_ON_YOUR_NETWORK
-  ```
-  If there is issue with the connectivity (ping can not reach the target), it needs to be solved before going to the next step.
- Run **one time** script on board to complete post installation/config (After this, password becomes **openwifi**)
-  ```
-  cd ~/openwifi && ./post_config.sh
-  ```
- Now you can start from [Quick start](#Quick-start) (Skip the image download and burn step)
+- For the latest ADI Kuiper image, please check [kuiper.md](./doc/img_build_instruction/kuiper.md)

 ## Special note for 11b

@ -272,13 +238,13 @@ cd openwifi/user_space; ./build_wpa_supplicant_wo11b.sh
 ```
 ## Porting guide

-This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. openwifi is based on 2019_R1 of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl).
+This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. openwifi is based on 2021_r1 of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl).
 - Open the fmcomms2 + zc706 reference design at hdl/projects/fmcomms2/zc706 (Please read Analog Devices help)
 - Open the openwifi design zc706_fmcs2 at openwifi-hw/boards/zc706_fmcs2 (Please read openwifi-hw repository)
 - "Open Block Design", you will see the differences between openwifi and the reference design. Both in "diagram" and in "Address Editor".
 - The address/interrupts of FPGA blocks hooked to the ARM bus should be put/aligned to the devicetree file openwifi/kernel_boot/boards/zc706_fmcs2/devicetree.dts. Linux will parse the devicetree.dtb when booting to know information of attached device (FPGA blocks in our case).
 - We use dtc command to get devicetree.dts converted from devicetree.dtb in [Analog Devices Linux image](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images), then do modification according to what we have added/modified to the reference design.
- Please learn the script in [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to understand how we generate devicetree.dtb, BOOT.BIN and Linux kernel uImage and put them together to build the full SD card image.
+- Please learn the script in [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to understand how we generate devicetree.dtb, BOOT.BIN, Linux kernel and put them together to build the full SD card image.

 ## License

--- a/doc/README.md
+++ b/doc/README.md
@ -204,7 +204,7 @@ reg_idx|meaning|comment
 8|RSSI threshold for CCA (channel idle/busy)|set by ad9361_rf_set_channel automatically. the unit is rssi_half_db, check rssi_half_db_to_rssi_dbm()/rssi_dbm_to_rssi_half_db() in sdr.c to see the relation to rssi dBm
 9|some low MAC time setting|bit31 0:auto, 1:manual. When manual, bit6-0: PHY rx delay, bit13-7: SIFS, bit18-14: slot time, bit23-19: ofdm symbol time, bit30-24: preamble+SIG time. unit us. check xpu.v (search slv_reg9)
 10|BB RF delay setting|unit 0.1us. bit7-0: BB RF delay, bit14-8: RF end extended time on top of the delay. bit22-16: delay between bb tx start to RF tx on (lo or port control via spi). bit30-24: delay between bb tx end to RF tx off. check xpu.v (search slv_reg10)
-11|ACK control and max num retransmission|bit4: 0:normal ACK, 1:disable auto ACK reply in FPGA. bit3-0: if bit3==0, the number of retransmission is decided by Linux. if bit3==1, the max num retransmission is taken from bit2-0
+11|ACK control and max num retransmission|bit4: 0:normal ACK tx/reply, 1:disable auto ACK tx/reply in FPGA. bit5: 0:normal ACK rx from peer, 1:not expecting ACK rx from peer. bit3-0: if bit3==0, the number of retransmission is decided by Linux. if bit3==1, the max num retransmission is taken from bit2-0
 12|AMPDU control|bit0: indicate low MAC start to receive AMPDU. bit4-1: tid. bit31: tid enable (by default, tid is not enabled and we decode AMPDU of all tid)
 13|spi controller config|1: disable spi control and Tx RF is always on; 0: enable spi control and Tx RF only on (lo/port) when pkt sending
 16|setting when wait for ACK in 2.4GHz|unit 0.1us. bit14-0: OFDM decoding timeout (after detect PHY header), bit30-16: timeout for PHY header detection, bit31: 0: FCS valid is not needed for ACK packet, 1: FCS valid is needed for ACK packet
--- a/doc/app_notes/README.md
+++ b/doc/app_notes/README.md
@ -13,7 +13,7 @@ Application notes collect many small topics about using openwifi in different sc
 - [WiFi CSI radar via self CSI capturing](radar-self-csi.md)
 - [Capture IQ sample, AGC gain, RSSI with many types of trigger condition](iq.md)
 - [Capture dual antenna TX/RX IQ for multi-purpose (capture collision)](iq_2ant.md)
- [WiFi packet and IQ sample self loopback test (over-the-air and FPGA internal)](packet-iq-self-loopback-test.md)
+- [WiFi packet, CSI and IQ sample self loopback test (over-the-air and FPGA internal)](packet-iq-self-loopback-test.md)
 - [IEEE 802.11n (Wi-Fi 4)](ieee80211n.md)
 - [802.11 packet injection and fuzzing](inject_80211.md)
 - [CSI fuzzer](csi_fuzzer.md)
--- a/doc/app_notes/drv_fpga_dynamic_loading.md
+++ b/doc/app_notes/drv_fpga_dynamic_loading.md
@ -20,7 +20,7 @@ present in the directory. If wgd.sh can not find the FPGA image, it will skip re
 - Generate the reloadable FPGA file **system_top.bit.bin**. In the Linux host computer:
  ```
  cd openwifi/user_space
-  ./drv_and_fpga_package_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
+  ./drv_and_fpga_package_gen.sh $OPENWIFI_HW_IMG_DIR $XILINX_DIR $BOARD_NAME
  ```
  Then **system_top.bit.bin** will be generated in openwifi/user_space.

--- a/doc/app_notes/frequent_trick.md
+++ b/doc/app_notes/frequent_trick.md
@ -1,7 +1,7 @@
 Some usual/frequent control trick over the openwifi FPGA. You need to do these controls on board in the openwifi directory.

 [[CCA LBT threshold and disable](#CCA-LBT-threshold-and-disable)]
-[[Retransmission and ACK tx control](#Retransmission-and-ACK-tx-control)]
+[[Retransmission and ACK control](#Retransmission-and-ACK-control)]
 [[NAV DIFS EIFS CW disable and enable](#NAV-DIFS-EIFS-CW-disable-and-enable)]
 [[CW max and min config](#CW-max-and-min-config)]

@ -39,7 +39,7 @@ Disable the CCA by setting a very strong level as threshold, for example -1dBm:
 ```
 After above command, the CCA engine will always believe the channel is idle, because the rx signal strength not likely could exceed -1dBm.
  
-## Retransmission and ACK tx control
+## Retransmission and ACK control

 The best way of override the maximum number of re-transmission for a Tx packet is doing it in the driver openwifi_tx() function. 
 ```
@ -60,7 +60,7 @@ To override the maximum number of re-transmission, set bit3 to 1, and set the va

 9 in binary form is 01001.

-To disable the ACK TX after receive a packet, set bit4 to 1. (Assume we want to preserve the above re-transmission overriding setting)
+To disable the ACK TX after receiving a packet, set bit4 to 1. (Assume we want to preserve the above re-transmission overriding setting)
 ```
 ./sdrctl dev sdr0 set reg xpu 11 25
 ```
@ -68,6 +68,8 @@ To disable the ACK TX after receive a packet, set bit4 to 1. (Assume we want to
 25 in binary form is 11001. the 1001 of bit3 to 1 is untouched.

 Disabling ACK TX might be useful for monitor mode and packet injection.
+
+To disable the ACK RX after sending a packet, set bit5 to 1.
  
 ## NAV DIFS EIFS CW disable and enable

--- a/doc/app_notes/iq.md
+++ b/doc/app_notes/iq.md
@ -84,7 +84,7 @@ We implement the **IQ sample capture** with interesting extensions: many **trigg
  0 |receiver gives FCS checksum result. no matter pass/fail
  1 |receiver gives FCS checksum result. pass
  2 |receiver gives FCS checksum result. fail
-  3 |receiver gives SIGNAL field checksum result. no matter pass/fail
+  3 |the tx_intf_iq0 becomes non zero (the 1st I/Q out)
  4 |receiver gives SIGNAL field checksum result. pass
  5 |receiver gives SIGNAL field checksum result. fail
  6 |receiver gives SIGNAL field checksum result. no matter pass/fail. HT packet
--- a/doc/app_notes/openwifi-csi-fpga-loopback.jpg
+++ b/doc/app_notes/openwifi-csi-fpga-loopback.jpg
--- a/doc/app_notes/packet-iq-self-loopback-test.md
+++ b/doc/app_notes/packet-iq-self-loopback-test.md
@ -5,13 +5,13 @@ SPDX-License-Identifier: AGPL-3.0-or-later
 -->

 One super power of the openwifi platform is "**Full Duplex**" which means that openwifi baseband can receive its own TX signal.
-This makes the IQ sample and WiFi packet self loopback test possible. Reading the normal IQ sample capture [app note](iq.md) will help if you have issue or 
-want to understand openwifi side channel (for IQ and CSI) deeper.
+This makes the IQ sample, WiFi packet and CSI self loopback test possible. Reading the normal [IQ sample capture app note](iq.md) and [CSI radar app note](radar-self-csi.md) will help if you have issue or want to understand openwifi side channel (for IQ and CSI) deeper.
 ![](./openwifi-loopback-principle.jpg)

 [[IQ self loopback quick start](#IQ-self-loopback-quick-start)]
 [[Check the packet loopback on board](#Check-the-packet-loopback-on-board)]
-[[Self loopback config](#Self-loopback-config)]
+[[IQ self loopback config](#IQ-self-loopback-config)]
+[[CSI FPGA self loopback quick start](#CSI-FPGA-self-loopback-quick-start)]

 ## IQ self loopback quick start
 (Please replace the IQ length **8187** by **4095** if you use low end FPGA board: zedboard/adrv9464z7020/antsdr/zc702/sdrpi)
@ -112,7 +112,7 @@ to do further offline analysis, or feed the IQ sample to the openwifi receiver s
  ```
  You should see the printk message of packet Tx and Rx from the openwifi driver (sdr.c).

-## Self loopback config
+## IQ self loopback config

 - By default, the loopback is via the air (from Tx antenna to Rx antenna). FPGA inernal loopback option is offered to have IQ sample and packet without 
  any interference. To have FPGA internal loopback, replace the "./side_ch_ctl wh5h0" during setup (the very 1st ssh session) by:
@ -128,3 +128,34 @@ to do further offline analysis, or feed the IQ sample to the openwifi receiver s

 - To understand deeper of all above commands/settings, please refer to [Capture IQ sample, AGC gain, RSSI with many types of trigger condition](iq.md) and
  [Capture dual antenna TX/RX IQ for multi-purpose (capture collision)](iq_2ant.md)
+  
+## CSI FPGA self loopback quick start
+
+This section will show how to connect the WiFi OFDM transmitter to the receiver directly inside FPGA, and show the ideal CSI/constellation/frequency-offset. (For CSI over the air loopback, please refer to [CSI radar app note](radar-self-csi.md))
+
+Command sequence on board:
+```
+cd openwifi
+./wgd.sh
+./monitor_ch.sh sdr0 6
+insmod side_ch.ko
+./side_ch_ctl g
+```
+Open another ssh session on board, then:
+```
+cd openwifi
+./sdrctl dev sdr0 set reg rx_intf 3 256
+(Above command let the FPGA Tx IQ come to receiver directly. Set 256 back to 0 to let receiver back connect to AD9361 RF frontend)
+./sdrctl dev sdr0 set reg rx 5 0
+(Disable the receiver FFT window shift. By default it is 1 -- good for multipath, overfitting for direct loopback)
+./inject_80211/inject_80211 -m n -r 7 -n 99999 -s 1400 -d 1000000 sdr0
+(Transmit 802.11n MCS7 1400Byte packet every second)
+```
+
+Command on computer:
+```
+cd openwifi/user_space/side_ch_ctl_src
+python3 side_info_display.py
+```
+Now you should see the following screenshot that shows the CSI/constellation/frequency-offset over this in-FPGA ideal channel.
+![](./openwifi-csi-fpga-loopback.jpg)
--- a/doc/img_build_instruction/kuiper.md
+++ b/doc/img_build_instruction/kuiper.md
@ -0,0 +1,159 @@
+**IMPORTANT pre-conditions**:
+- Install Vivado 2021.1. Make sure install Vitis as well. You should have this directory: your_Xilinx_install_directory/Vitis (NOT Vitis_HLS!)
+  - If the Vitis is not installed, you can add it by running "Xilinx Design Tools --> Add Design Tools for Devices 2021.1" from Xilinx program group/menu in your OS start menu, or Help menu of Vivado.
+- SD card at least with 16GB
+- Install packages: `sudo apt install flex bison libssl-dev device-tree-compiler u-boot-tools -y`
+
+[[Use openwifi prebuilt img](#Use-openwifi-prebuilt-img)]
+[[Build SD card from scratch](#Build-SD-card-from-scratch)]
+[[Use existing SD card on new board](#Use-existing-SD-card-on-new-board)]
+
+## Use openwifi prebuilt img
+
+Download openwifi pre-built img, such as openwifi-xyz.img.xz (in [Quick start](../../README.md#quick-start)), and extract it to .img file.
+
+Use dd command to flash the SD card. (Or other software like Startup Disk Creator in Ubuntu)
+```
+sudo dd bs=512 count=31116288 if=openwifi-xyz.img of=/dev/your_sdcard_dev
+```
+To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename".
+
+Then start from the 2nd step of the [Quick start](../../README.md#quick-start) in README.
+
+## Build SD card from scratch
+
+Download image_2022-08-04-ADI-Kuiper-full.zip from https://wiki.analog.com/resources/tools-software/linux-software/kuiper-linux?redirect=1
+
+Extract it to .img file.
+
+Use dd command to flash the SD card. (Or other software like Startup Disk Creator in Ubuntu)
+```
+sudo dd bs=512 count=24018944 if=2022-08-04-ADI-Kuiper-full.img of=/dev/your_sdcard_dev
+```
+
+(To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename". While making .img from SD card, check the SD card dev instead)
+
+Mount the BOOT and rootfs partition of SD card to your computer.
+
+Change the SD card file: Add following into rootfs/etc/network/interfaces
+```
+# The loopback interface
+auto lo
+iface lo inet loopback
+auto eth0
+iface eth0 inet static
+
+#your static IP
+address 192.168.10.122
+
+#your gateway IP
+gateway 192.168.10.1
+netmask 255.255.255.0
+
+#your network address "family"
+network 192.168.10.0
+broadcast 192.168.10.255
+```
+
+Change the SD card file: Add following into rootfs/etc/sysctl.conf
+```
+net.ipv4.ip_forward=1
+```
+
+Change the SD card file: Add following into rootfs/etc/systemd/system.conf
+```
+DefaultTimeoutStopSec=2s
+```
+
+Put the openwifi/kernel_boot/10-network-device.rules into rootfs/etc/udev/rules.d/
+
+Run **update_sdcard.sh** from openwifi/user_space directory to further prepare the SD card. The last argument $SDCARD_DIR of the script is the directory (mounting point) on your computer that has BOOT and rootfs directories/partitions.
+
+The script will build and put following things into the SD card:
+  - Linux kernel image file ([Update Driver](../../README.md#Update-Driver)): 
+    - adi-linux-64/arch/arm64/boot/Image (64bit)
+    - adi-linux/arch/arm/boot/uImage (32bit)
+  - devicetree file:
+    - openwifi/kernel_boot/boards/zcu102_fmcs2/system.dtb (64bit)
+    - openwifi/kernel_boot/boards/$BOARD_NAME/devicetree.dtb (32bit)
+  - BOOT.BIN ([Update FPGA](../../README.md#Update-FPGA)):
+    - openwifi/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN
+  - openwifi driver ([Update Driver](../../README.md#Update-Driver)).
+  - openwifi/user_space files and openwifi/webserver files
+
+After **update_sdcard.sh** finishes, please do the 2nd step "Config the correct files ..." in [Quick start](../../README.md#quick-start). Then power on the board with the SD card, connect the board to your host PC (static IP 192.168.10.1) via ethernet, and ssh to the board with password **"analog"**
+```
+ssh root@192.168.10.122
+```
+
+Then change password to "openwifi" via "passwd" command onbard.
+
+Enlarge the onboard SD disk space, and reboot (https://github.com/analogdevicesinc/adi-kuiper-gen/releases)
+```
+raspi-config --expand-rootfs
+reboot now
+```
+Setup routing/NAT **on the PC** for your board -- this internet connection is **important** for post installation/config.
+```
+sudo sysctl -w net.ipv4.ip_forward=1
+sudo iptables -t nat -A POSTROUTING -o NICY -j MASQUERADE
+sudo ip route add 192.168.13.0/24 via 192.168.10.122 dev ethX
+```
+**ethX** is the PC NIC name connecting the board ethernet. **NICY** is the PC NIC name connecting internet (WiFi or another ethernet).
+
+If you want, uncommenting "net.ipv4.ip_forward=1" in /etc/sysctl.conf to make IP forwarding persistent on PC.
+
+Test the connectivity. Run on board (in the ssh session):
+```
+route add default gw 192.168.10.1
+ping IP_YOU_KNOW_ON_YOUR_NETWORK
+```
+If there is issue with the connectivity (ping can not reach the target), it needs to be solved before going to the next step.
+
+Do misc configurations/installations in the ssh session onboard:
+```
+sudo apt update
+chmod +x /root/openwifi/*.sh
+
+# install and setup dhcp server
+sudo apt-get -y install isc-dhcp-server
+cp /root/openwifi/dhcpd.conf /etc/dhcp/dhcpd.conf
+
+# install hostapd and other useful tools
+sudo apt-get -y install hostapd
+sudo apt-get -y install tcpdump
+sudo apt-get -y install webfs
+sudo apt-get -y install iperf
+sudo apt-get -y install iperf3
+sudo apt-get -y install libpcap-dev
+sudo apt-get -y install bridge-utils
+
+# build on board tools
+sudo apt-get -y install libnl-3-dev
+sudo apt-get -y install libnl-genl-3-dev
+cd /root/openwifi/sdrctl_src
+make clean
+make
+cp sdrctl ../
+cd /root/openwifi/side_ch_ctl_src/
+gcc -o side_ch_ctl side_ch_ctl.c
+cp side_ch_ctl ../
+cd /root/openwifi/inject_80211/
+make clean
+make
+cd ..
+```
+
+Run openwifi in the ssh session onboard:
+```
+/root/openwifi/setup_once.sh (Only need to run once for new board)
+cd /root/openwifi
+./wgd.sh
+ifconfig sdr0 up
+iwlist sdr0 scan
+./fosdem.sh
+```
+
+## Use existing SD card on new board
+
+Just operate the existing/working SD card of the old board on your computer starting from the 2nd step of the [Quick start](../../README.md#quick-start) in README. Then start using the SD card on the new board.
--- a/doc/known_issue/notter.md
+++ b/doc/known_issue/notter.md
@ -0,0 +1,13 @@
+# Known issue
+
+- [antsdr e200 uart and network issue](#antsdr-e200-uart-and-network-issue)
+
+## antsdr e200 uart and network issue
+
+- OS: Ubuntu 22 LTS
+- Hardware: antsdr e200
+- image: [openwifi img](https://drive.google.com/file/d/1fb8eJGJAntOciCiGFVLfQs7m7ucRtSWD/view?usp=share_link)
+
+If can't connect to antsdr e200 for the 1st time, you might need to delete /etc/network/interfaces.new on SD card.
+
+If can't see the UART console in Linux (/dev/ttyCH341USB0), according to https://github.com/juliagoda/CH341SER, you might need to do `sudo apt remove brltty`
--- a/driver/Makefile
+++ b/driver/Makefile
@ -1,6 +1,6 @@
 # Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be

-obj-m += sdr.o
+obj-m += sdr.o openofdm_rx/openofdm_rx.o openofdm_tx/openofdm_tx.o tx_intf/tx_intf.o rx_intf/rx_intf.o xpu/xpu.o

 all:
 	make -C $(KDIR) M=$(PWD) modules
--- a/driver/ad9361/README.md
+++ b/driver/ad9361/README.md
@ -1,6 +0,0 @@
-<!--
-Author: Xianjun Jiao
-SPDX-FileCopyrightText: 2021 UGent
-SPDX-License-Identifier: AGPL-3.0-or-later
-->
-We don't maintain our own (modified) ad9361 driver anymore! The original ad9361 driver in the Linux kernel tree can be used with some extra EXPORT_SYMBOL.
--- a/driver/ad9361/ad9361.c
+++ b/driver/ad9361/ad9361.c
--- a/driver/ad9361/ad9361_conv.c
+++ b/driver/ad9361/ad9361_conv.c
@ -1,821 +0,0 @@
-/*
- * AD9361 Agile RF Transceiver
- *
- * Copyright 2013-2017 Analog Devices Inc.
- *
- * Licensed under the GPL-2.
- */
-
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/spi/spi.h>
-#include <linux/err.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/string.h>
-#include <linux/uaccess.h>
-
-#include <linux/iio/iio.h>
-#include <linux/iio/sysfs.h>
-
-#include <linux/clk.h>
-#include <linux/clkdev.h>
-#include <linux/clk-provider.h>
-
-#include "ad9361.h"
-
-#if IS_ENABLED(CONFIG_CF_AXI_ADC)
-#include "cf_axi_adc.h"
-
-static void ad9361_set_intf_delay(struct ad9361_rf_phy *phy, bool tx,
-				  unsigned int clock_delay,
-				  unsigned int data_delay, bool clock_changed)
-{
-	if (clock_changed)
-		ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
-	ad9361_spi_write(phy->spi,
-			REG_RX_CLOCK_DATA_DELAY + (tx ? 1 : 0),
-			RX_DATA_DELAY(data_delay) |
-			DATA_CLK_DELAY(clock_delay));
-	if (clock_changed)
-		ad9361_ensm_force_state(phy, ENSM_STATE_FDD);
-}
-
-static unsigned int ad9361_num_phy_chan(struct axiadc_converter *conv)
-{
-	if (conv->chip_info->num_channels > 4)
-		return 4;
-	return conv->chip_info->num_channels;
-}
-
-static int ad9361_check_pn(struct axiadc_converter *conv, bool tx,
-			   unsigned int delay)
-{
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	unsigned int num_chan = ad9361_num_phy_chan(conv);
-	unsigned int chan;
-
-	for (chan = 0; chan < num_chan; chan++)
-		axiadc_write(st, ADI_REG_CHAN_STATUS(chan),
-			     ADI_PN_ERR | ADI_PN_OOS);
-	mdelay(delay);
-
-	if (!tx && !(axiadc_read(st, ADI_REG_STATUS) & ADI_STATUS))
-		return 1;
-
-	for (chan = 0; chan < num_chan; chan++) {
-		if (axiadc_read(st, ADI_REG_CHAN_STATUS(chan)))
-			return 1;
-	}
-
-	return 0;
-}
-
-ssize_t ad9361_dig_interface_timing_analysis(struct ad9361_rf_phy *phy,
-						   char *buf, unsigned buflen)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct ad9361_dig_tune_data data;
-	int i, j, len = 0;
-	int ret;
-	u8 field[16][16];
-	u8 rx;
-
-	if (!conv)
-		return -ENODEV;
-
-	ret = ad9361_get_dig_tune_data(phy, &data);
-	if (ret < 0)
-		return ret;
-
-	dev_dbg(&phy->spi->dev, "%s:\n", __func__);
-
-	rx = ad9361_spi_read(phy->spi, REG_RX_CLOCK_DATA_DELAY);
-
-	/* Mute TX, we don't want to transmit the PRBS */
-	ad9361_tx_mute(phy, 1);
-
-	ad9361_ensm_mode_disable_pinctrl(phy);
-
-	ad9361_bist_loopback(phy, 0);
-	ad9361_bist_prbs(phy, BIST_INJ_RX);
-
-	for (i = 0; i < 16; i++) {
-		for (j = 0; j < 16; j++) {
-			ad9361_set_intf_delay(phy, false, i, j, j == 0);
-			field[j][i] = ad9361_check_pn(conv, false, 1);
-		}
-	}
-
-	ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
-	ad9361_spi_write(phy->spi, REG_RX_CLOCK_DATA_DELAY, rx);
-	ad9361_bist_loopback(phy, data.bist_loopback_mode);
-	ad9361_write_bist_reg(phy, data.bist_config);
-
-	ad9361_ensm_mode_restore_pinctrl(phy);
-	ad9361_ensm_restore_state(phy, data.ensm_state);
-
-	ad9361_tx_mute(phy, 0);
-
-	len += snprintf(buf + len, buflen, "CLK: %lu Hz 'o' = PASS\n",
-		       clk_get_rate(phy->clks[RX_SAMPL_CLK]));
-	len += snprintf(buf + len, buflen, "DC");
-	for (i = 0; i < 16; i++)
-		len += snprintf(buf + len, buflen, "%x:", i);
-	len += snprintf(buf + len, buflen, "\n");
-
-	for (i = 0; i < 16; i++) {
-		len += snprintf(buf + len, buflen, "%x:", i);
-		for (j = 0; j < 16; j++) {
-			len += snprintf(buf + len, buflen, "%c ",
-					(field[i][j] ? '.' : 'o'));
-		}
-		len += snprintf(buf + len, buflen, "\n");
-	}
-	len += snprintf(buf + len, buflen, "\n");
-
-	return len;
-}
-EXPORT_SYMBOL(ad9361_dig_interface_timing_analysis);
-
-static ssize_t samples_pps_read(struct iio_dev *indio_dev,
-				    uintptr_t private,
-				    const struct iio_chan_spec *chan, char *buf)
-{
-	struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	u32 config, val, mode;
-
-	config = axiadc_read(st, ADI_REG_CONFIG);
-
-	if (!(config & ADI_PPS_RECEIVER_ENABLE))
-		return -ENODEV;
-
-	val = axiadc_read(st, ADI_REG_CLOCKS_PER_PPS_STATUS);
-	if (val & ADI_CLOCKS_PER_PPS_STAT_INVAL)
-		return -ETIMEDOUT;
-
-	mode = axiadc_read(st, ADI_REG_CNTRL);
-
-	/*
-	 * Counts DATA_CLK cycles therefore needs to be corrected
-	 * for 2rx2tx mode or for LVDS vs. CMOS mode.
-	 */
-
-	val = axiadc_read(st, ADI_REG_CLOCKS_PER_PPS);
-
-	if (!(mode & ADI_R1_MODE))
-		val /= 2;
-
-	if (!(config & ADI_CMOS_OR_LVDS_N))
-		val /= 2;
-
-	return sprintf(buf, "%u\n", val);
-}
-
-/*
- * Returns the number of samples during a 1PPS (Pulse Per Second) interval.
- */
-
-static struct iio_chan_spec_ext_info axiadc_ext_info[] = {
-	{
-		.name = "samples_pps",
-		.read = samples_pps_read,
-		.shared = IIO_SHARED_BY_TYPE,
-	},
-	{},
-};
-
-#define AIM_CHAN(_chan, _si, _bits, _sign)			\
-	{ .type = IIO_VOLTAGE,						\
-	  .indexed = 1,							\
-	  .channel = _chan,						\
-	  .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) |		\
-			BIT(IIO_CHAN_INFO_CALIBBIAS) |			\
-			BIT(IIO_CHAN_INFO_CALIBPHASE),			\
-	  .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
-	  .ext_info = axiadc_ext_info,					\
-	  .scan_index = _si,						\
-	  .scan_type = {						\
-		.sign = _sign,						\
-		.realbits = _bits,					\
-		.storagebits = 16,					\
-		.shift = 0,						\
-	  },								\
-	}
-
-#define AIM_MC_CHAN(_chan, _si, _bits, _sign)			\
-	{ .type = IIO_VOLTAGE,						\
-	  .indexed = 1,							\
-	  .channel = _chan,						\
-	  .scan_index = _si,						\
-	  .scan_type = {						\
-		.sign = _sign,						\
-		.realbits = _bits,					\
-		.storagebits = 16,					\
-		.shift = 0,						\
-	  },								\
-	}
-
-
-static const unsigned long ad9361_2x2_available_scan_masks[] = {
-	0x01, 0x02, 0x04, 0x08, 0x03, 0x0C, /* 1 & 2 chan */
-	0x10, 0x20, 0x40, 0x80, 0x30, 0xC0, /* 1 & 2 chan */
-	0x33, 0xCC, 0xC3, 0x3C, 0x0F, 0xF0, /* 4 chan */
-	0xFF,				   /* 8 chan */
-	0x00,
-};
-
-static const unsigned long ad9361_available_scan_masks[] = {
-	0x01, 0x02, 0x04, 0x08, 0x03, 0x0C, 0x0F,
-	0x00,
-};
-
-static const struct axiadc_chip_info axiadc_chip_info_tbl[] = {
-	[ID_AD9361] = {
-		.name = "AD9361",
-		.max_rate = 61440000UL,
-		.max_testmode = 0,
-		.num_channels = 4,
-		.scan_masks = ad9361_available_scan_masks,
-		.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
-		.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
-		.channel[2] = AIM_CHAN(2, 2, 12, 'S'),
-		.channel[3] = AIM_CHAN(3, 3, 12, 'S'),
-	},
-	[ID_AD9361_2] = { /* MCS/MIMO 2x AD9361 */
-		.name = "AD9361-2",
-		.max_rate = 61440000UL,
-		.max_testmode = 0,
-		.num_channels = 8,
-		.num_shadow_slave_channels = 4,
-		.scan_masks = ad9361_2x2_available_scan_masks,
-		.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
-		.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
-		.channel[2] = AIM_CHAN(2, 2, 12, 'S'),
-		.channel[3] = AIM_CHAN(3, 3, 12, 'S'),
-		.channel[4] = AIM_MC_CHAN(4, 4, 12, 'S'),
-		.channel[5] = AIM_MC_CHAN(5, 5, 12, 'S'),
-		.channel[6] = AIM_MC_CHAN(6, 6, 12, 'S'),
-		.channel[7] = AIM_MC_CHAN(7, 7, 12, 'S'),
-	},
-	[ID_AD9364] = {
-		.name = "AD9364",
-		.max_rate = 61440000UL,
-		.max_testmode = 0,
-		.num_channels = 2,
-		.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
-		.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
-	},
-
-};
-
-static int ad9361_read_raw(struct iio_dev *indio_dev,
-			   struct iio_chan_spec const *chan,
-			   int *val,
-			   int *val2,
-			   long m)
-{
-	struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
-
-	switch (m) {
-	case IIO_CHAN_INFO_SAMP_FREQ:
-		if (!conv->clk)
-			return -ENODEV;
-
-		*val = conv->adc_clk = clk_get_rate(conv->clk);
-
-		return IIO_VAL_INT;
-
-	}
-	return -EINVAL;
-}
-
-static int ad9361_write_raw(struct iio_dev *indio_dev,
-			       struct iio_chan_spec const *chan,
-			       int val,
-			       int val2,
-			       long mask)
-{
-	struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
-	unsigned long r_clk;
-	int ret;
-
-	switch (mask) {
-	case IIO_CHAN_INFO_SAMP_FREQ:
-		if (!conv->clk)
-			return -ENODEV;
-
-		if (chan->extend_name)
-			return -ENODEV;
-
-		r_clk = clk_round_rate(conv->clk, val);
-		if (r_clk < 0 || r_clk > conv->chip_info->max_rate) {
-			dev_warn(&conv->spi->dev,
-				"Error setting ADC sample rate %ld", r_clk);
-			return -EINVAL;
-		}
-
-		ret = clk_set_rate(conv->clk, r_clk);
-		if (ret < 0)
-			return ret;
-
-		return 0;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct axiadc_state *st;
-	unsigned reg, addr, chan, version;
-
-	if (!conv)
-		return -ENODEV;
-
-	st = iio_priv(conv->indio_dev);
-	version = axiadc_read(st, 0x4000);
-
-	/* Still there but implemented a bit different */
-	if (ADI_AXI_PCORE_VER_MAJOR(version) > 7)
-		addr = 0x4418;
-	else
-		addr = 0x4414;
-
-	for (chan = 0; chan < conv->chip_info->num_channels; chan++) {
-		reg = axiadc_read(st, addr + (chan) * 0x40);
-
-		if (ADI_AXI_PCORE_VER_MAJOR(version) > 7) {
-			if (enable) {
-				if (reg != 0x8) {
-					conv->scratch_reg[chan] = reg;
-					reg = 0x8;
-				}
-			} else if (reg == 0x8) {
-				reg = conv->scratch_reg[chan];
-			}
-		} else {
-		/* DAC_LB_ENB If set enables loopback of receive data */
-			if (enable)
-				reg |= BIT(1);
-			else
-				reg &= ~BIT(1);
-		}
-		axiadc_write(st, addr + (chan) * 0x40, reg);
-	}
-
-	return 0;
-}
-EXPORT_SYMBOL(ad9361_hdl_loopback);
-
-static int ad9361_iodelay_set(struct axiadc_state *st, unsigned lane,
-			      unsigned val, bool tx)
-{
-	if (tx) {
-		if (ADI_AXI_PCORE_VER_MAJOR(st->pcore_version) > 8)
-			axiadc_write(st, 0x4000 + ADI_REG_DELAY(lane), val);
-		else
-			return -ENODEV;
-	} else {
-		axiadc_idelay_set(st, lane, val);
-	}
-
-	return 0;
-}
-
-static int ad9361_midscale_iodelay(struct ad9361_rf_phy *phy, bool tx)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	int ret = 0, i;
-
-	for (i = 0; i < 7; i++)
-		ret |= ad9361_iodelay_set(st, i, 15, tx);
-
-	return 0;
-}
-
-static int ad9361_dig_tune_iodelay(struct ad9361_rf_phy *phy, bool tx)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	int i, j;
-	u32 s0, c0;
-	u8 field[32];
-
-	for (i = 0; i < 7; i++) {
-		for (j = 0; j < 32; j++) {
-			ad9361_iodelay_set(st, i, j, tx);
-			mdelay(1);
-			field[j] = ad9361_check_pn(conv, tx, 10);
-		}
-
-		c0 = ad9361_find_opt(&field[0], 32, &s0);
-		ad9361_iodelay_set(st, i, s0 + c0 / 2, tx);
-
-		dev_info(&phy->spi->dev,
-			 "%s Lane %d, window cnt %d , start %d, IODELAY set to %d\n",
-			 tx ? "TX" :"RX",  i , c0, s0, s0 + c0 / 2);
-
-	}
-
-	return 0;
-}
-
-static void ad9361_dig_tune_verbose_print(struct ad9361_rf_phy *phy,
-					  u8 field[][16], bool tx,
-					  int sel_clk, int sel_data)
-{
-	int i, j;
-	char c;
-
-	pr_info("SAMPL CLK: %lu tuning: %s\n",
-	        clk_get_rate(phy->clks[RX_SAMPL_CLK]), tx ? "TX" : "RX");
-	pr_info("  ");
-	for (i = 0; i < 16; i++)
-		pr_cont("%x:", i);
-	pr_cont("\n");
-
-	for (i = 0; i < 2; i++) {
-		pr_info("%x:", i);
-		for (j = 0; j < 16; j++) {
-			if (field[i][j])
-			    c = '#';
-			else if ((i == 0 && j == sel_data) ||
-				 (i == 1 && j == sel_clk))
-			    c = 'O';
-			else
-			    c = 'o';
-			pr_cont("%c ", c);
-		}
-		pr_cont("\n");
-	}
-}
-
-static int ad9361_dig_tune_delay(struct ad9361_rf_phy *phy,
-				 unsigned long max_freq,
-				 enum dig_tune_flags flags, bool tx)
-{
-	// static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
-	static const unsigned int rates[3] = {25000000U, 40000000U, 40000000U};
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	unsigned int s0, s1, c0, c1;
-	unsigned int i, j, r;
-	bool half_data_rate;
-	u8 field[2][16];
-
-	if (ad9361_uses_lvds_mode(phy) || !ad9361_uses_rx2tx2(phy))
-		half_data_rate = false;
-	else
-		half_data_rate = true;
-
-	memset(field, 0, 32);
-	for (r = 0; r < (max_freq ? ARRAY_SIZE(rates) : 1); r++) {
-		if (max_freq)
-			ad9361_set_trx_clock_chain_freq(phy,
-				half_data_rate ? rates[r] / 2 : rates[r]);
-
-		for (i = 0; i < 2; i++) {
-			for (j = 0; j < 16; j++) {
-				/*
-				 * i == 0: clock delay = 0, data delay from 0 to 15
-				 * i == 1: clock delay = 15, data delay from 15 to 0
-				 */
-				ad9361_set_intf_delay(phy, tx, i ? 15 : 0,
-						      i ? 15 - j : j, j == 0);
-				field[i][j] |= ad9361_check_pn(conv, tx, 4);
-			}
-		}
-
-		if ((flags & BE_MOREVERBOSE) && max_freq) {
-			ad9361_dig_tune_verbose_print(phy, field, tx, -1, -1);
-		}
-	}
-
-	c0 = ad9361_find_opt(&field[0][0], 16, &s0);
-	c1 = ad9361_find_opt(&field[1][0], 16, &s1);
-
-	if (!c0 && !c1) {
-		ad9361_dig_tune_verbose_print(phy, field, tx, -1, -1);
-		dev_err(&phy->spi->dev, "%s: Tuning %s FAILED!", __func__,
-			tx ? "TX" : "RX");
-		return -EIO;
-	} else if (flags & BE_VERBOSE) {
-		ad9361_dig_tune_verbose_print(phy, field, tx,
-					      c1 > c0 ? (s1 + c1 / 2) : -1,
-					      c1 > c0 ? -1 : (s0 + c0 / 2));
-	}
-
-	if (c1 > c0)
-		ad9361_set_intf_delay(phy, tx, s1 + c1 / 2, 0, true);
-	else
-		ad9361_set_intf_delay(phy, tx, 0, s0 + c0 / 2, true);
-
-	return 0;
-}
-
-static int ad9361_dig_tune_rx(struct ad9361_rf_phy *phy, unsigned long max_freq,
-			      enum dig_tune_flags flags)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	int ret;
-
-	ad9361_bist_loopback(phy, 0);
-	ad9361_bist_prbs(phy, BIST_INJ_RX);
-
-	ret = ad9361_dig_tune_delay(phy, max_freq, flags, false);
-	if (flags & DO_IDELAY)
-		ad9361_dig_tune_iodelay(phy, false);
-
-	axiadc_write(st, ADI_REG_RSTN, ADI_MMCM_RSTN);
-	axiadc_write(st, ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
-
-	return ret;
-}
-
-static int ad9361_dig_tune_tx(struct ad9361_rf_phy *phy, unsigned long max_freq,
-			      enum dig_tune_flags flags)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct axiadc_state *st = iio_priv(conv->indio_dev);
-	u32 saved_dsel[4], saved_chan_ctrl6[4], saved_chan_ctrl0[4];
-	unsigned int chan, num_chan;
-	unsigned int hdl_dac_version;
-	u32 tmp, saved = 0;
-	int ret;
-
-	num_chan = ad9361_num_phy_chan(conv);
-	hdl_dac_version = axiadc_read(st, 0x4000);
-
-	ad9361_bist_prbs(phy, BIST_DISABLE);
-	ad9361_bist_loopback(phy, 1);
-	axiadc_write(st, 0x4000 + ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
-
-	for (chan = 0; chan < num_chan; chan++) {
-		saved_chan_ctrl0[chan] = axiadc_read(st, ADI_REG_CHAN_CNTRL(chan));
-		axiadc_write(st, ADI_REG_CHAN_CNTRL(chan),
-			ADI_FORMAT_SIGNEXT | ADI_FORMAT_ENABLE |
-			ADI_ENABLE | ADI_IQCOR_ENB);
-		axiadc_set_pnsel(st, chan, ADC_PN_CUSTOM);
-		saved_chan_ctrl6[chan] = axiadc_read(st, 0x4414 + (chan) * 0x40);
-		if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) {
-			saved_dsel[chan] = axiadc_read(st, 0x4418 + (chan) * 0x40);
-			axiadc_write(st, 0x4418 + (chan) * 0x40, 9);
-			axiadc_write(st, 0x4414 + (chan) * 0x40, 0); /* !IQCOR_ENB */
-			axiadc_write(st, 0x4044, 1);
-		} else {
-			axiadc_write(st, 0x4414 + (chan) * 0x40, 1); /* DAC_PN_ENB */
-		}
-	}
-	if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8) {
-		saved = tmp = axiadc_read(st, 0x4048);
-		tmp &= ~0xF;
-		tmp |= 1;
-		axiadc_write(st, 0x4048, tmp);
-	}
-
-	ret = ad9361_dig_tune_delay(phy, max_freq, flags, true);
-	if (flags & DO_ODELAY)
-		ad9361_dig_tune_iodelay(phy, true);
-
-	if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8)
-		axiadc_write(st, 0x4048, saved);
-
-	for (chan = 0; chan < num_chan; chan++) {
-		axiadc_write(st, ADI_REG_CHAN_CNTRL(chan),
-			     saved_chan_ctrl0[chan]);
-		axiadc_set_pnsel(st, chan, ADC_PN9);
-		if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) {
-			axiadc_write(st, 0x4418 + chan * 0x40,
-				     saved_dsel[chan]);
-			axiadc_write(st, 0x4044, 1);
-		}
-
-		axiadc_write(st, 0x4414 + chan * 0x40, saved_chan_ctrl6[chan]);
-	}
-
-	return ret;
-}
-
-int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
-		    enum dig_tune_flags flags)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
-	struct ad9361_dig_tune_data data;
-	struct axiadc_state *st;
-	bool restore = false;
-	int ret = 0;
-
-	if (!conv)
-		return -ENODEV;
-
-	ret = ad9361_get_dig_tune_data(phy, &data);
-	if (ret < 0)
-		return ret;
-
-	dev_dbg(&phy->spi->dev, "%s: freq %lu flags 0x%X\n", __func__,
-		max_freq, flags);
-
-	st = iio_priv(conv->indio_dev);
-
-	if ((data.skip_mode == SKIP_ALL) ||
-	    (flags & RESTORE_DEFAULT)) {
-		/* skip completely and use defaults */
-		restore = true;
-	} else {
-		/* Mute TX, we don't want to transmit the PRBS */
-		ad9361_tx_mute(phy, 1);
-
-		ad9361_ensm_mode_disable_pinctrl(phy);
-
-		if (flags & DO_IDELAY)
-			ad9361_midscale_iodelay(phy, false);
-
-		if (flags & DO_ODELAY)
-			ad9361_midscale_iodelay(phy, true);
-
-		ret = ad9361_dig_tune_rx(phy, max_freq, flags);
-		if (ret == 0 && (data.skip_mode == TUNE_RX_TX))
-			ret = ad9361_dig_tune_tx(phy, max_freq, flags);
-
-		ad9361_bist_loopback(phy, data.bist_loopback_mode);
-		ad9361_write_bist_reg(phy, data.bist_config);
-
-		if (ret == -EIO)
-			restore = true;
-		if (!max_freq)
-			ret = 0;
-	}
-
-	if (restore) {
-		ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
-		ad9361_write_clock_data_delays(phy);
-	} else if (!(flags & SKIP_STORE_RESULT)) {
-		ad9361_read_clock_data_delays(phy);
-	}
-
-	ad9361_ensm_mode_restore_pinctrl(phy);
-	ad9361_ensm_restore_state(phy, data.ensm_state);
-
-	axiadc_write(st, ADI_REG_RSTN, ADI_MMCM_RSTN);
-	axiadc_write(st, ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
-
-	ad9361_tx_mute(phy, 0);
-
-	return ret;
-}
-EXPORT_SYMBOL(ad9361_dig_tune);
-
-static int ad9361_post_setup(struct iio_dev *indio_dev)
-{
-	struct axiadc_state *st = iio_priv(indio_dev);
-	struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
-	struct ad9361_rf_phy *phy = conv->phy;
-	bool rx2tx2 = ad9361_uses_rx2tx2(phy);
-	unsigned tmp, num_chan, flags;
-	int i, ret;
-
-	num_chan = ad9361_num_phy_chan(conv);
-
-	conv->indio_dev = indio_dev;
-	axiadc_write(st, ADI_REG_CNTRL, rx2tx2 ? 0 : ADI_R1_MODE);
-	tmp = axiadc_read(st, 0x4048);
-
-	if (!rx2tx2) {
-		axiadc_write(st, 0x4048, tmp | BIT(5)); /* R1_MODE */
-		axiadc_write(st, 0x404c,
-			     ad9361_uses_lvds_mode(phy) ? 1 : 0); /* RATE */
-	} else {
-		tmp &= ~BIT(5);
-		axiadc_write(st, 0x4048, tmp);
-		axiadc_write(st, 0x404c,
-			     ad9361_uses_lvds_mode(phy) ? 3 : 1); /* RATE */
-	}
-
-	for (i = 0; i < num_chan; i++) {
-		axiadc_write(st, ADI_REG_CHAN_CNTRL_1(i),
-			     ADI_DCFILT_OFFSET(0));
-		axiadc_write(st, ADI_REG_CHAN_CNTRL_2(i),
-			     (i & 1) ? 0x00004000 : 0x40000000);
-		axiadc_write(st, ADI_REG_CHAN_CNTRL(i),
-			     ADI_FORMAT_SIGNEXT | ADI_FORMAT_ENABLE |
-			     ADI_ENABLE | ADI_IQCOR_ENB);
-	}
-
-	flags = 0;
-
-	ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ?
-		0 : 61440000, flags);
-	if (ret < 0)
-		goto error;
-
-	if (flags & (DO_IDELAY | DO_ODELAY)) {
-		ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ?
-			0 : 61440000, flags & BE_VERBOSE);
-		if (ret < 0)
-			goto error;
-	}
-
-	ret = ad9361_set_trx_clock_chain_default(phy);
-
-	ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
-	ad9361_ensm_restore_prev_state(phy);
-
-	return 0;
-
-error:
-	spi_set_drvdata(phy->spi, NULL);
-	return ret;
-}
-
-int ad9361_register_axi_converter(struct ad9361_rf_phy *phy)
-{
-	struct axiadc_converter *conv;
-	struct spi_device *spi = phy->spi;
-	int ret;
-
-	conv = devm_kzalloc(&spi->dev, sizeof(*conv), GFP_KERNEL);
-	if (conv == NULL)
-		return -ENOMEM;
-
-	conv->id = ad9361_spi_read(spi, REG_PRODUCT_ID) & PRODUCT_ID_MASK;
-	if (conv->id != PRODUCT_ID_9361) {
-		dev_err(&spi->dev, "Unrecognized CHIP_ID 0x%X\n", conv->id);
-  		ret = -ENODEV;
-  		goto out;
-	}
-
-	conv->chip_info = &axiadc_chip_info_tbl[
-		(spi_get_device_id(spi)->driver_data == ID_AD9361_2) ?
-		ID_AD9361_2 : ad9361_uses_rx2tx2(phy) ? ID_AD9361 : ID_AD9364];
-	conv->write_raw = ad9361_write_raw;
-	conv->read_raw = ad9361_read_raw;
-	conv->post_setup = ad9361_post_setup;
-	conv->spi = spi;
-	conv->phy = phy;
-
-	conv->clk = phy->clks[RX_SAMPL_CLK];
-	conv->adc_clk = clk_get_rate(conv->clk);
-
-	spi_set_drvdata(spi, conv); /* Take care here */
-
-	return 0;
-out:
-	spi_set_drvdata(spi, NULL);
-	return ret;
-}
-EXPORT_SYMBOL(ad9361_register_axi_converter);
-
-struct ad9361_rf_phy* ad9361_spi_to_phy(struct spi_device *spi)
-{
-	struct axiadc_converter *conv = spi_get_drvdata(spi);
-	return conv->phy;
-}
-EXPORT_SYMBOL(ad9361_spi_to_phy);
-
-#else  /* CONFIG_CF_AXI_ADC */
-
-int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
-			   enum dig_tune_flags flags)
-{
-	return -ENODEV;
-}
-EXPORT_SYMBOL(ad9361_dig_tune);
-
-ssize_t ad9361_dig_interface_timing_analysis(struct ad9361_rf_phy *phy,
-						   char *buf, unsigned buflen)
-{
-	return 0;
-}
-EXPORT_SYMBOL(ad9361_dig_interface_timing_analysis);
-
-int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable)
-{
-	return -ENODEV;
-}
-EXPORT_SYMBOL(ad9361_hdl_loopback);
-
-int ad9361_register_axi_converter(struct ad9361_rf_phy *phy)
-{
-	struct spi_device *spi = phy->spi;
-	spi_set_drvdata(spi, phy); /* Take care here */
-
-	return 0;
-}
-EXPORT_SYMBOL(ad9361_register_axi_converter);
-
-struct ad9361_rf_phy* ad9361_spi_to_phy(struct spi_device *spi)
-{
-	return spi_get_drvdata(spi);
-}
-EXPORT_SYMBOL(ad9361_spi_to_phy);
-
-#endif /* CONFIG_CF_AXI_ADC */
--- a/driver/hw_def.h
+++ b/driver/hw_def.h
@ -205,6 +205,7 @@ const char *openofdm_rx_compatible_str = "sdr,openofdm_rx";
 #define OPENOFDM_RX_REG_POWER_THRES_ADDR   (2*4)
 #define OPENOFDM_RX_REG_MIN_PLATEAU_ADDR   (3*4)
 #define OPENOFDM_RX_REG_SOFT_DECODING_ADDR (4*4)
+#define OPENOFDM_RX_REG_FFT_WIN_SHIFT_ADDR (5*4)
 #define OPENOFDM_RX_REG_STATE_HISTORY_ADDR (20*4)

 enum openofdm_rx_mode {
@ -236,11 +237,15 @@ enum openofdm_rx_mode {
 // 11a/g BPSK 6m, Rx sensitivity level dmesg report -86dBm
 // priv->rssi_correction = 148; rssi_half_db/2 = 148-86=62; rssi_half_db = 124

-#define OPENOFDM_RX_RSSI_DBM_TH_DEFAULT (-84)
+#define OPENOFDM_RX_RSSI_DBM_TH_DEFAULT (-95) //the best openwifi reported sensitivity is like -90/-92
 #define OPENOFDM_RX_DC_RUNNING_SUM_TH_INIT 64
 #define OPENOFDM_RX_MIN_PLATEAU_INIT 100
+#define OPENOFDM_RX_FFT_WIN_SHIFT_INIT 1

-#define OPENWIFI_MAX_SIGNAL_LEN_TH 1700 //Packet longer than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
+#define OPENWIFI_MAX_SIGNAL_LEN_TH 1700 //Packet longer  than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
+
+#define OPENWIFI_MIN_SIGNAL_LEN_TH 14   //Packet shorter than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
+                                        //due to CRC32, at least 4 bytes needed to push out expected CRC result

 struct openofdm_rx_driver_api {
 	u32 (*hw_init)(enum openofdm_rx_mode mode);
@ -255,6 +260,7 @@ struct openofdm_rx_driver_api {
 	void (*OPENOFDM_RX_REG_POWER_THRES_write)(u32 value);
 	void (*OPENOFDM_RX_REG_MIN_PLATEAU_write)(u32 value);
 	void (*OPENOFDM_RX_REG_SOFT_DECODING_write)(u32 value);
+	void (*OPENOFDM_RX_REG_FFT_WIN_SHIFT_write)(u32 value);
 };

 // ---------------------------------------openofdm tx-------------------------------
@ -301,18 +307,18 @@ const char *xpu_compatible_str = "sdr,xpu";
 #define XPU_REG_RSSI_DB_CFG_ADDR          		(7*4)
 #define XPU_REG_LBT_TH_ADDR               		(8*4)
 #define XPU_REG_CSMA_DEBUG_ADDR           		(9*4)
-#define XPU_REG_BB_RF_DELAY_ADDR         		(10*4)
+#define XPU_REG_BB_RF_DELAY_ADDR         		  (10*4)
 #define XPU_REG_ACK_CTL_MAX_NUM_RETRANS_ADDR	(11*4)
-#define XPU_REG_AMPDU_ACTION_ADDR        		(12*4)
-#define XPU_REG_SPI_DISABLE_ADDR        		(13*4)
+#define XPU_REG_AMPDU_ACTION_ADDR        		  (12*4)
+#define XPU_REG_SPI_DISABLE_ADDR        		  (13*4)
 #define XPU_REG_RECV_ACK_COUNT_TOP0_ADDR  		(16*4)
 #define XPU_REG_RECV_ACK_COUNT_TOP1_ADDR  		(17*4)
 #define XPU_REG_SEND_ACK_WAIT_TOP_ADDR    		(18*4)
 #define XPU_REG_CSMA_CFG_ADDR             		(19*4)

-#define XPU_REG_SLICE_COUNT_TOTAL_ADDR   (20*4)
-#define XPU_REG_SLICE_COUNT_START_ADDR   (21*4)
-#define XPU_REG_SLICE_COUNT_END_ADDR     (22*4)
+#define XPU_REG_SLICE_COUNT_TOTAL_ADDR    (20*4)
+#define XPU_REG_SLICE_COUNT_START_ADDR    (21*4)
+#define XPU_REG_SLICE_COUNT_END_ADDR      (22*4)

 #define XPU_REG_CTS_TO_RTS_CONFIG_ADDR    (26*4)
 #define XPU_REG_FILTER_FLAG_ADDR          (27*4)
@ -321,26 +327,11 @@ const char *xpu_compatible_str = "sdr,xpu";
 #define XPU_REG_MAC_ADDR_LOW_ADDR         (30*4)
 #define XPU_REG_MAC_ADDR_HIGH_ADDR        (31*4)

-#define XPU_REG_FC_DI_ADDR                (34*4)
-#define XPU_REG_ADDR1_LOW_ADDR            (35*4)
-#define XPU_REG_ADDR1_HIGH_ADDR           (36*4)
-#define XPU_REG_ADDR2_LOW_ADDR            (37*4)
-#define XPU_REG_ADDR2_HIGH_ADDR           (38*4)
-#define XPU_REG_ADDR3_LOW_ADDR            (39*4)
-#define XPU_REG_ADDR3_HIGH_ADDR           (40*4)
-
-#define XPU_REG_SC_LOW_ADDR               (41*4)
-#define XPU_REG_ADDR4_HIGH_ADDR           (42*4)
-#define XPU_REG_ADDR4_LOW_ADDR            (43*4)
-
-#define XPU_REG_TRX_STATUS_ADDR           (50*4)
-#define XPU_REG_TX_RESULT_ADDR            (51*4)
-
 #define XPU_REG_TSF_RUNTIME_VAL_LOW_ADDR  (58*4)
 #define XPU_REG_TSF_RUNTIME_VAL_HIGH_ADDR (59*4)

-#define XPU_REG_RSSI_HALF_DB_ADDR         (60*4)
-#define XPU_REG_IQ_RSSI_HALF_DB_ADDR      (61*4)
+#define XPU_REG_MAC_ADDR_READ_BACK_ADDR   (62*4)
+#define XPU_REG_FPGA_GIT_REV_ADDR         (63*4)

 enum xpu_mode {
 	XPU_TEST = 0,
--- a/driver/make_all.sh
+++ b/driver/make_all.sh
@ -31,7 +31,7 @@ else
    exit 1
 fi

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
@ -72,7 +72,7 @@ if [[ -n $7 ]]; then
    echo "#define $DEFINE5" >> pre_def.h
 fi

-source $XILINX_DIR/SDK/2018.3/settings64.sh
+source $XILINX_DIR/Vitis/2021.1/settings64.sh
 if [ "$ARCH_OPTION" == "64" ]; then
    LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux-64/
    ARCH="arm64"
@ -85,7 +85,7 @@ fi

 # check if user entered the right path to analog device linux
 if [ -d "$LINUX_KERNEL_SRC_DIR" ]; then
-    echo " setup linux kernel path ${LINUX_KERNEL_SRC_DIR}"
+    echo "setup linux kernel path ${LINUX_KERNEL_SRC_DIR}"
 else
    echo "Error: path to adi linux: ${LINUX_KERNEL_SRC_DIR} not found. Can not continue."
    exit 1
@ -101,7 +101,6 @@ if git log -1; then
 else
    echo "#define GIT_REV 0xFFFFFFFF" > git_rev.h
 fi
-make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
 cd $OPENWIFI_DIR/driver/openofdm_tx
 make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
 cd $OPENWIFI_DIR/driver/openofdm_rx
@ -115,4 +114,10 @@ make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
 # cd $OPENWIFI_DIR/driver/ad9361
 # make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE

+cd $OPENWIFI_DIR/driver/side_ch
+./make_driver.sh $XILINX_DIR $ARCH_OPTION
+
+cd $OPENWIFI_DIR/driver/
+make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
+
 cd $home_dir
--- a/driver/openofdm_rx/openofdm_rx.c
+++ b/driver/openofdm_rx/openofdm_rx.c
@ -55,6 +55,9 @@ static inline void OPENOFDM_RX_REG_MIN_PLATEAU_write(u32 Data) {
 static inline void OPENOFDM_RX_REG_SOFT_DECODING_write(u32 Data) {
 	reg_write(OPENOFDM_RX_REG_SOFT_DECODING_ADDR, Data);
 }
+static inline void OPENOFDM_RX_REG_FFT_WIN_SHIFT_write(u32 Data) {
+	reg_write(OPENOFDM_RX_REG_FFT_WIN_SHIFT_ADDR, Data);
+}
 static const struct of_device_id dev_of_ids[] = {
 	{ .compatible = "sdr,openofdm_rx", },
 	{}
@ -93,7 +96,8 @@ static inline u32 hw_init(enum openofdm_rx_mode mode){
 	// 1) power threshold configuration and reset
 	openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write((OPENOFDM_RX_DC_RUNNING_SUM_TH_INIT<<16)|OPENOFDM_RX_POWER_THRES_INIT); // turn on signal watchdog by default
 	openofdm_rx_api->OPENOFDM_RX_REG_MIN_PLATEAU_write(OPENOFDM_RX_MIN_PLATEAU_INIT);
-	openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|1); //bit1 enable soft decoding; bit31~16 max pkt length threshold
+	openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|(OPENWIFI_MIN_SIGNAL_LEN_TH<<12)|1); //bit1 enable soft decoding; bit15~12 min pkt length threshold; bit31~16 max pkt length threshold
+	openofdm_rx_api->OPENOFDM_RX_REG_FFT_WIN_SHIFT_write(OPENOFDM_RX_FFT_WIN_SHIFT_INIT);

 	//rst
 	for (i=0;i<8;i++)
@ -139,6 +143,7 @@ static int dev_probe(struct platform_device *pdev)
 	openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write=OPENOFDM_RX_REG_POWER_THRES_write;
 	openofdm_rx_api->OPENOFDM_RX_REG_MIN_PLATEAU_write=OPENOFDM_RX_REG_MIN_PLATEAU_write;
 	openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write=OPENOFDM_RX_REG_SOFT_DECODING_write;
+	openofdm_rx_api->OPENOFDM_RX_REG_FFT_WIN_SHIFT_write=OPENOFDM_RX_REG_FFT_WIN_SHIFT_write;

 	/* Request and map I/O memory */
 	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--- a/driver/sdr.c
+++ b/driver/sdr.c
@ -44,6 +44,8 @@
 #include <linux/gpio.h>
 #include <linux/leds.h>

+// #include <linux/time.h>
+
 #define IIO_AD9361_USE_PRIVATE_H_
 #include <../../drivers/iio/adc/ad9361_regs.h>
 #include <../../drivers/iio/adc/ad9361.h>
@ -174,22 +176,23 @@ inline int rssi_correction_lookup_table(u32 freq_MHz)

 inline void ad9361_tx_calibration(struct openwifi_priv *priv, u32 actual_tx_lo)
 {
-	struct timeval tv;
-	unsigned long time_before = 0; 
-	unsigned long time_after = 0;
+	// struct timespec64 tv;
+	// unsigned long time_before = 0; 
+	// unsigned long time_after = 0;
 	u32 spi_disable; 

 	priv->last_tx_quad_cal_lo = actual_tx_lo; 
-	do_gettimeofday(&tv);
-	time_before = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
+	// do_gettimeofday(&tv);
+	// time_before = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
 	spi_disable = xpu_api->XPU_REG_SPI_DISABLE_read(); // backup current fpga spi disable state
 	xpu_api->XPU_REG_SPI_DISABLE_write(1); // disable FPGA SPI module
 	ad9361_do_calib_run(priv->ad9361_phy, TX_QUAD_CAL, (int)priv->ad9361_phy->state->last_tx_quad_cal_phase); 
 	xpu_api->XPU_REG_SPI_DISABLE_write(spi_disable); // restore original SPI disable state 
-	do_gettimeofday(&tv);
-	time_after = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
+	// do_gettimeofday(&tv);
+	// time_after = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );

-	printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration %lu us\n", sdr_compatible_str, actual_tx_lo, time_after-time_before);
+	// printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration %lu us\n", sdr_compatible_str, actual_tx_lo, time_after-time_before);
+	printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration unknown us\n", sdr_compatible_str, actual_tx_lo);
 }

 inline void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 actual_rx_lo)
@ -200,10 +203,7 @@ inline void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 a
 	priv->rssi_correction = rssi_correction_lookup_table(actual_rx_lo);

 	// set appropriate lbt threshold
-	// xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm
-	// xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44
-	// auto_lbt_th = ((priv->rssi_correction-62-16)<<1);
-	auto_lbt_th = rssi_dbm_to_rssi_half_db(-78, priv->rssi_correction); // -78dBm, the same as above ((priv->rssi_correction-62-16)<<1)
+	auto_lbt_th = rssi_dbm_to_rssi_half_db(-62, priv->rssi_correction); // -62dBm
 	static_lbt_th = rssi_dbm_to_rssi_half_db(-(priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]), priv->rssi_correction);
 	fpga_lbt_th = (priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]==0?auto_lbt_th:static_lbt_th);
 	xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th);
@ -1097,7 +1097,8 @@ static void openwifi_tx(struct ieee80211_hw *dev,
 	if (use_ht_aggr && rate_hw_value==0)
 		rate_hw_value = 1;

-	sifs = (priv->actual_rx_lo<2500?10:16);
+	// sifs = (priv->actual_rx_lo<2500?10:16);
+  sifs = 16; // for ofdm, sifs is always 16

 	if (use_ht_rate) {
 		// printk("%s openwifi_tx: rate_hw_value %d aggr %d sifs %d\n", sdr_compatible_str, rate_hw_value, use_ht_aggr, sifs);
@ -1569,18 +1570,24 @@ static int openwifi_start(struct ieee80211_hw *dev)
 	rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode
 	rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status

-	priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm");
+	// priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm");
+	priv->rx_chan = dma_request_chan(&(priv->pdev->dev), "rx_dma_s2mm");
 	if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) {
 		ret = PTR_ERR(priv->rx_chan);
-		pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan);
-		goto err_dma;
+		if (ret != -EPROBE_DEFER) {
+			pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan);
+			goto err_dma;
+		}
 	}

-	priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s");
+	// priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s");
+	priv->tx_chan = dma_request_chan(&(priv->pdev->dev), "tx_dma_mm2s");
 	if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) {
 		ret = PTR_ERR(priv->tx_chan);
-		pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan);
-		goto err_dma;
+		if (ret != -EPROBE_DEFER) {
+			pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan);
+			goto err_dma;
+		}
 	}
 	printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan);

@ -2085,16 +2092,16 @@ static const struct of_device_id openwifi_dev_of_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids);

-static int custom_match_spi_dev(struct device *dev, void *data)
+static int custom_match_spi_dev(struct device *dev, const void *data)
 {
-    const char *name = data;
+  const char *name = data;

 	bool ret = sysfs_streq(name, dev->of_node->name);
 	printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret);
 	return ret;
 }

-static int custom_match_platform_dev(struct device *dev, void *data)
+static int custom_match_platform_dev(struct device *dev, const void *data)
 {
 	struct platform_device *plat_dev = to_platform_device(dev);
 	const char *name = data;
@ -2440,7 +2447,6 @@ static int openwifi_dev_probe(struct platform_device *pdev)
 	 * is mapped on the highst tx ring IDX.
 	 */
 	dev->queues = MAX_NUM_HW_QUEUE;
-	//dev->queues = 1;

 	ieee80211_hw_set(dev, SIGNAL_DBM);

--- a/driver/sdr.h
+++ b/driver/sdr.h
@ -129,7 +129,10 @@ enum sdrctl_reg_cat {
 #define LEN_PHY_CRC 4
 #define LEN_MPDU_DELIM 4

-#define RING_ROOM_THRESHOLD 2
+#define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
+#define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
+
+#define RING_ROOM_THRESHOLD (2+MAX_NUM_SW_QUEUE) // MAX_NUM_SW_QUEUE is for the room of MAX_NUM_SW_QUEUE last packets from MAX_NUM_SW_QUEUE queue before stop
 #define NUM_BIT_NUM_TX_BD 6
 #define NUM_TX_BD (1<<NUM_BIT_NUM_TX_BD) // !!! should align to the fifo size in tx_bit_intf.v

@ -143,8 +146,6 @@ enum sdrctl_reg_cat {
 #define RX_BD_BUF_SIZE (2048)

 #define NUM_BIT_MAX_NUM_HW_QUEUE 2
-#define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
-#define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
 #define NUM_BIT_MAX_PHY_TX_SN 10 // decrease 12 to 10 to reserve 2 bits storing related linux prio idx
 #define MAX_PHY_TX_SN ((1<<NUM_BIT_MAX_PHY_TX_SN)-1)

@ -350,30 +351,30 @@ static const u16 wifi_n_dbps_ht_table[16] =        {26, 26, 26,  26, 26, 52,  78

 // ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
 struct cf_axi_dds_state {
-	struct device			*dev_spi;
-	struct clk			*clk;
+	struct device			          *dev_spi;
+	struct clk			            *clk;
 	struct cf_axi_dds_chip_info	*chip_info;
-	struct gpio_desc		*plddrbypass_gpio;
-	struct gpio_desc		*interpolation_gpio;
+  struct gpio_desc		        *plddrbypass_gpio;
+  struct gpio_desc		        *interpolation_gpio;

-	bool				standalone;
-	bool				dp_disable;
-	bool				enable;
-	bool				pl_dma_fifo_en;
-	enum fifo_ctrl			gpio_dma_fifo_ctrl;
+	bool				                standalone;
+	bool				                dp_disable;
+	bool				                enable;
+	bool				                pl_dma_fifo_en;
+	enum fifo_ctrl	            gpio_dma_fifo_ctrl;

-	struct iio_info			iio_info;
-	size_t				regs_size;
-	void __iomem			*regs;
-	void __iomem			*slave_regs;
-	void __iomem			*master_regs;
-	u64				dac_clk;
-	unsigned int			ddr_dds_interp_en;
-	unsigned int			cached_freq[16];
-	unsigned int			version;
-	unsigned int			have_slave_channels;
-	unsigned int			interpolation_factor;
-	struct notifier_block		clk_nb;
+	struct iio_info	            iio_info;
+	size_t				              regs_size;
+	void __iomem		            *regs;
+	void __iomem		            *slave_regs;
+	void __iomem		            *master_regs;
+	u64				                  dac_clk;
+	unsigned int		            ddr_dds_interp_en;
+	unsigned int		            cached_freq[16];
+	unsigned int		            version;
+	unsigned int		            have_slave_channels;
+	unsigned int		            interpolation_factor;
+	struct notifier_block		    clk_nb;
 };
 // ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====

@ -445,16 +446,16 @@ struct openwifi_stat {

 #define RX_DMA_CYCLIC_MODE
 struct openwifi_priv {
-	struct platform_device *pdev;
-	struct ieee80211_vif *vif[MAX_NUM_VIF];
+	struct platform_device       *pdev;
+	struct ieee80211_vif         *vif[MAX_NUM_VIF];

 	const struct openwifi_rf_ops *rf;
-	enum openwifi_fpga_type fpga_type;
+	enum openwifi_fpga_type      fpga_type;

-	struct cf_axi_dds_state *dds_st;  //axi_ad9361 hdl ref design module, dac channel
-	struct axiadc_state *adc_st;      //axi_ad9361 hdl ref design module, adc channel
-	struct ad9361_rf_phy *ad9361_phy; //ad9361 chip
-	struct ctrl_outs_control ctrl_out;
+	struct cf_axi_dds_state      *dds_st;  //axi_ad9361 hdl ref design module, dac channel
+	struct axiadc_state          *adc_st;      //axi_ad9361 hdl ref design module, adc channel
+	struct ad9361_rf_phy         *ad9361_phy; //ad9361 chip
+	struct ctrl_outs_control     ctrl_out;

 	int rx_freq_offset_to_lo_MHz;
 	int tx_freq_offset_to_lo_MHz;
@ -463,51 +464,51 @@ struct openwifi_priv {
 	u32 actual_tx_lo;
 	u32 last_tx_quad_cal_lo;

-	struct ieee80211_rate rates_2GHz[12];
-	struct ieee80211_rate rates_5GHz[12];
-	struct ieee80211_channel channels_2GHz[13];
-	struct ieee80211_channel channels_5GHz[11];
+	struct ieee80211_rate           rates_2GHz[12];
+	struct ieee80211_rate           rates_5GHz[12];
+	struct ieee80211_channel        channels_2GHz[13];
+	struct ieee80211_channel        channels_5GHz[11];
 	struct ieee80211_supported_band band_2GHz;
 	struct ieee80211_supported_band band_5GHz;
 	bool rfkill_off;
-	u8 runtime_tx_ant_cfg;
-	u8 runtime_rx_ant_cfg;
+	u8   runtime_tx_ant_cfg;
+	u8   runtime_rx_ant_cfg;

-	int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
+	int  rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
 	
-	enum rx_intf_mode rx_intf_cfg;
-	enum tx_intf_mode tx_intf_cfg;
+	enum rx_intf_mode     rx_intf_cfg;
+	enum tx_intf_mode     tx_intf_cfg;
 	enum openofdm_rx_mode openofdm_rx_cfg;
 	enum openofdm_tx_mode openofdm_tx_cfg;
-	enum xpu_mode xpu_cfg;
+	enum xpu_mode         xpu_cfg;

 	int irq_rx;
 	int irq_tx;

 	// u32 call_counter;
-	u8 *rx_cyclic_buf;
-	dma_addr_t rx_cyclic_buf_dma_mapping_addr;
-	struct dma_chan *rx_chan;
+	u8                             *rx_cyclic_buf;
+	dma_addr_t                     rx_cyclic_buf_dma_mapping_addr;
+	struct dma_chan                *rx_chan;
 	struct dma_async_tx_descriptor *rxd;
-	dma_cookie_t rx_cookie;
+	dma_cookie_t                   rx_cookie;

-	struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE];
-	struct scatterlist tx_sg;
-	struct dma_chan *tx_chan;
+	struct openwifi_ring           tx_ring[MAX_NUM_SW_QUEUE];
+	struct scatterlist             tx_sg;
+	struct dma_chan                *tx_chan;
 	struct dma_async_tx_descriptor *txd;
-	dma_cookie_t tx_cookie;
+	dma_cookie_t                   tx_cookie;
 	// struct completion tx_dma_complete;
 	// bool openwifi_tx_first_time_run;

 	// int phy_tx_sn;
 	u32 slice_idx;
 	u32 dest_mac_addr_queue_map[MAX_NUM_HW_QUEUE];
-	u8 mac_addr[ETH_ALEN];
+	u8  mac_addr[ETH_ALEN];
 	u16 seqno;

 	bool use_short_slot;
-	u8 band;
-	u16 channel;
+	u8   band;
+	u16  channel;

 	u32 ampdu_reference;

@ -518,9 +519,9 @@ struct openwifi_priv {
 	int last_auto_fpga_lbt_th;

 	struct bin_attribute bin_iq;
-	u32 tx_intf_arbitrary_iq[512];
-	u16 tx_intf_arbitrary_iq_num;
-	u8  tx_intf_iq_ctl;
+	u32                  tx_intf_arbitrary_iq[512];
+	u16                  tx_intf_arbitrary_iq_num;
+	u8                   tx_intf_iq_ctl;

 	struct openwifi_stat stat;
 	// u8 num_led;
--- a/driver/side_ch/make_driver.sh
+++ b/driver/side_ch/make_driver.sh
@ -20,7 +20,7 @@ else
    exit 1
 fi

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
@ -34,7 +34,7 @@ else
    echo "\$ARCH_OPTION is valid!"
 fi

-source $XILINX_DIR/SDK/2018.3/settings64.sh
+source $XILINX_DIR/Vitis/2021.1/settings64.sh
 if [ "$ARCH_OPTION" == "64" ]; then
    LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux-64/
    ARCH="arm64"
--- a/driver/side_ch/side_ch.c
+++ b/driver/side_ch/side_ch.c
@ -599,11 +599,13 @@ static int dev_probe(struct platform_device *pdev) {
 	// 	goto free_chan_to_pl;
 	// }

-	chan_to_ps = dma_request_slave_channel(&(pdev->dev), "tx_dma_s2mm");
-	if (IS_ERR(chan_to_ps)) {
+	chan_to_ps = dma_request_chan(&(pdev->dev), "tx_dma_s2mm");
+	if (IS_ERR(chan_to_ps) || chan_to_ps==NULL) {
 		err = PTR_ERR(chan_to_ps);
-		pr_err("%s dev_probe: No channel to PS. %d\n",side_ch_compatible_str,err);
-		goto free_chan_to_ps;
+		if (err != -EPROBE_DEFER) {
+			pr_err("%s dev_probe: No chan_to_ps ret %d chan_to_ps 0x%p\n",side_ch_compatible_str, err, chan_to_ps);
+			goto free_chan_to_ps;
+		}
 	}

 	printk("%s dev_probe: DMA channel setup successfully. chan_to_pl 0x%p chan_to_ps 0x%p\n",side_ch_compatible_str, chan_to_pl, chan_to_ps);
--- a/driver/tx_intf/tx_intf.c
+++ b/driver/tx_intf/tx_intf.c
@ -311,7 +311,7 @@ static inline u32 hw_init(enum tx_intf_mode mode, u32 tx_config, u32 num_dma_sym
 	if (mode!=TX_INTF_AXIS_LOOP_BACK) {
 		tx_intf_api->TX_INTF_REG_MULTI_RST_write(0);
 		tx_intf_api->TX_INTF_REG_CSI_FUZZER_write(0);
-		tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed
+		tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(16*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed
 	
 		tx_intf_api->TX_INTF_REG_TX_CONFIG_write(tx_config);
 		tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write(num_dma_symbol_to_ps);
@ -350,9 +350,9 @@ static inline u32 hw_init(enum tx_intf_mode mode, u32 tx_config, u32 num_dma_sym
 		tx_intf_api->TX_INTF_REG_MULTI_RST_write(0);
 	}

-	if (mode == TX_INTF_BYPASS) {
-		tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write(0x100); //slv_reg10[8]
-	}
+	// if (mode == TX_INTF_BYPASS) {
+	// 	tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write(0x100); //slv_reg10[8] -- bit 8 not used anymore. only bit0/1 are still reserved. 
+	// }

 	printk("%s hw_init err %d\n", tx_intf_compatible_str, err);
 	return(err);
--- a/driver/xpu/xpu.c
+++ b/driver/xpu/xpu.c
@ -150,14 +150,6 @@ static inline u32 XPU_REG_FORCE_IDLE_MISC_read(void){
 	return reg_read(XPU_REG_FORCE_IDLE_MISC_ADDR);
 }

-static inline u32 XPU_REG_TRX_STATUS_read(void){
-	return reg_read(XPU_REG_TRX_STATUS_ADDR);
-}
-
-static inline u32 XPU_REG_TX_RESULT_read(void){
-	return reg_read(XPU_REG_TX_RESULT_ADDR);
-}
-
 static inline u32 XPU_REG_TSF_RUNTIME_VAL_LOW_read(void){
 	return reg_read(XPU_REG_TSF_RUNTIME_VAL_LOW_ADDR);
 }
@ -180,34 +172,6 @@ static inline void XPU_REG_TSF_LOAD_VAL_write(u32 high_value, u32 low_value){
 	XPU_REG_TSF_LOAD_VAL_HIGH_write(high_value&(~0x80000000)); // msb low
 }

-static inline u32 XPU_REG_FC_DI_read(void){
-	return reg_read(XPU_REG_FC_DI_ADDR);
-}
-
-static inline u32 XPU_REG_ADDR1_LOW_read(void){
-	return reg_read(XPU_REG_ADDR1_LOW_ADDR);
-}
-
-static inline u32 XPU_REG_ADDR1_HIGH_read(void){
-	return reg_read(XPU_REG_ADDR1_HIGH_ADDR);
-}
-
-static inline u32 XPU_REG_ADDR2_LOW_read(void){
-	return reg_read(XPU_REG_ADDR2_LOW_ADDR);
-}
-
-static inline u32 XPU_REG_ADDR2_HIGH_read(void){
-	return reg_read(XPU_REG_ADDR2_HIGH_ADDR);
-}
-
-// static inline void XPU_REG_LBT_TH_write(u32 value, u32 en_flag) {
-// 	if (en_flag) {
-// 		reg_write(XPU_REG_LBT_TH_ADDR, value&0x7FFFFFFF);
-// 	} else {
-// 		reg_write(XPU_REG_LBT_TH_ADDR, value|0x80000000);
-// 	}
-// }
-
 static inline void XPU_REG_LBT_TH_write(u32 value) {
 	reg_write(XPU_REG_LBT_TH_ADDR, value);
 }
@ -370,31 +334,12 @@ static inline u32 hw_init(enum xpu_mode mode){
 	// From CMW measurement: lo up 1us before the packet; lo down 0.4us after the packet/RF port switches 1.2us before and 0.2us after
 	xpu_api->XPU_REG_BB_RF_DELAY_write((16<<24)|(0<<16)|(26<<8)|9); // calibrated by ila and spectrum analyzer (trigger mode)

-	// setup time schedule of 4 slices
-	// slice 0
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms
-
-	// slice 1
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms
-
-	// slice 2
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms
-	//xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms
-
-	// slice 3
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms
-	//xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
+	// setup time schedule of all queues. all time open.
+	for (i=0; i<4; i++) {
+		xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((i<<20)|16);//total 16us
+		xpu_api->XPU_REG_SLICE_COUNT_START_write((i<<20)|0); //start 0us
+		xpu_api->XPU_REG_SLICE_COUNT_END_write((i<<20)|16);  //end   16us
+	}

 	// all slice sync rest
 	xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time
@ -433,43 +378,17 @@ static inline u32 hw_init(enum xpu_mode mode){
 	// xpu_api->XPU_REG_CSMA_CFG_write(268435459);  // Linux will do config for each queue via openwifi_conf_tx
 	// xpu_api->XPU_REG_CSMA_CFG_write(0xe0000000); // Linux will do config for each queue via openwifi_conf_tx

-	xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+23)<<16)|(0+23) );
-
-	xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
+//	// ------- assume 2.4 and 5GHz have the same SIFS (6us signal extension) --------
+	xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+25)<<16)|((16+25)<<0) );
+	xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
 	xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
+//	// ------- assume 2.4 and 5GHz have different SIFS --------
+	// xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+23)<<16)|(0+23) );
+	// xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
+	// xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)

 	xpu_api->XPU_REG_DIFS_ADVANCE_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|2); //us. bit31~16 max pkt length threshold

-	// setup time schedule of 4 slices
-	// slice 0
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms
-
-	// slice 1
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms
-
-	// slice 2
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms
-	//xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms
-
-	// slice 3
-	xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms
-	//xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms
-	xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms
-	//xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
-	xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
-
-	// all slice sync rest
-	xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time
-	xpu_api->XPU_REG_MULTI_RST_write(0<<7); 
-
 	printk("%s hw_init err %d\n", xpu_compatible_str, err);
 	return(err);
 }
@ -535,21 +454,12 @@ static int dev_probe(struct platform_device *pdev)
 	xpu_api->XPU_REG_FORCE_IDLE_MISC_write=XPU_REG_FORCE_IDLE_MISC_write;
 	xpu_api->XPU_REG_FORCE_IDLE_MISC_read=XPU_REG_FORCE_IDLE_MISC_read;

-	xpu_api->XPU_REG_TRX_STATUS_read=XPU_REG_TRX_STATUS_read;
-	xpu_api->XPU_REG_TX_RESULT_read=XPU_REG_TX_RESULT_read;
-
 	xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read=XPU_REG_TSF_RUNTIME_VAL_LOW_read;
 	xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read=XPU_REG_TSF_RUNTIME_VAL_HIGH_read;
 	xpu_api->XPU_REG_TSF_LOAD_VAL_LOW_write=XPU_REG_TSF_LOAD_VAL_LOW_write;
 	xpu_api->XPU_REG_TSF_LOAD_VAL_HIGH_write=XPU_REG_TSF_LOAD_VAL_HIGH_write;
 	xpu_api->XPU_REG_TSF_LOAD_VAL_write=XPU_REG_TSF_LOAD_VAL_write;
 	
-	xpu_api->XPU_REG_FC_DI_read=XPU_REG_FC_DI_read;
-	xpu_api->XPU_REG_ADDR1_LOW_read=XPU_REG_ADDR1_LOW_read;
-	xpu_api->XPU_REG_ADDR1_HIGH_read=XPU_REG_ADDR1_HIGH_read;
-	xpu_api->XPU_REG_ADDR2_LOW_read=XPU_REG_ADDR2_LOW_read;
-	xpu_api->XPU_REG_ADDR2_HIGH_read=XPU_REG_ADDR2_HIGH_read;
-
 	xpu_api->XPU_REG_LBT_TH_write=XPU_REG_LBT_TH_write;
 	xpu_api->XPU_REG_LBT_TH_read=XPU_REG_LBT_TH_read;

--- a/kernel_boot/10-network-device.rules
+++ b/kernel_boot/10-network-device.rules
@ -0,0 +1 @@
+SUBSYSTEM=="net", ACTION=="add", ATTR{address}=="66:55:44:33:22:*", NAME="sdr0"
--- a/kernel_boot/ad9361.patch
+++ b/kernel_boot/ad9361.patch
@ -0,0 +1,68 @@
+diff --git a/drivers/iio/adc/ad9361.c b/drivers/iio/adc/ad9361.c
+index b21e2129e27c..b53d7b7ab20d 100644
+--- a/drivers/iio/adc/ad9361.c
+++ b/drivers/iio/adc/ad9361.c
+@@ -1234,7 +1234,7 @@ static int ad9361_load_mixer_gm_subtable(struct ad9361_rf_phy *phy)
+ 	return 0;
+ }
+ 
+-static int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
+int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
+ 			       bool tx1, bool tx2, bool immed)
+ {
+ 	u8 buf[2];
+@@ -1266,8 +1266,8 @@ static int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
+ 
+ 	return ret;
+ }
+-
+-static int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
+EXPORT_SYMBOL(ad9361_set_tx_atten);
+int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
+ {
+ 	u8 buf[2];
+ 	int ret = 0;
+@@ -1285,7 +1285,7 @@ static int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
+ 
+ 	return code;
+ }
+-
+EXPORT_SYMBOL(ad9361_get_tx_atten);
+ int ad9361_tx_mute(struct ad9361_rf_phy *phy, u32 state)
+ {
+ 	struct ad9361_rf_phy_state *st = phy->state;
+@@ -3744,7 +3744,7 @@ static int ad9361_get_auxadc(struct ad9361_rf_phy *phy)
+   // Setup Control Outs
+   //************************************************************
+ 
+-static int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
+int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
+ 				  struct ctrl_outs_control *ctrl)
+ {
+ 	struct spi_device *spi = phy->spi;
+@@ -3754,6 +3754,7 @@ static int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
+ 	ad9361_spi_write(spi, REG_CTRL_OUTPUT_POINTER, ctrl->index); // Ctrl Out index
+ 	return ad9361_spi_write(spi, REG_CTRL_OUTPUT_ENABLE, ctrl->en_mask); // Ctrl Out [7:0] output enable
+ }
+EXPORT_SYMBOL(ad9361_ctrl_outs_setup);
+   //************************************************************
+   // Setup GPO
+   //************************************************************
+@@ -5235,7 +5236,7 @@ static int ad9361_setup(struct ad9361_rf_phy *phy)
+ 
+ }
+ 
+-static int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
+int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
+ {
+ 	struct ad9361_rf_phy_state *st = phy->state;
+ 	int ret;
+@@ -5268,7 +5269,7 @@ static int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
+ 
+ 	return ret;
+ }
+-
+EXPORT_SYMBOL(ad9361_do_calib_run);
+ static int ad9361_update_rf_bandwidth(struct ad9361_rf_phy *phy,
+ 				     u32 rf_rx_bw, u32 rf_tx_bw)
+ {
--- a/kernel_boot/ad9361_conv.patch
+++ b/kernel_boot/ad9361_conv.patch
@ -0,0 +1,14 @@
+diff --git a/drivers/iio/adc/ad9361_conv.c b/drivers/iio/adc/ad9361_conv.c
+index 1902e7d07501..ef421dbd5e70 100644
+--- a/drivers/iio/adc/ad9361_conv.c
+++ b/drivers/iio/adc/ad9361_conv.c
+@@ -449,7 +449,8 @@ static int ad9361_dig_tune_delay(struct ad9361_rf_phy *phy,
+ 				 unsigned long max_freq,
+ 				 enum dig_tune_flags flags, bool tx)
+ {
+-	static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
+	// static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
+	static const unsigned int rates[3] = {25000000U, 40000000U, 40000000U};
+ 	struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
+ 	unsigned int s0, s1, c0, c1;
+ 	unsigned int i, j, r;
--- a/kernel_boot/axi_hdmi_crtc.patch
+++ b/kernel_boot/axi_hdmi_crtc.patch
@ -0,0 +1,13 @@
+diff --git a/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c b/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
+index f24669f623d6..70c5769019fa 100644
+--- a/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
+++ b/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
+@@ -54,7 +54,7 @@ static struct dma_async_tx_descriptor *axi_hdmi_vdma_prep_interleaved_desc(
+ 		memset(&vdma_config, 0, sizeof(vdma_config));
+ 		vdma_config.park = 1;
+ 		vdma_config.coalesc = 0xff;
+-		xilinx_vdma_channel_set_config(axi_hdmi_crtc->dma, &vdma_config);
+		// xilinx_vdma_channel_set_config(axi_hdmi_crtc->dma, &vdma_config);
+ 	}
+ #endif
+ 
--- a/kernel_boot/boards/adrv9361z7035/u-boot.elf
+++ b/kernel_boot/boards/adrv9361z7035/u-boot.elf
--- a/kernel_boot/boards/adrv9361z7035_fmc/u-boot.elf
+++ b/kernel_boot/boards/adrv9361z7035_fmc/u-boot.elf
--- a/kernel_boot/boards/adrv9364z7020/u-boot.elf
+++ b/kernel_boot/boards/adrv9364z7020/u-boot.elf
--- a/kernel_boot/boards/neptunesdr/devicetree.dtb
+++ b/kernel_boot/boards/neptunesdr/devicetree.dtb
--- a/kernel_boot/boards/neptunesdr/devicetree.dts
+++ b/kernel_boot/boards/neptunesdr/devicetree.dts
@ -0,0 +1,889 @@
+/dts-v1/;
+
+/ {
+	#address-cells = <0x01>;
+	#size-cells = <0x01>;
+	compatible = "xlnx,zynq-7000";
+	interrupt-parent = <0x01>;
+	model = "Analog Devices ADRV9364-Z7020 (Z7020/AD9364)";
+
+	cpus {
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
+
+		cpu@0 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			reg = <0x00>;
+			clocks = <0x02 0x03>;
+			clock-latency = <0x3e8>;
+			cpu0-supply = <0x03>;
+			operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
+		};
+
+		cpu@1 {
+			compatible = "arm,cortex-a9";
+			device_type = "cpu";
+			reg = <0x01>;
+			clocks = <0x02 0x03>;
+		};
+	};
+
+	fpga-full {
+		compatible = "fpga-region";
+		fpga-mgr = <0x04>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		ranges;
+	};
+
+	pmu@f8891000 {
+		compatible = "arm,cortex-a9-pmu";
+		interrupts = <0x00 0x05 0x04 0x00 0x06 0x04>;
+		interrupt-parent = <0x01>;
+		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
+	};
+
+	fixedregulator {
+		compatible = "regulator-fixed";
+		regulator-name = "VCCPINT";
+		regulator-min-microvolt = <0xf4240>;
+		regulator-max-microvolt = <0xf4240>;
+		regulator-boot-on;
+		regulator-always-on;
+		linux,phandle = <0x03>;
+		phandle = <0x03>;
+	};
+
+	amba {
+		u-boot,dm-pre-reloc;
+		compatible = "simple-bus";
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		interrupt-parent = <0x01>;
+		ranges;
+
+		adc@f8007100 {
+			compatible = "xlnx,zynq-xadc-1.00.a";
+			reg = <0xf8007100 0x20>;
+			interrupts = <0x00 0x07 0x04>;
+			interrupt-parent = <0x01>;
+			clocks = <0x02 0x0c>;
+		};
+
+		can@e0008000 {
+			compatible = "xlnx,zynq-can-1.0";
+			status = "disabled";
+			clocks = <0x02 0x13 0x02 0x24>;
+			clock-names = "can_clk\0pclk";
+			reg = <0xe0008000 0x1000>;
+			interrupts = <0x00 0x1c 0x04>;
+			interrupt-parent = <0x01>;
+			tx-fifo-depth = <0x40>;
+			rx-fifo-depth = <0x40>;
+		};
+
+		can@e0009000 {
+			compatible = "xlnx,zynq-can-1.0";
+			status = "disabled";
+			clocks = <0x02 0x14 0x02 0x25>;
+			clock-names = "can_clk\0pclk";
+			reg = <0xe0009000 0x1000>;
+			interrupts = <0x00 0x33 0x04>;
+			interrupt-parent = <0x01>;
+			tx-fifo-depth = <0x40>;
+			rx-fifo-depth = <0x40>;
+		};
+
+		gpio@e000a000 {
+			compatible = "xlnx,zynq-gpio-1.0";
+			#gpio-cells = <0x02>;
+			clocks = <0x02 0x2a>;
+			gpio-controller;
+			interrupt-controller;
+			#interrupt-cells = <0x02>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x14 0x04>;
+			reg = <0xe000a000 0x1000>;
+			linux,phandle = <0x06>;
+			phandle = <0x06>;
+		};
+
+		i2c@e0004000 {
+			compatible = "cdns,i2c-r1p10";
+			status = "disabled";
+			clocks = <0x02 0x26>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x19 0x04>;
+			reg = <0xe0004000 0x1000>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+		};
+
+		i2c@e0005000 {
+			compatible = "cdns,i2c-r1p10";
+			status = "disabled";
+			clocks = <0x02 0x27>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x30 0x04>;
+			reg = <0xe0005000 0x1000>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+		};
+
+		interrupt-controller@f8f01000 {
+			compatible = "arm,cortex-a9-gic";
+			#interrupt-cells = <0x03>;
+			interrupt-controller;
+			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
+			linux,phandle = <0x01>;
+			phandle = <0x01>;
+		};
+
+		cache-controller@f8f02000 {
+			compatible = "arm,pl310-cache";
+			reg = <0xf8f02000 0x1000>;
+			interrupts = <0x00 0x02 0x04>;
+			arm,data-latency = <0x03 0x02 0x02>;
+			arm,tag-latency = <0x02 0x02 0x02>;
+			cache-unified;
+			cache-level = <0x02>;
+		};
+
+		memory-controller@f8006000 {
+			compatible = "xlnx,zynq-ddrc-a05";
+			reg = <0xf8006000 0x1000>;
+		};
+
+		ocmc@f800c000 {
+			compatible = "xlnx,zynq-ocmc-1.0";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x03 0x04>;
+			reg = <0xf800c000 0x1000>;
+		};
+
+		serial@e0000000 {
+			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
+			status = "disabled";
+			clocks = <0x02 0x17 0x02 0x28>;
+			clock-names = "uart_clk\0pclk";
+			reg = <0xe0000000 0x1000>;
+			interrupts = <0x00 0x1b 0x04>;
+		};
+
+		serial@e0001000 {
+			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
+			status = "okay";
+			clocks = <0x02 0x18 0x02 0x29>;
+			clock-names = "uart_clk\0pclk";
+			reg = <0xe0001000 0x1000>;
+			interrupts = <0x00 0x32 0x04>;
+		};
+
+		spi@e0006000 {
+			compatible = "xlnx,zynq-spi-r1p6";
+			reg = <0xe0006000 0x1000>;
+			status = "okay";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x1a 0x04>;
+			clocks = <0x02 0x19 0x02 0x22>;
+			clock-names = "ref_clk\0pclk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+
+			ad9361-phy@0 {
+				#address-cells = <0x01>;
+				#size-cells = <0x00>;
+				#clock-cells = <0x01>;
+				compatible = "adi,ad9361";
+				reg = <0x00>;
+				spi-cpha;
+				spi-max-frequency = <0x989680>;
+				clocks = <0x05 0x00>;
+				clock-names = "ad9364_ext_refclk";
+				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
+				adi,digital-interface-tune-skip-mode = <0x00>;
+				adi,pp-tx-swap-enable;
+				adi,pp-rx-swap-enable;
+				adi,rx-frame-pulse-mode-enable;
+				adi,lvds-mode-enable;
+				adi,lvds-bias-mV = <0x96>;
+				adi,lvds-rx-onchip-termination-enable;
+				adi,rx-data-delay = <0x04>;
+				adi,tx-fb-clock-delay = <0x07>;
+				adi,xo-disable-use-ext-refclk-enable;
+				adi,2rx-2tx-mode-enable;
+				adi,frequency-division-duplex-mode-enable;
+				adi,rx-rf-port-input-select = <0x00>;
+				adi,tx-rf-port-input-select = <0x00>;
+				adi,tx-attenuation-mdB = <0x2710>;
+				adi,tx-lo-powerdown-managed-enable;
+				adi,rf-rx-bandwidth-hz = <0x112a880>;
+				adi,rf-tx-bandwidth-hz = <0x112a880>;
+				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
+				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
+				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
+				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
+				adi,gc-rx1-mode = <0x02>;
+				adi,gc-rx2-mode = <0x02>;
+				adi,gc-adc-ovr-sample-size = <0x04>;
+				adi,gc-adc-small-overload-thresh = <0x2f>;
+				adi,gc-adc-large-overload-thresh = <0x3a>;
+				adi,gc-lmt-overload-high-thresh = <0x320>;
+				adi,gc-lmt-overload-low-thresh = <0x2c0>;
+				adi,gc-dec-pow-measurement-duration = <0x2000>;
+				adi,gc-low-power-thresh = <0x18>;
+				adi,mgc-inc-gain-step = <0x02>;
+				adi,mgc-dec-gain-step = <0x02>;
+				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
+				adi,agc-attack-delay-extra-margin-us = <0x01>;
+				adi,agc-outer-thresh-high = <0x05>;
+				adi,agc-outer-thresh-high-dec-steps = <0x02>;
+				adi,agc-inner-thresh-high = <0x0a>;
+				adi,agc-inner-thresh-high-dec-steps = <0x01>;
+				adi,agc-inner-thresh-low = <0x0c>;
+				adi,agc-inner-thresh-low-inc-steps = <0x01>;
+				adi,agc-outer-thresh-low = <0x12>;
+				adi,agc-outer-thresh-low-inc-steps = <0x02>;
+				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
+				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
+				adi,agc-adc-large-overload-inc-steps = <0x02>;
+				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
+				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
+				adi,agc-lmt-overload-large-inc-steps = <0x02>;
+				adi,agc-gain-update-interval-us = <0x3e8>;
+				adi,fagc-dec-pow-measurement-duration = <0x40>;
+				adi,fagc-lp-thresh-increment-steps = <0x01>;
+				adi,fagc-lp-thresh-increment-time = <0x05>;
+				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
+				adi,fagc-final-overrange-count = <0x03>;
+				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
+				adi,fagc-lmt-final-settling-steps = <0x01>;
+				adi,fagc-lock-level = <0x0a>;
+				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
+				adi,fagc-lock-level-lmt-gain-increase-enable;
+				adi,fagc-lpf-final-settling-steps = <0x01>;
+				adi,fagc-optimized-gain-offset = <0x05>;
+				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
+				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
+				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
+				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
+				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
+				adi,fagc-rst-gla-large-adc-overload-enable;
+				adi,fagc-rst-gla-large-lmt-overload-enable;
+				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
+				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
+				adi,fagc-state-wait-time-ns = <0x104>;
+				adi,fagc-use-last-lock-level-for-set-gain-enable;
+				adi,rssi-restart-mode = <0x03>;
+				adi,rssi-delay = <0x01>;
+				adi,rssi-wait = <0x01>;
+				adi,rssi-duration = <0x3e8>;
+				adi,ctrl-outs-index = <0x00>;
+				adi,ctrl-outs-enable-mask = <0xff>;
+				adi,temp-sense-measurement-interval-ms = <0x3e8>;
+				adi,temp-sense-offset-signed = <0xce>;
+				adi,temp-sense-periodic-measurement-enable;
+				adi,aux-dac-manual-mode-enable;
+				adi,aux-dac1-default-value-mV = <0x00>;
+				adi,aux-dac1-rx-delay-us = <0x00>;
+				adi,aux-dac1-tx-delay-us = <0x00>;
+				adi,aux-dac2-default-value-mV = <0x00>;
+				adi,aux-dac2-rx-delay-us = <0x00>;
+				adi,aux-dac2-tx-delay-us = <0x00>;
+				en_agc-gpios = <0x06 0x62 0x00>;
+				sync-gpios = <0x06 0x63 0x00>;
+				reset-gpios = <0x06 0x64 0x00>;
+				enable-gpios = <0x06 0x65 0x00>;
+				txnrx-gpios = <0x06 0x66 0x00>;
+				linux,phandle = <0x0b>;
+				phandle = <0x0b>;
+			};
+		};
+
+		spi@e0007000 {
+			compatible = "xlnx,zynq-spi-r1p6";
+			reg = <0xe0007000 0x1000>;
+			status = "disabled";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x31 0x04>;
+			clocks = <0x02 0x1a 0x02 0x23>;
+			clock-names = "ref_clk\0pclk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+		};
+
+		spi@e000d000 {
+			clock-names = "ref_clk\0pclk";
+			clocks = <0x02 0x0a 0x02 0x2b>;
+			compatible = "xlnx,zynq-qspi-1.0";
+			status = "okay";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x13 0x04>;
+			reg = <0xe000d000 0x1000>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			is-dual = <0x00>;
+			num-cs = <0x01>;
+
+			ps7-qspi@0 {
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+				spi-tx-bus-width = <0x01>;
+				spi-rx-bus-width = <0x04>;
+				compatible = "n25q256a\0jedec,spi-nor";
+				reg = <0x00>;
+				spi-max-frequency = <0x2faf080>;
+
+				partition@qspi-fsbl-uboot {
+					label = "qspi-fsbl-uboot";
+					reg = <0x00 0xe0000>;
+				};
+
+				partition@qspi-uboot-env {
+					label = "qspi-uboot-env";
+					reg = <0xe0000 0x20000>;
+				};
+
+				partition@qspi-linux {
+					label = "qspi-linux";
+					reg = <0x100000 0x500000>;
+				};
+
+				partition@qspi-device-tree {
+					label = "qspi-device-tree";
+					reg = <0x600000 0x20000>;
+				};
+
+				partition@qspi-rootfs {
+					label = "qspi-rootfs";
+					reg = <0x620000 0xce0000>;
+				};
+
+				partition@qspi-bitstream {
+					label = "qspi-bitstream";
+					reg = <0x1300000 0xd00000>;
+				};
+			};
+		};
+
+		memory-controller@e000e000 {
+			#address-cells = <0x01>;
+			#size-cells = <0x01>;
+			status = "disabled";
+			clock-names = "memclk\0aclk";
+			clocks = <0x02 0x0b 0x02 0x2c>;
+			compatible = "arm,pl353-smc-r2p1";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x12 0x04>;
+			ranges;
+			reg = <0xe000e000 0x1000>;
+
+			flash@e1000000 {
+				status = "disabled";
+				compatible = "arm,pl353-nand-r2p1";
+				reg = <0xe1000000 0x1000000>;
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+			};
+
+			flash@e2000000 {
+				status = "disabled";
+				compatible = "cfi-flash";
+				reg = <0xe2000000 0x2000000>;
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+			};
+		};
+
+		ethernet@e000b000 {
+			compatible = "cdns,zynq-gem\0cdns,gem";
+			reg = <0xe000b000 0x1000>;
+			status = "okay";
+			interrupts = <0x00 0x16 0x04>;
+			clocks = <0x02 0x1e 0x02 0x1e 0x02 0x0d>;
+			clock-names = "pclk\0hclk\0tx_clk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phy-handle = <0x07>;
+			phy-mode = "rgmii-id";
+
+			phy@0 {
+				device_type = "ethernet-phy";
+				reg = <0x00>;
+				marvell,reg-init = <0x03 0x10 0xff00 0x1e 0x03 0x11 0xfff0 0x00>;
+				linux,phandle = <0x07>;
+				phandle = <0x07>;
+			};
+		};
+
+		ethernet@e000c000 {
+			compatible = "cdns,zynq-gem\0cdns,gem";
+			reg = <0xe000c000 0x1000>;
+			status = "disabled";
+			interrupts = <0x00 0x2d 0x04>;
+			clocks = <0x02 0x1f 0x02 0x1f 0x02 0x0e>;
+			clock-names = "pclk\0hclk\0tx_clk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+		};
+
+		mmc@e0100000 {
+			compatible = "arasan,sdhci-8.9a";
+			status = "okay";
+			clock-names = "clk_xin\0clk_ahb";
+			clocks = <0x02 0x15 0x02 0x20>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x18 0x04>;
+			reg = <0xe0100000 0x1000>;
+			disable-wp;
+		};
+
+		mmc@e0101000 {
+			compatible = "arasan,sdhci-8.9a";
+			status = "disabled";
+			clock-names = "clk_xin\0clk_ahb";
+			clocks = <0x02 0x16 0x02 0x21>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x2f 0x04>;
+			reg = <0xe0101000 0x1000>;
+		};
+
+		slcr@f8000000 {
+			u-boot,dm-pre-reloc;
+			#address-cells = <0x01>;
+			#size-cells = <0x01>;
+			compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd";
+			reg = <0xf8000000 0x1000>;
+			ranges;
+			linux,phandle = <0x08>;
+			phandle = <0x08>;
+
+			clkc@100 {
+				u-boot,dm-pre-reloc;
+				#clock-cells = <0x01>;
+				compatible = "xlnx,ps7-clkc";
+				fclk-enable = <0x0f>;
+				clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb";
+				reg = <0x100 0x100>;
+				ps-clk-frequency = <0x1fca055>;
+				linux,phandle = <0x02>;
+				phandle = <0x02>;
+			};
+
+			rstc@200 {
+				compatible = "xlnx,zynq-reset";
+				reg = <0x200 0x48>;
+				#reset-cells = <0x01>;
+				syscon = <0x08>;
+			};
+
+			pinctrl@700 {
+				compatible = "xlnx,pinctrl-zynq";
+				reg = <0x700 0x200>;
+				syscon = <0x08>;
+			};
+		};
+
+		dmac@f8003000 {
+			compatible = "arm,pl330\0arm,primecell";
+			reg = <0xf8003000 0x1000>;
+			interrupt-parent = <0x01>;
+			interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7";
+			interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04>;
+			#dma-cells = <0x01>;
+			#dma-channels = <0x08>;
+			#dma-requests = <0x04>;
+			clocks = <0x02 0x1b>;
+			clock-names = "apb_pclk";
+		};
+
+		devcfg@f8007000 {
+			compatible = "xlnx,zynq-devcfg-1.0";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x08 0x04>;
+			reg = <0xf8007000 0x100>;
+			clocks = <0x02 0x0c 0x02 0x0f 0x02 0x10 0x02 0x11 0x02 0x12>;
+			clock-names = "ref_clk\0fclk0\0fclk1\0fclk2\0fclk3";
+			syscon = <0x08>;
+			linux,phandle = <0x04>;
+			phandle = <0x04>;
+		};
+
+		efuse@f800d000 {
+			compatible = "xlnx,zynq-efuse";
+			reg = <0xf800d000 0x20>;
+		};
+
+		timer@f8f00200 {
+			compatible = "arm,cortex-a9-global-timer";
+			reg = <0xf8f00200 0x20>;
+			interrupts = <0x01 0x0b 0x301>;
+			interrupt-parent = <0x01>;
+			clocks = <0x02 0x04>;
+		};
+
+		timer@f8001000 {
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>;
+			compatible = "cdns,ttc";
+			clocks = <0x02 0x06>;
+			reg = <0xf8001000 0x1000>;
+		};
+
+		timer@f8002000 {
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04>;
+			compatible = "cdns,ttc";
+			clocks = <0x02 0x06>;
+			reg = <0xf8002000 0x1000>;
+		};
+
+		timer@f8f00600 {
+			interrupt-parent = <0x01>;
+			interrupts = <0x01 0x0d 0x301>;
+			compatible = "arm,cortex-a9-twd-timer";
+			reg = <0xf8f00600 0x20>;
+			clocks = <0x02 0x04>;
+		};
+
+		usb@e0002000 {
+			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
+			status = "okay";
+			clocks = <0x02 0x1c>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x15 0x04>;
+			reg = <0xe0002000 0x1000>;
+			phy_type = "ulpi";
+			dr_mode = "host";
+			xlnx,phy-reset-gpio = <0x06 0x07 0x00>;
+		};
+
+		usb@e0003000 {
+			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
+			status = "disabled";
+			clocks = <0x02 0x1d>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x2c 0x04>;
+			reg = <0xe0003000 0x1000>;
+			phy_type = "ulpi";
+		};
+
+		watchdog@f8005000 {
+			clocks = <0x02 0x2d>;
+			compatible = "cdns,wdt-r1p2";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x09 0x01>;
+			reg = <0xf8005000 0x1000>;
+			timeout-sec = <0x0a>;
+		};
+	};
+
+	aliases {
+		ethernet0 = "/amba/ethernet@e000b000";
+		serial0 = "/amba/serial@e0001000";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00 0x40000000>;
+	};
+
+	chosen {
+		linux,stdout-path = "/amba@0/uart@E0001000";
+	};
+
+	clocks {
+
+		clock@0 {
+			#clock-cells = <0x00>;
+			compatible = "adjustable-clock";
+			clock-frequency = <0x2625a00>;
+			clock-accuracy = <0x30d40>;
+			clock-output-names = "ad9364_ext_refclk";
+			linux,phandle = <0x05>;
+			phandle = <0x05>;
+		};
+
+		clock@1 {
+			#clock-cells = <0x00>;
+			compatible = "fixed-clock";
+			clock-frequency = <0x16e3600>;
+			clock-output-names = "24MHz";
+			linux,phandle = <0x09>;
+			phandle = <0x09>;
+		};
+	};
+
+	usb-ulpi-gpio-gate@0 {
+		compatible = "gpio-gate-clock";
+		clocks = <0x09>;
+		#clock-cells = <0x00>;
+		enable-gpios = <0x06 0x09 0x01>;
+	};
+
+	fpga-axi@0 {
+		compatible = "simple-bus";
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		ranges;
+
+		i2c@41600000 {
+			compatible = "xlnx,axi-iic-1.02.a\0xlnx,xps-iic-2.00.a";
+			reg = <0x41600000 0x10000>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x3a 0x04>;
+			clocks = <0x02 0x0f>;
+			clock-names = "pclk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+
+			ad7291@20 {
+				compatible = "adi,ad7291";
+				reg = <0x20>;
+			};
+
+			ad7291-bob@2C {
+				compatible = "adi,ad7291";
+				reg = <0x2c>;
+			};
+
+			eeprom@50 {
+				compatible = "at24,24c32";
+				reg = <0x50>;
+			};
+		};
+
+		sdr {
+			compatible = "sdr,sdr";
+			dmas = <0x0a 0x01 0x0c 0x00>;
+			dma-names = "rx_dma_s2mm\0tx_dma_mm2s";
+			interrupt-names = "not_valid_anymore\0rx_pkt_intr\0tx_itrpt";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x1d 0x01 0x00 0x1e 0x01 0x00 0x21 0x01 0x00 0x22 0x01>;
+		};
+
+		axidmatest@1 {
+			compatible = "xlnx,axi-dma-test-1.00.a";
+			dmas = <0x0a 0x00 0x0a 0x01>;
+			dma-names = "axidma0\0axidma1";
+		};
+
+		dma@80400000 {
+			#dma-cells = <0x01>;
+			clock-names = "s_axi_lite_aclk\0m_axi_sg_aclk\0m_axi_mm2s_aclk\0m_axi_s2mm_aclk";
+			clocks = <0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x11>;
+			compatible = "xlnx,axi-dma-1.00.a";
+			interrupt-names = "mm2s_introut\0s2mm_introut";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x23 0x04 0x00 0x24 0x04>;
+			reg = <0x80400000 0x10000>;
+			xlnx,addrwidth = <0x20>;
+			xlnx,include-sg;
+			xlnx,sg-length-width = <0x0e>;
+			phandle = <0x0c>;
+
+			dma-channel@80400000 {
+				compatible = "xlnx,axi-dma-mm2s-channel";
+				dma-channels = <0x01>;
+				interrupts = <0x00 0x23 0x04>;
+				xlnx,datawidth = <0x40>;
+				xlnx,device-id = <0x00>;
+			};
+
+			dma-channel@80400030 {
+				compatible = "xlnx,axi-dma-s2mm-channel";
+				dma-channels = <0x01>;
+				interrupts = <0x00 0x24 0x04>;
+				xlnx,datawidth = <0x40>;
+				xlnx,device-id = <0x00>;
+			};
+		};
+
+		dma@80410000 {
+			#dma-cells = <0x01>;
+			clock-names = "s_axi_lite_aclk\0m_axi_sg_aclk\0m_axi_mm2s_aclk\0m_axi_s2mm_aclk";
+			clocks = <0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x11>;
+			compatible = "xlnx,axi-dma-1.00.a";
+			interrupt-names = "mm2s_introut\0s2mm_introut";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x1f 0x04 0x00 0x20 0x04>;
+			reg = <0x80410000 0x10000>;
+			xlnx,addrwidth = <0x20>;
+			xlnx,include-sg;
+			xlnx,sg-length-width = <0x0e>;
+			phandle = <0x0a>;
+
+			dma-channel@80410000 {
+				compatible = "xlnx,axi-dma-mm2s-channel";
+				dma-channels = <0x01>;
+				interrupts = <0x00 0x1f 0x04>;
+				xlnx,datawidth = <0x40>;
+				xlnx,device-id = <0x01>;
+			};
+
+			dma-channel@80410030 {
+				compatible = "xlnx,axi-dma-s2mm-channel";
+				dma-channels = <0x01>;
+				interrupts = <0x00 0x20 0x04>;
+				xlnx,datawidth = <0x40>;
+				xlnx,device-id = <0x01>;
+			};
+		};
+
+		tx_intf@83c00000 {
+			clock-names = "s00_axi_aclk\0s00_axis_aclk";
+			clocks = <0x02 0x11 0x02 0x11>;
+			compatible = "sdr,tx_intf";
+			interrupt-names = "tx_itrpt";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x22 0x01>;
+			reg = <0x83c00000 0x10000>;
+			xlnx,s00-axi-addr-width = <0x07>;
+			xlnx,s00-axi-data-width = <0x20>;
+		};
+
+		rx_intf@83c20000 {
+			clock-names = "s00_axi_aclk\0m00_axis_aclk";
+			clocks = <0x02 0x11 0x02 0x11>;
+			compatible = "sdr,rx_intf";
+			interrupt-names = "not_valid_anymore\0rx_pkt_intr";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x1d 0x01 0x00 0x1e 0x01>;
+			reg = <0x83c20000 0x10000>;
+			xlnx,s00-axi-addr-width = <0x07>;
+			xlnx,s00-axi-data-width = <0x20>;
+		};
+
+		openofdm_tx@83c10000 {
+			clock-names = "clk";
+			clocks = <0x02 0x11>;
+			compatible = "sdr,openofdm_tx";
+			reg = <0x83c10000 0x10000>;
+		};
+
+		openofdm_rx@83c30000 {
+			clock-names = "clk";
+			clocks = <0x02 0x11>;
+			compatible = "sdr,openofdm_rx";
+			reg = <0x83c30000 0x10000>;
+		};
+
+		xpu@83c40000 {
+			clock-names = "s00_axi_aclk";
+			clocks = <0x02 0x11>;
+			compatible = "sdr,xpu";
+			reg = <0x83c40000 0x10000>;
+		};
+
+		side_ch@83c50000 {
+			clock-names = "s00_axi_aclk";
+			clocks = <0x02 0x11>;
+			compatible = "sdr,side_ch";
+			reg = <0x83c50000 0x10000>;
+			dmas = <0x0a 0x00 0x0c 0x01>;
+			dma-names = "rx_dma_mm2s\0tx_dma_s2mm";
+		};
+
+		cf-ad9361-lpc@79020000 {
+			compatible = "adi,axi-ad9361-6.00.a";
+			reg = <0x79020000 0x6000>;
+			spibus-connected = <0x0b>;
+		};
+
+		cf-ad9361-dds-core-lpc@79024000 {
+			compatible = "adi,axi-ad9361-dds-6.00.a";
+			reg = <0x79024000 0x1000>;
+			clocks = <0x0b 0x0d>;
+			clock-names = "sampl_clk";
+		};
+
+		mwipcore@43c00000 {
+			compatible = "mathworks,mwipcore-axi4lite-v1.00";
+			reg = <0x43c00000 0xffff>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "led0:green";
+			gpios = <0x06 0x3a 0x00>;
+		};
+
+		led1 {
+			label = "led1:green";
+			gpios = <0x06 0x3b 0x00>;
+		};
+
+		led2 {
+			label = "led2:green";
+			gpios = <0x06 0x3c 0x00>;
+		};
+
+		led3 {
+			label = "led3:green";
+			gpios = <0x06 0x3d 0x00>;
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
+		autorepeat;
+
+		pb0 {
+			label = "Left";
+			linux,code = <0x69>;
+			gpios = <0x06 0x36 0x00>;
+		};
+
+		pb1 {
+			label = "Right";
+			linux,code = <0x6a>;
+			gpios = <0x06 0x37 0x00>;
+		};
+
+		pb2 {
+			label = "Up";
+			linux,code = <0x67>;
+			gpios = <0x06 0x38 0x00>;
+		};
+
+		pb3 {
+			label = "Down";
+			linux,code = <0x6c>;
+			gpios = <0x06 0x39 0x00>;
+		};
+
+		sw0 {
+			label = "SW0";
+			linux,input-type = <0x05>;
+			linux,code = <0x00>;
+			gpios = <0x06 0x3e 0x00>;
+		};
+
+		sw1 {
+			label = "SW1";
+			linux,input-type = <0x05>;
+			linux,code = <0x01>;
+			gpios = <0x06 0x3f 0x00>;
+		};
+
+		sw2 {
+			label = "SW2";
+			linux,input-type = <0x05>;
+			linux,code = <0x02>;
+			gpios = <0x06 0x40 0x00>;
+		};
+
+		sw3 {
+			label = "SW3";
+			linux,input-type = <0x05>;
+			linux,code = <0x03>;
+			gpios = <0x06 0x41 0x00>;
+		};
+	};
+};
--- a/kernel_boot/boards/neptunesdr/u-boot.elf
+++ b/kernel_boot/boards/neptunesdr/u-boot.elf
--- a/kernel_boot/boards/sdrpi/devicetree.dtb
+++ b/kernel_boot/boards/sdrpi/devicetree.dtb
--- a/kernel_boot/boards/zc706_fmcs2/u-boot.elf
+++ b/kernel_boot/boards/zc706_fmcs2/u-boot.elf
--- a/kernel_boot/boards/zcu102_fmcs2/bl31.elf
+++ b/kernel_boot/boards/zcu102_fmcs2/bl31.elf
--- a/kernel_boot/boards/zcu102_fmcs2/system.dtb
+++ b/kernel_boot/boards/zcu102_fmcs2/system.dtb
--- a/kernel_boot/boards/zcu102_fmcs2/system.dts
+++ b/kernel_boot/boards/zcu102_fmcs2/system.dts
--- a/kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf
+++ b/kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf
--- a/kernel_boot/boards/zcu102_fmcs2/u-boot_xilinx_zynqmp_zcu102_revA.elf
+++ b/kernel_boot/boards/zcu102_fmcs2/u-boot_xilinx_zynqmp_zcu102_revA.elf
--- a/kernel_boot/boards/zed_fmcs2/u-boot.elf
+++ b/kernel_boot/boards/zed_fmcs2/u-boot.elf
--- a/kernel_boot/build_boot_bin.sh
+++ b/kernel_boot/build_boot_bin.sh
@ -1,60 +1,38 @@
 #!/bin/bash
-
-# Author: Xianjun Jiao
-# SPDX-FileCopyrightText: 2019 UGent
-# SPDX-License-Identifier: AGPL-3.0-or-later
-# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynq_2014r2
-
-if [ "$#" -ne 2 ]; then
-    echo "You must enter the \$OPENWIFI_HW_DIR \$BOARD_NAME as argument"
-    echo "BOARD_NAME Like: sdrpi antsdr adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371"
-    exit 1
-fi
-
-OPENWIFI_HW_DIR=$1
-BOARD_NAME=$2
-
-if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
-    echo "\$BOARD_NAME is not correct. Please check!"
-    exit 1
-else
-    echo "\$BOARD_NAME is found!"
-fi
-
 set -ex

-HDF_FILE=$OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf
-UBOOT_FILE=./boards/$BOARD_NAME/u-boot.elf
-BUILD_DIR=./boards/$BOARD_NAME/build_boot_bin
-OUTPUT_DIR=./boards/$BOARD_NAME/output_boot_bin
+HDF_FILE=$1
+UBOOT_FILE=$2
+BUILD_DIR=build_boot_bin
+OUTPUT_DIR=output_boot_bin

-# usage () {
-# 	echo usage: $0 system_top.hdf u-boot.elf [output-archive]
-# 	exit 1
-# }
+usage () {
+	echo "usage: $0 system_top.<hdf/xsa> u-boot.elf [output-archive]"
+	exit 1
+}

-# depends () {
-# 	echo Xilinx $1 must be installed and in your PATH
-# 	echo try: source /opt/Xilinx/Vivado/201x.x/settings64.sh
-# 	exit 1
-# }
+depends () {
+	echo Xilinx $1 must be installed and in your PATH
+	echo try: source /opt/Xilinx/Vivado/201x.x/settings64.sh
+	exit 1
+}

 ### Check command line parameters
-echo $HDF_FILE | grep -q ".hdf" || usage
-echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" || usage
+echo $HDF_FILE | grep -q ".hdf\|.xsa" || usage
+echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" -e "u-boot"|| usage

 if [ ! -f $HDF_FILE ]; then
-    echo $HDF_FILE: File not found!
-    usage
+	echo $HDF_FILE: File not found!
+	usage
 fi

 if [ ! -f $UBOOT_FILE ]; then
-    echo $UBOOT_FILE: File not found!
-    usage
+	echo $UBOOT_FILE: File not found!
+	usage
 fi

-### Check for required Xilinx tools
-command -v xsdk >/dev/null 2>&1 || depends xsdk
+### Check for required Xilinx tools (xcst is equivalent with 'xsdk -batch')
+command -v xsct >/dev/null 2>&1 || depends xsct
 command -v bootgen >/dev/null 2>&1 || depends bootgen

 rm -Rf $BUILD_DIR $OUTPUT_DIR
@ -65,14 +43,26 @@ cp $HDF_FILE $BUILD_DIR/
 cp $UBOOT_FILE $OUTPUT_DIR/u-boot.elf
 cp $HDF_FILE $OUTPUT_DIR/

-### Create create_fsbl_project.tcl file used by xsdk to create the fsbl
+### Create create_fsbl_project.tcl file used by xsct to create the fsbl.
 echo "hsi open_hw_design `basename $HDF_FILE`" > $BUILD_DIR/create_fsbl_project.tcl
 echo 'set cpu_name [lindex [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 0]' >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
-echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
+### The fsbl creating flow is different starting with 2019.2 Xilinx version
+if [[ "$HDF_FILE" =~ ".hdf" ]];then
+	echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
+	echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
+	echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
+	echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
+	echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
+
+	FSBL_PATH="$BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf"
+	SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw_0/system_top.bit"
+else
+	echo 'platform create -name hw0 -hw system_top.xsa -os standalone -out ./build/sdk -proc $cpu_name' >> $BUILD_DIR/create_fsbl_project.tcl
+	echo 'platform generate' >> $BUILD_DIR/create_fsbl_project.tcl
+
+	FSBL_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/fsbl.elf"
+	SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw0/hw/system_top.bit"
+fi

 ### Create zynq.bif file used by bootgen
 echo 'the_ROM_image:' > $OUTPUT_DIR/zynq.bif
@ -85,12 +75,12 @@ echo '}' >> $OUTPUT_DIR/zynq.bif
 ### Build fsbl.elf
 (
 	cd $BUILD_DIR
-	xsdk -batch -source create_fsbl_project.tcl
+	xsct create_fsbl_project.tcl
 )

 ### Copy fsbl and system_top.bit into the output folder
-cp $BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf $OUTPUT_DIR/fsbl.elf
-cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
+cp $FSBL_PATH $OUTPUT_DIR/fsbl.elf
+cp $SYSTEM_TOP_BIT_PATH $OUTPUT_DIR/system_top.bit

 ### Build BOOT.BIN
 (
@ -98,12 +88,7 @@ cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
 	bootgen -arch zynq -image zynq.bif -o BOOT.BIN -w
 )

-### clean up BUILD_DIR and copy ILA definition together with .bit into OUTPUT_DIR
-(
-	rm $BUILD_DIR -rf
-)
-
-# ### Optionally tar.gz the entire output folder with the name given in argument 3
-# if [ ${#3} -ne 0 ]; then
-# 	tar czvf $3.tar.gz $OUTPUT_DIR
-# fi
+### Optionally tar.gz the entire output folder with the name given in argument 3
+if [ ${#3} -ne 0 ]; then
+	tar czvf $3.tar.gz $OUTPUT_DIR
+fi
--- a/kernel_boot/build_zynqmp_boot_bin.sh
+++ b/kernel_boot/build_zynqmp_boot_bin.sh
@ -1,10 +1,4 @@
 #!/bin/bash
-
-# Author: Xianjun Jiao
-# SPDX-FileCopyrightText: 2019 UGent
-# SPDX-License-Identifier: AGPL-3.0-or-later
-# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynqmp
-
 set -ex

 HDF_FILE=$1
@ -14,7 +8,7 @@ BUILD_DIR=build_boot_bin
 OUTPUT_DIR=output_boot_bin

 usage () {
-	echo "usage: $0 system_top.hdf u-boot.elf  (download | bl31.elf | <path-to-arm-trusted-firmware-source>) [output-archive]"
+	echo "usage: $0 system_top.<hdf/xsa> u-boot.elf  (download | bl31.elf | <path-to-arm-trusted-firmware-source>) [output-archive]"
 	exit 1
 }

@ -25,12 +19,14 @@ depends () {
 }

 ### Check command line parameters
-echo $HDF_FILE | grep -q ".hdf" || usage
-echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" || usage
+echo $HDF_FILE | grep -q ".hdf\|.xsa" || usage
+echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" -e "u-boot" || usage

 if [ ! -f $HDF_FILE ]; then
-    echo $HDF_FILE: File not found!
-    usage
+	echo $HDF_FILE: File not found!
+	usage
+else
+	if [[ "$HDF_FILE" =~ ".hdf" ]]; then TOOL="xsdk";else TOOL="vitis";fi
 fi

 if [ ! -f $UBOOT_FILE ]; then
@ -38,10 +34,10 @@ if [ ! -f $UBOOT_FILE ]; then
    usage
 fi

-### Check for required Xilinx tools
-command -v xsdk >/dev/null 2>&1 || depends xsdk
+### Check for required Xilinx tools (starting with 2019.2 there is no hsi anymore)
+command -v xsct >/dev/null 2>&1 || depends xsct
 command -v bootgen >/dev/null 2>&1 || depends bootgen
-command -v hsi >/dev/null 2>&1 || depends hsi
+if [[ "$HDF_FILE" =~ ".hdf" ]];then (command -v hsi >/dev/null 2>&1 || depends hsi);fi

 rm -Rf $BUILD_DIR $OUTPUT_DIR
 mkdir -p $OUTPUT_DIR
@ -51,13 +47,22 @@ mkdir -p $BUILD_DIR
 # 2018.1 use df4a7e97d57494c7d79de51b1e0e450d982cea98
 # 2018.2 use 93a69a5a3bc318027da4af5911124537f4907642
 # 2018.3 use 08560c36ea5b6f48b962cb4bd9a79b35bb3d95ce
+# 2019.3 use 713dace94b259845fd8eede11061fbd8f039011e
+# 2020.1 use bf72e4d494f3be10665b94c0e88766eb2096ef71
+# 2021.2 use 799131a3b063f6f24f87baa74e46906c076aebcd

-hsi_ver=$(hsi -version | head -1 | cut -d' ' -f2)
-if [ -z "$hsi_ver" ] ; then
+tool_version=$($TOOL -version | sed -n '3p' | cut -d' ' -f 3)
+if [ -z "$tool_version" ] ; then
 	echo "Could not determine Vivado version"
 	exit 1
 fi
-atf_version=xilinx-$hsi_ver
+atf_version=xilinx-$tool_version
+
+if [[ "$atf_version" == "xilinx-v2021.1" ]];then atf_version="xlnx_rebase_v2.4_2021.1";fi
+if [[ "$atf_version" == "xilinx-v2021.1.1" ]];then atf_version="xlnx_rebase_v2.4_2021.1_update1";fi
+if [[ "$atf_version" == "xilinx-v2021.2" ]];then atf_version="xlnx-v2021.2";fi
+
+if [[ "$4" == "uart1" ]];then console="cadence1";else console="cadence0";fi

 ### Check if ATF_FILE is .elf or path to arm-trusted-firmware
 if [ "$ATF_FILE" != "" ] && [ -d $ATF_FILE ]; then
@ -66,7 +71,7 @@ if [ "$ATF_FILE" != "" ] && [ -d $ATF_FILE ]; then
 	cd $ATF_FILE
 	make distclean
 	git checkout $atf_version
-	make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1
+	make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 ZYNQMP_CONSOLE=$console
 )
 	cp $ATF_FILE/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf
 elif [ "$ATF_FILE" == "download" ]; then
@ -76,7 +81,7 @@ elif [ "$ATF_FILE" == "download" ]; then
 	git clone https://github.com/Xilinx/arm-trusted-firmware.git
 	cd arm-trusted-firmware
 	git checkout $atf_version
-	make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1
+	make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 ZYNQMP_CONSOLE=$console
 )
 	cp $BUILD_DIR/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf
 else
@ -88,45 +93,52 @@ else
 	cp $ATF_FILE $OUTPUT_DIR/bl31.elf
 fi

-cp $HDF_FILE $BUILD_DIR/
-cp $UBOOT_FILE $OUTPUT_DIR/u-boot.elf
-cp $HDF_FILE $OUTPUT_DIR/
+cp "$HDF_FILE" "$BUILD_DIR/"
+cp "$UBOOT_FILE" "$OUTPUT_DIR/u-boot.elf"
+cp "$HDF_FILE" "$OUTPUT_DIR/"

-# get the tools version (e.g., v2018.3)
-tool_version=$(hsi -version)
-tool_version=${tool_version#hsi\ }
-tool_version=${tool_version%\ (64-bit)*}
-
-# Work-arownd for MPSoC ZCU102 and ZCU106 Evaluation Kits - DDR4 SODIMM change
+# Work-around for MPSoC ZCU102 and ZCU106 Evaluation Kits - DDR4 SODIMM change
 # (https://www.xilinx.com/support/answers/71961.html)
 if [ $tool_version == "v2018.3" ];then
 (
-#	wget https://www.xilinx.com/Attachment/72113-files.zip -P $BUILD_DIR
-	cp -P 72113-files.zip $BUILD_DIR
+	wget https://www.xilinx.com/Attachment/72113-files.zip -P $BUILD_DIR
 	unzip $BUILD_DIR/72113-files.zip -d  $BUILD_DIR
 )
 fi

-### Create create_fsbl_project.tcl file used by xsdk to create the fsbl
+### Create create_fsbl_project.tcl file used by xsct to create the fsbl.
 echo "hsi open_hw_design `basename $HDF_FILE`" > $BUILD_DIR/create_fsbl_project.tcl
 echo 'set cpu_name [lindex [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 0]' >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
-echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq MP FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
-echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
-if [ $tool_version == "v2018.3" ];then
-(
-	echo "file copy -force xfsbl_ddr_init.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
-	echo "file copy -force xfsbl_hooks.c    ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
-	echo "file copy -force xfsbl_hooks.h    ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
-)
-fi
-echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
+### The fsbl creating flow is different starting with 2019.2 Xilinx version
+if [[ "$HDF_FILE" =~ ".hdf" ]];then
+        echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
+        echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
+        echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq MP FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
+        echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
+	if [ $tool_version == "v2018.3" ];then
+		echo "file copy -force xfsbl_ddr_init.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
+		echo "file copy -force xfsbl_hooks.c    ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
+		echo "file copy -force xfsbl_hooks.h    ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
+	fi
+	echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl

-### Create create_pmufw_project.tcl
-echo "set hwdsgn [open_hw_design `basename $HDF_FILE`]" > $BUILD_DIR/create_pmufw_project.tcl
-echo 'generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -sw pmufw -dir pmufw' >> $BUILD_DIR/create_pmufw_project.tcl
-echo 'quit' >> $BUILD_DIR/create_pmufw_project.tcl
+	### Create create_pmufw_project.tcl
+	echo "set hwdsgn [open_hw_design `basename $HDF_FILE`]" > $BUILD_DIR/create_pmufw_project.tcl
+	echo 'generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -compile -sw pmufw -dir pmufw' >> $BUILD_DIR/create_pmufw_project.tcl
+	echo 'quit' >> $BUILD_DIR/create_pmufw_project.tcl
+
+        FSBL_PATH="$BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf"
+        SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw_0/system_top.bit"
+	PMUFW_PATH="$BUILD_DIR/pmufw/executable.elf"
+else
+	# Flow got changed starting with 2019.2 version (when Vitis replaced SDK) and pmufw is generated automatically with fsbl
+        echo 'platform create -name hw0 -hw system_top.xsa -os standalone -out ./build/sdk -proc $cpu_name' >> $BUILD_DIR/create_fsbl_project.tcl
+        echo 'platform generate' >> $BUILD_DIR/create_fsbl_project.tcl
+
+        FSBL_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/fsbl.elf"
+        SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw0/hw/system_top.bit"
+	PMUFW_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/pmufw.elf"
+fi

 ### Create zynq.bif file used by bootgen
 echo "the_ROM_image:" > $OUTPUT_DIR/zynq.bif
@ -138,22 +150,22 @@ echo "[destination_cpu=a53-0,exception_level=el-3,trustzone] bl31.elf" >> $OUTPU
 echo "[destination_cpu=a53-0, exception_level=el-2] u-boot.elf" >> $OUTPUT_DIR/zynq.bif
 echo "}" >> $OUTPUT_DIR/zynq.bif

-
 ### Build fsbl.elf & pmufw.elf
 (
 	cd $BUILD_DIR
-	xsdk -batch -source create_fsbl_project.tcl
-	hsi -source create_pmufw_project.tcl
-	### There was a bug in some vivado version where they build would fail -> check CC_FLAGS
-	grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile
-	cd pmufw
-	make
+	xsct create_fsbl_project.tcl
+	if [[ "$HDF_FILE" =~ ".hdf" ]];then
+		hsi -source create_pmufw_project.tcl
+		### There was a bug in some vivado version where they build would fail -> check CC_FLAGS
+		grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile
+		cd pmufw
+		make
+	fi
 )
-
 ### Copy fsbl and system_top.bit into the output folder
-cp $BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf $OUTPUT_DIR/fsbl.elf
-cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
-cp $BUILD_DIR/pmufw/executable.elf $OUTPUT_DIR/pmufw.elf
+cp "$FSBL_PATH" "$OUTPUT_DIR/fsbl.elf"
+cp "$SYSTEM_TOP_BIT_PATH" "$OUTPUT_DIR/system_top.bit"
+cp "$PMUFW_PATH" "$OUTPUT_DIR/pmufw.elf"

 ### Build BOOT.BIN
 (
@ -161,7 +173,11 @@ cp $BUILD_DIR/pmufw/executable.elf $OUTPUT_DIR/pmufw.elf
 	bootgen -arch zynqmp -image zynq.bif -o BOOT.BIN -w
 )

-### Optionally tar.gz the entire output folder with the name given in argument 3
-if [ ${#4} -ne 0 ]; then
-	tar czvf $4.tar.gz $OUTPUT_DIR
+### Optionally tar.gz the entire output folder with the name given in argument 4/5
+if [[ ( $4 == "uart"* && ${#5} -ne 0 ) ]]; then
+	tar czvf $5.tar.gz $OUTPUT_DIR
+fi
+
+if [[ ( ${#4} -ne 0 && $4 != "uart"* && ${#5} -eq 0 ) ]]; then
+        tar czvf $4.tar.gz $OUTPUT_DIR
 fi
--- a/kernel_boot/kernel_config
+++ b/kernel_boot/kernel_config
--- a/kernel_boot/kernel_config_zynqmp
+++ b/kernel_boot/kernel_config_zynqmp
--- a/kernel_boot/kernel_patch_readme.md
+++ b/kernel_boot/kernel_patch_readme.md
@ -0,0 +1,6 @@
+axi_hdmi_crtc.patch to avoid axi hdmi compiling error after enable Xilinx axi dma.
+
+ad9361.patch to expose some APIs for openwifi driver.
+
+ad9361_conv.patch to avoid 61.44Msps lvds interface self timing calibration for some low-end/bad hardware (sometimes difficult).
+
--- a/user_space/boot_bin_gen.sh
+++ b/user_space/boot_bin_gen.sh
@ -5,18 +5,18 @@
 # SPDX-License-Identifier: AGPL-3.0-or-later

 if [ "$#" -ne 3 ]; then
-    echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
+    echo "You must enter exactly 3 arguments: \$XILINX_DIR \$BOARD_NAME DIR_TO_system_top.xsa"
    exit 1
 fi

-OPENWIFI_HW_DIR=$1
-XILINX_DIR=$2
-BOARD_NAME=$3
+XILINX_DIR=$1
+BOARD_NAME=$2
+XSA_FILE=$3

 OPENWIFI_DIR=$(pwd)/../

 echo OPENWIFI_DIR $OPENWIFI_DIR
-echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
+echo XSA_FILE $XSA_FILE

 if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
    echo "\$OPENWIFI_DIR is found!"
@ -25,24 +25,24 @@ else
    exit 1
 fi

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
    exit 1
 fi

-if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then
-    echo "\$BOARD_NAME is not correct. Please check!"
-    exit 1
-else
-    echo "\$BOARD_NAME is found!"
-fi
+# if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then
+#     echo "\$BOARD_NAME is not correct. Please check!"
+#     exit 1
+# else
+#     echo "\$BOARD_NAME is found!"
+# fi

-if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
-    echo "\$OPENWIFI_HW_DIR is found!"
+if [ -f "$XSA_FILE" ]; then
+    echo "\$XSA_FILE is found!"
 else
-    echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
+    echo "\$XSA_FILE is not found. Please check!"
    exit 1
 fi

@ -50,17 +50,22 @@ home_dir=$(pwd)

 set -ex

-# check if user entered the right path to SDK
-source $XILINX_DIR/SDK/2018.3/settings64.sh
-
-# uncompress the system.hdf and system_top.bit for use
-mkdir -p hdf_and_bit
-tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
+source $XILINX_DIR/Vitis/2021.1/settings64.sh

 cd $OPENWIFI_DIR/kernel_boot

-./build_boot_bin.sh $OPENWIFI_HW_DIR $BOARD_NAME
+if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
+  ./build_zynqmp_boot_bin.sh $XSA_FILE boards/$BOARD_NAME/u-boot_xilinx_zynqmp_zcu102_revA.elf boards/$BOARD_NAME/bl31.elf
+elif [ "$BOARD_NAME" == "antsdr" ] || [ "$BOARD_NAME" == "antsdr_e200" ] || [ "$BOARD_NAME" == "sdrpi" ] || [ "$BOARD_NAME" == "neptunesdr" ] || [ "$BOARD_NAME" == "zc706_fmcs2" ] || [ "$BOARD_NAME" == "zc702_fmcs2" ] || [ "$BOARD_NAME" == "zed_fmcs2" ] || [ "$BOARD_NAME" == "adrv9361z7035" ] || [ "$BOARD_NAME" == "adrv9364z7020" ]; then
+  ./build_boot_bin.sh $XSA_FILE boards/$BOARD_NAME/u-boot.elf
+else
+  echo "\$BOARD_NAME is not correct. Please check!"
+  cd $home_dir
+  exit 1
+fi
+
+rm -rf build_boot_bin
+rm -rf boards/$BOARD_NAME/output_boot_bin
+mv output_boot_bin boards/$BOARD_NAME/

 cd $home_dir
--- a/user_space/boot_bin_gen_zynqmp.sh
+++ b/user_space/boot_bin_gen_zynqmp.sh
@ -1,70 +0,0 @@
-#!/bin/bash
-
-# Author: Xianjun Jiao
-# SPDX-FileCopyrightText: 2019 UGent
-# SPDX-License-Identifier: AGPL-3.0-or-later
-
-if [ "$#" -ne 3 ]; then
-    echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
-    exit 1
-fi
-
-OPENWIFI_HW_DIR=$1
-XILINX_DIR=$2
-BOARD_NAME=$3
-
-OPENWIFI_DIR=$(pwd)/../
-
-echo OPENWIFI_DIR $OPENWIFI_DIR
-echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
-
-if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
-    echo "\$OPENWIFI_DIR is found!"
-else
-    echo "\$OPENWIFI_DIR is not correct. Please check!"
-    exit 1
-fi
-
-if [ -d "$XILINX_DIR/SDK" ]; then
-    echo "\$XILINX_DIR is found!"
-else
-    echo "\$XILINX_DIR is not correct. Please check!"
-    exit 1
-fi
-
-if [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
-    echo "\$BOARD_NAME is not correct. Please check!"
-    exit 1
-else
-    echo "\$BOARD_NAME is found!"
-fi
-
-if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
-    echo "\$OPENWIFI_HW_DIR is found!"
-else
-    echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
-    exit 1
-fi
-
-home_dir=$(pwd)
-
-set -ex
-
-# check if user entered the right path to SDK
-source $XILINX_DIR/SDK/2018.3/settings64.sh
-
-# uncompress the system.hdf and system_top.bit for use
-mkdir -p hdf_and_bit
-tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
-
-cd $OPENWIFI_DIR/kernel_boot
-
-./build_zynqmp_boot_bin.sh $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf boards/$BOARD_NAME/u-boot-zcu.elf boards/$BOARD_NAME/bl31.elf
-
-rm -rf build_boot_bin
-rm -rf boards/$BOARD_NAME/output_boot_bin
-mv output_boot_bin boards/$BOARD_NAME/
-
-cd $home_dir
--- a/user_space/dhcpd.conf
+++ b/user_space/dhcpd.conf
@ -13,7 +13,7 @@
 ddns-update-style none;

 # option definitions common to all supported networks...
-option domain-name "orca-project.eu";
+# option domain-name "orca-project.eu";
 #option domain-name-servers ns1.example.org, ns2.example.org;

 default-lease-time 600;
--- a/user_space/drv_and_fpga_package_gen.sh
+++ b/user_space/drv_and_fpga_package_gen.sh
@ -7,42 +7,44 @@

 if [ "$#" -ne 3 ]; then
    echo "You have input $# arguments."
-    echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
+    echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_IMG_DIR \$XILINX_DIR \$BOARD_NAME"
    exit 1
 fi

-OPENWIFI_HW_DIR=$1
+OPENWIFI_HW_IMG_DIR=$1
 XILINX_DIR=$2
 BOARD_NAME=$3

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
    exit 1
 fi

-if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
+if [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
    echo "\$BOARD_NAME is not correct. Please check!"
    exit 1
 else
    echo "\$BOARD_NAME is found!"
 fi

-if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
-    echo "\$OPENWIFI_HW_DIR is found!"
+if [ -d "$OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME" ]; then
+    echo "\$OPENWIFI_HW_IMG_DIR is found!"
 else
-    echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
+    echo "\$OPENWIFI_HW_IMG_DIR is not correct. Please check!"
    exit 1
 fi

 # uncompress the system.hdf and system_top.bit for use
 mkdir -p hdf_and_bit
-tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
-cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
+rm hdf_and_bit/* -rf
+unzip $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top.xsa -d ./hdf_and_bit
+# cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
+# cp ./hdf_and_bit/system_top.bit $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf

-BIT_FILENAME=$OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit
+# BIT_FILENAME=$OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit
+BIT_FILENAME=./hdf_and_bit/system_top.bit

 if [ -f "$BIT_FILENAME" ]; then
    echo "\$BIT_FILENAME is found!"
@ -61,7 +63,7 @@ fi

 # FINAL_BIT_FILENAME=$BOARD_NAME\_system_top_reload.bit.bin

-source $XILINX_DIR/SDK/2018.3/settings64.sh
+source $XILINX_DIR/Vitis/2021.1/settings64.sh

 set -x

@ -76,29 +78,29 @@ make clean
 cd ../user_space
 mkdir -p drv_and_fpga
 rm -rf drv_and_fpga/*
-cp system_top.bit.bin ../driver/tx_intf/tx_intf.ko ../driver/rx_intf/rx_intf.ko ../driver/openofdm_tx/openofdm_tx.ko ../driver/openofdm_rx/openofdm_rx.ko  ../driver/xpu/xpu.ko ../driver/sdr.ko ./drv_and_fpga -f
-cp $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/git_info.txt ./drv_and_fpga -f
+cp system_top.bit.bin ../driver/side_ch/side_ch.ko ../driver/tx_intf/tx_intf.ko ../driver/rx_intf/rx_intf.ko ../driver/openofdm_tx/openofdm_tx.ko ../driver/openofdm_rx/openofdm_rx.ko  ../driver/xpu/xpu.ko ../driver/sdr.ko ./drv_and_fpga -f
+cp $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/git_info.txt ./drv_and_fpga -f
 tar -cvf ./drv_and_fpga/driver.tar $(git ls-files ../driver/)

-dir_save=$(pwd)
+# dir_save=$(pwd)

-cd $OPENWIFI_HW_DIR/ip/
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-root.tar $(git ls-files ./ | grep -v -E "/|openofdm_rx")
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-xpu.tar $(git ls-files ./xpu)
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-tx_intf.tar $(git ls-files ./tx_intf)
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-rx_intf.tar $(git ls-files ./rx_intf)
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-openofdm_tx.tar $(git ls-files ./openofdm_tx)
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-side_ch.tar $(git ls-files ./side_ch)
+# cd $OPENWIFI_HW_DIR/ip/
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-root.tar $(git ls-files ./ | grep -v -E "/|openofdm_rx")
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-xpu.tar $(git ls-files ./xpu)
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-tx_intf.tar $(git ls-files ./tx_intf)
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-rx_intf.tar $(git ls-files ./rx_intf)
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-openofdm_tx.tar $(git ls-files ./openofdm_tx)
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-side_ch.tar $(git ls-files ./side_ch)

-cd ../boards
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-root.tar $(git ls-files ./ | grep -v "/")
-cd ./$BOARD_NAME
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-root.tar $(git ls-files ./ | grep -v "/")
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-src.tar $(git ls-files ./src)
-tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-ip_repo.tar ip_repo
+# cd ../boards
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-root.tar $(git ls-files ./ | grep -v "/")
+# cd ./$BOARD_NAME
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-root.tar $(git ls-files ./ | grep -v "/")
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-src.tar $(git ls-files ./src)
+# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-ip_repo.tar ip_repo

-cd $dir_save
-# tar -cvf drv_and_fpga.tar system_top.bit.bin tx_intf.ko rx_intf.ko openofdm_tx.ko openofdm_rx.ko xpu.ko sdr.ko git_info.txt
+# cd $dir_save
+# # tar -cvf drv_and_fpga.tar system_top.bit.bin tx_intf.ko rx_intf.ko openofdm_tx.ko openofdm_rx.ko xpu.ko sdr.ko git_info.txt

 tar -zcvf drv_and_fpga.tar.gz drv_and_fpga

--- a/user_space/fosdem-11ag.sh
+++ b/user_space/fosdem-11ag.sh
@ -15,12 +15,14 @@ killall hostapd
 killall webfsd

 cd ~/openwifi
-service network-manager stop
+# service network-manager stop
 # ./wgd.sh $test_mode
 ifconfig sdr0 192.168.13.1
-route add default gw 192.168.10.1
+rm  /var/run/dhcpd.pid
+sleep 1
 service isc-dhcp-server restart
 hostapd hostapd-openwifi-11ag.conf &
 sleep 5
 cd webserver
 webfsd -F -p 80 -f index.html &
+route add default gw 192.168.10.1
--- a/user_space/fosdem.sh
+++ b/user_space/fosdem.sh
@ -15,12 +15,15 @@ killall hostapd
 killall webfsd

 cd ~/openwifi
-service network-manager stop
+# service network-manager stop
 # ./wgd.sh $test_mode
 ifconfig sdr0 192.168.13.1
-route add default gw 192.168.10.1
+rm  /var/run/dhcpd.pid
+sleep 1
 service isc-dhcp-server restart
 hostapd hostapd-openwifi.conf &
 sleep 5
 cd webserver
 webfsd -F -p 80 -f index.html &
+route add default gw 192.168.10.1
+
--- a/user_space/inject_80211/ieee80211_radiotap.h
+++ b/user_space/inject_80211/ieee80211_radiotap.h
@ -79,7 +79,7 @@ struct ieee80211_radiotap_header {
 				 * Additional extensions are made
 				 * by setting bit 31.
 				 */
-} __packed;
+} __attribute__((packed));

 /* Name                                 Data type    Units
 * ----                                 ---------    -----
--- a/user_space/inject_80211/inject_80211.c
+++ b/user_space/inject_80211/inject_80211.c
@ -142,7 +142,7 @@ void usage(void)
 	    "-h   this menu\n\n"

 	    "Example:\n"
-	    "  iw dev wlan0 interface add mon0 type monitor && ifconfig mon0 up\n"
+	    "  iw dev sdr0 interface add mon0 type monitor && ifconfig mon0 up\n"
 	    "  inject_80211 mon0\n"
 	    "\n");
 	exit(1);
@ -270,6 +270,7 @@ int main(int argc, char *argv[])
 		ieee_hdr_data[0]  = ( ieee_hdr_data[0]|(sub_type<<4) );
 		ieee_hdr_data[9]  = addr1;
 		ieee_hdr_data[15] = addr2;
+    ieee_hdr_data[21] = addr1;
 		ieee_hdr_len = sizeof(ieee_hdr_data);
 		ieee_hdr = ieee_hdr_data;
 	}
@ -278,6 +279,7 @@ int main(int argc, char *argv[])
 		ieee_hdr_mgmt[0]  = ( ieee_hdr_mgmt[0]|(sub_type<<4) );
 		ieee_hdr_mgmt[9]  = addr1;
 		ieee_hdr_mgmt[15] = addr2;
+    ieee_hdr_mgmt[21] = addr1;
 		ieee_hdr_len = sizeof(ieee_hdr_mgmt);
 		ieee_hdr = ieee_hdr_mgmt;
 	}
--- a/user_space/openwifi_ad9361_fir_tx_0MHz_11n.ftr
+++ b/user_space/openwifi_ad9361_fir_tx_0MHz_11n.ftr
@ -1,18 +1,17 @@
-# Generated with AD9361 Filter Design Wizard 16.1.3-g924f0cd
+# Generated with AD9361 Filter Design Wizard 16.1.3
 # MATLAB 9.10.0.1602886 (R2021a), 18-Nov-2021 11:34:55
-# Inputs:
-# Data Sample Frequency = 40000000 Hz
-# Filter = 2
-# Phase Equalization = 0
-# Use AD936x FIR = 1
-# Fpass = 8.750000e+00
-# Fstop = 1.125000e+01
-# Apass = 5.000000e-01
-# Astop = 80
-# Param = 0.000000
-# PLL rate  = 1280
-# Converter = 320
-# Data rate = 40
+# Rx setting:
+# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
+# PLL Div 4x, PLL (MHz) 1280
+# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
+# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 15.6896, RF Bandwidth 22.4138
+# AD936x Decimation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
+# Tx setting:
+# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
+# PLL Div 4x, PLL (MHz) 1280
+# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
+# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 17.6508, RF Bandwidth 22.0636
+# AD936x Interpolation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
 TX 3 GAIN -6 INT 1
 RX 3 GAIN -6 DEC 1
 RTX 1280000000 320000000 160000000 80000000 40000000 40000000
--- a/user_space/openwifi_ad9361_fir_tx_0MHz_11n_narrow1.ftr
+++ b/user_space/openwifi_ad9361_fir_tx_0MHz_11n_narrow1.ftr
@ -0,0 +1,68 @@
+# Generated with AD9361 Filter Design Wizard 16.1.3
+# MATLAB 9.10.0.1602886 (R2021a), 31-Oct-2022 15:56:07
+# Rx setting:
+# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
+# PLL Div 4x, PLL (MHz) 1280
+# Units: dB. Apass 0.5, Astop 120, Astop (FIR) 0
+# Units: MHz. Fpass 8.75, Fstop 12.1, Fcutoff (Analog) 15.6896, RF Bandwidth 22.4138
+# AD936x Decimation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
+# Tx setting:
+# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
+# PLL Div 4x, PLL (MHz) 1280
+# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
+# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 17.6508, RF Bandwidth 22.0636
+# AD936x Interpolation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
+TX 3 GAIN -6 INT 1
+RX 3 GAIN -6 DEC 1
+RTX 1280000000 320000000 160000000 80000000 40000000 40000000
+RRX 1280000000 320000000 160000000 80000000 40000000 40000000
+BWTX 25215414
+BWRX 25215513
+41,-12
+31,-90
+-187,-279
+-496,-446
+-395,-280
+183,212
+412,395
+-201,-140
+-619,-571
+148,58
+886,827
+-38,87
+-1232,-1169
+-166,-334
+1680,1622
+513,740
+-2284,-2242
+-1107,-1417
+3197,3181
+2238,2687
+-4904,-4913
+-5068,-5819
+10562,10346
+28812,29882
+28812,29882
+10562,10346
+-5068,-5819
+-4904,-4913
+2238,2687
+3197,3181
+-1107,-1417
+-2284,-2242
+513,740
+1680,1622
+-166,-334
+-1232,-1169
+-38,87
+886,827
+148,58
+-619,-571
+-201,-140
+412,395
+183,212
+-395,-280
+-496,-446
+-187,-279
+31,-90
+41,-12
--- a/user_space/populate_kernel_image_module_reboot.sh
+++ b/user_space/populate_kernel_image_module_reboot.sh
@ -0,0 +1,45 @@
+#!/bin/bash
+
+# Author: Xianjun Jiao
+# SPDX-FileCopyrightText: 2019 UGent
+# SPDX-License-Identifier: AGPL-3.0-or-later
+
+set -ex
+
+MACHINE_TYPE=`uname -m`
+
+mkdir -p kernel_modules
+rm -rf kernel_modules/*
+tar -zxvf kernel_modules.tar.gz
+
+if [ ${MACHINE_TYPE} == 'aarch64' ]; then
+    IMAGE_FILENAME=Image
+else
+    IMAGE_FILENAME=uImage
+fi
+
+mv ./kernel_modules/ad9361_drv.ko ./openwifi/ -f
+mv ./kernel_modules/adi_axi_hdmi.ko ./openwifi/ -f
+mv ./kernel_modules/axidmatest.ko ./openwifi/ -f
+mv ./kernel_modules/lcd.ko ./openwifi/ -f
+mv ./kernel_modules/xilinx_dma.ko ./openwifi/ -f
+
+rm -rf /lib/modules/$(uname -r)
+ln -s /root/kernel_modules /lib/modules/$(uname -r)
+
+depmod
+
+umount /mnt || /bin/true
+mount /dev/mmcblk0p1 /mnt
+if test -f "./kernel_modules/$IMAGE_FILENAME"; then
+    cp ./kernel_modules/$IMAGE_FILENAME /mnt/
+fi
+if test -f "./kernel_modules/BOOT.BIN"; then
+    cp ./kernel_modules/BOOT.BIN /mnt/
+fi
+cd /mnt/
+sync
+cd ~
+umount /mnt
+
+reboot now
--- a/user_space/post_config.sh
+++ b/user_space/post_config.sh
@ -30,6 +30,8 @@ fi
 # add gateway (PC) for internet access
 route add default gw 192.168.10.1 || true

+sudo apt update
+
 chmod +x *.sh

 # build sdrctl
@ -53,6 +55,7 @@ sudo apt-get -y install nano
 sudo apt-get -y install tcpdump
 sudo apt-get -y install webfs
 sudo apt-get -y install iperf
+sudo apt-get -y install iperf3
 sudo apt-get -y install libpcap-dev
 sudo apt-get -y install bridge-utils

--- a/user_space/prepare_kernel.sh
+++ b/user_space/prepare_kernel.sh
@ -5,8 +5,18 @@
 # SPDX-FileCopyrightText: 2019 UGent
 # SPDX-License-Identifier: AGPL-3.0-or-later

-if [ "$#" -lt 2 ]; then
-    echo "You must enter at least 2 arguments: \$XILINX_DIR ARCH_BIT(32 or 64)"
+# ATTENTION! You need Vitis, NOT Vitis_HLS, installed
+
+# if [ "$#" -ne 1 ]; then
+#     echo "You must enter 1 arguments: ARCH_BIT(32 or 64)"
+#     exit 1
+# fi
+
+# OPENWIFI_DIR=$(pwd)/../
+# ARCH_OPTION=$1
+
+if [ "$#" -ne 2 ]; then
+    echo "You must enter 2 arguments: \$XILINX_DIR ARCH_BIT(32 or 64)"
    exit 1
 fi

@ -21,7 +31,7 @@ else
    exit 1
 fi

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
@ -55,29 +65,38 @@ set -x

 cd $OPENWIFI_DIR/
 git submodule init $LINUX_KERNEL_SRC_DIR_NAME
+cd $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME
+git reset --hard
+cd $OPENWIFI_DIR/
 git submodule update $LINUX_KERNEL_SRC_DIR_NAME
 cd $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME
-git checkout 2019_R1
-git pull origin 2019_R1
-git reset --hard
-# git reset --hard 4e81f0927cfb2fada92fc762dbd65d002848405a
-cp $LINUX_KERNEL_CONFIG_FILE ./.config
-cp $OPENWIFI_DIR/driver/ad9361/ad9361.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361.c -rf
-cp $OPENWIFI_DIR/driver/ad9361/ad9361_conv.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361_conv.c -rf
+git fetch
+git checkout 2021_r1
+git pull origin 2021_r1
+git reset --hard 2021_r1

-source $XILINX_DIR/SDK/2018.3/settings64.sh
 export ARCH=$ARCH_NAME
 export CROSS_COMPILE=$CROSS_COMPILE_NAME
+source $XILINX_DIR/Vitis/2021.1/settings64.sh

-make oldconfig && make prepare && make modules_prepare
+# if [ "$ARCH_OPTION" == "64" ]; then
+  cp $LINUX_KERNEL_CONFIG_FILE ./.config
+  # cp $OPENWIFI_DIR/driver/ad9361/ad9361.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361.c -rf
+  # cp $OPENWIFI_DIR/driver/ad9361/ad9361_conv.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361_conv.c -rf
+  git apply ../kernel_boot/axi_hdmi_crtc.patch
+  git apply ../kernel_boot/ad9361.patch
+  git apply ../kernel_boot/ad9361_conv.patch
+# else
+  # make zynq_xcomm_adv7511_defconfig
+# fi

-if [ "$#" -gt 2 ]; then
-    # if [ -f "$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/arch/$ARCH_NAME/boot/$IMAGE_TYPE" ]; then
-    #     echo "Kernel found! Skip the time costly Linux kernel compiling."
-    # else
-        make -j12 $IMAGE_TYPE UIMAGE_LOADADDR=0x8000
-        make modules
-    # fi
-fi
+make oldconfig
+# make adi_zynqmp_defconfig
+make prepare && make modules_prepare
+
+# if [ "$#" -gt 2 ]; then
+make -j12 $IMAGE_TYPE UIMAGE_LOADADDR=0x8000
+make modules
+# fi

 cd $home_dir
--- a/user_space/rssi_ad9361_show.sh
+++ b/user_space/rssi_ad9361_show.sh
@ -0,0 +1,45 @@
+#!/bin/bash
+
+# Reads RSSI in dB from RX1, let's call it "r".  
+# Linear fit offset "o" depends on frequency (2.4GHz or 5GHz and FMCOMMS2/3).
+# RSSI(dBm) = -r + o
+# 2.4GHz(ch 6) FMCOMMS2: o = 16.74
+# 2.4GHz(ch 6) FMCOMMS3: o = 17.44
+# 5GHz (ch 44) FMCOMMS2: o = 25.41
+# 5GHz (ch 44) FMCOMMS3: o = 24.58
+
+home_dir=$(pwd)
+
+#set -x
+if test -f "/sys/bus/iio/devices/iio:device0/in_voltage0_rssi"; then
+  cd /sys/bus/iio/devices/iio:device0/
+else if test -f "/sys/bus/iio/devices/iio:device1/in_voltage0_rssi"; then
+       cd /sys/bus/iio/devices/iio:device1/
+     else if test -f "/sys/bus/iio/devices/iio:device2/in_voltage0_rssi"; then
+            cd /sys/bus/iio/devices/iio:device2/
+          else if test -f "/sys/bus/iio/devices/iio:device3/in_voltage0_rssi"; then
+                 cd /sys/bus/iio/devices/iio:device3/
+               else if test -f "/sys/bus/iio/devices/iio:device4/in_voltage0_rssi"; then
+                      cd /sys/bus/iio/devices/iio:device4/
+                    else
+                      echo "Can not find in_voltage_rf_bandwidth!"
+                      echo "Check log to make sure ad9361 driver is loaded!"
+                      exit 1
+                    fi
+               fi
+          fi
+     fi
+fi
+#set +x
+
+if [ $# -lt 1 ]; then
+  cat in_voltage0_rssi
+else
+  num_read=$1
+  for ((i=0;i<$num_read;i++))
+  do
+    rssi_str=$(cat in_voltage0_rssi)
+    echo "${rssi_str//dB}"
+  done
+fi
+cd $home_dir
--- a/user_space/rssi_openwifi_show.sh
+++ b/user_space/rssi_openwifi_show.sh
@ -0,0 +1,18 @@
+#!/bin/bash
+
+rssi_raw=$(./sdrctl dev sdr0 get reg xpu 57)
+echo $rssi_raw
+
+rssi_raw=${rssi_raw: -8}
+echo $rssi_raw
+
+rssi_raw_dec=$(( 16#$rssi_raw ))
+echo $rssi_raw_dec
+
+#rssi_half_db=$(expr (16#$rss_raw) \& 2047)
+#rssi_half_db=$(($rssi_raw_dec & 2047))
+#rssi_half_db=$(($rssi_raw_dec & 16#7ff))
+#the low 11 bits are rssi_half_db
+rssi_half_db=$((16#$rssi_raw & 16#7ff))
+echo $rssi_half_db
+
--- a/user_space/sdcard_boot_update.sh
+++ b/user_space/sdcard_boot_update.sh
@ -6,12 +6,12 @@

 if [ "$#" -ne 1 ]; then
    echo "You must enter the \$BOARD_NAME as argument"
-    echo "Like: sdrpi antsdr antsdr_e200 adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371"
+    echo "Like: sdrpi antsdr antsdr_e200 adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371 neptunesdr"
    exit 1
 fi
 BOARD_NAME=$1

-if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
+if [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
    echo "\$BOARD_NAME is not correct. Please check!"
    exit 1
 else
--- a/user_space/setup_once.sh
+++ b/user_space/setup_once.sh
@ -0,0 +1,52 @@
+#!/bin/bash
+
+# Author: Xianjun Jiao
+# SPDX-FileCopyrightText: 2023 UGent
+# SPDX-License-Identifier: AGPL-3.0-or-later
+
+set -ex
+
+cd /root/
+
+MACHINE_TYPE=`uname -m`
+
+rm -rf kernel_modules
+mkdir -p kernel_modules
+
+# mkdir -p /lib/modules/$(uname -r)
+# rm -rf /lib/modules/$(uname -r)
+if [ ${MACHINE_TYPE} == 'aarch64' ]; then
+  cp /root/kernel_modules64/* /root/kernel_modules/
+  cp /root/openwifi64/* /root/openwifi/
+    # cp ./kernel_modules64/* /lib/modules/$(uname -r)/
+else
+  cp /root/kernel_modules32/* /root/kernel_modules/
+  cp /root/openwifi32/* /root/openwifi/
+    # cp ./kernel_modules32/* /lib/modules/$(uname -r)/
+fi
+
+mv /root/kernel_modules/ad9361_drv.ko /root/openwifi/ -f || true
+mv /root/kernel_modules/adi_axi_hdmi.ko /root/openwifi/ -f || true
+mv /root/kernel_modules/axidmatest.ko /root/openwifi/ -f || true
+mv /root/kernel_modules/lcd.ko /root/openwifi/ -f || true
+mv /root/kernel_modules/xilinx_dma.ko /root/openwifi/ -f || true
+
+rm -rf /lib/modules/$(uname -r)
+ln -s /root/kernel_modules /lib/modules/$(uname -r)
+sync
+depmod
+
+cd /root/openwifi/sdrctl_src
+make clean
+make
+cp sdrctl /root/openwifi/
+cd /root/openwifi/side_ch_ctl_src/
+gcc -o side_ch_ctl side_ch_ctl.c
+cp side_ch_ctl /root/openwifi/
+cd /root/openwifi/inject_80211/
+make clean
+make
+cd ..
+sync
+
+# reboot now
--- a/user_space/transfer_driver_userspace_to_board.sh
+++ b/user_space/transfer_driver_userspace_to_board.sh
@ -0,0 +1,37 @@
+  
+#!/bin/bash
+
+# Author: Xianjun Jiao
+# SPDX-FileCopyrightText: 2019 UGent
+# SPDX-License-Identifier: AGPL-3.0-or-later
+
+# Setup Eth connection before this script!
+# Host: 192.168.10.1
+# Board: 192.168.10.122
+# Commands onboard to setup:
+# ifconfig eth0 192.168.10.122 netmask 255.255.255.0
+# ifconfig eth0 up
+# route add default gw 192.168.10.1
+
+# if [ "$#" -ne 2 ]; then
+#     echo "You have input $# arguments."
+#     echo "You must enter \$DIR_TO_ADI_LINUX_KERNEL and ARCH_BIT(32 or 64) as argument"
+#     exit 1
+# fi
+
+# DIR_TO_ADI_LINUX_KERNEL=$1
+# ARCH_OPTION=$2
+
+# if [ "$ARCH_OPTION" == "64" ]; then
+#     LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm64/boot/Image
+# else
+#     LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm/boot/uImage
+# fi
+
+mkdir -p openwifi
+rm -rf ./openwifi/*
+find ../driver/ -name \*.ko -exec cp {} ./openwifi/ \;
+
+tar -zcvf openwifi.tar.gz openwifi
+
+scp openwifi.tar.gz root@192.168.10.122:
--- a/user_space/transfer_kernel_image_module_to_board.sh
+++ b/user_space/transfer_kernel_image_module_to_board.sh
@ -0,0 +1,60 @@
+  
+#!/bin/bash
+
+# Author: Xianjun Jiao
+# SPDX-FileCopyrightText: 2019 UGent
+# SPDX-License-Identifier: AGPL-3.0-or-later
+
+# Setup Eth connection before this script!
+# Host: 192.168.10.1
+# Board: 192.168.10.122
+# Commands onboard to setup:
+# ifconfig eth0 192.168.10.122 netmask 255.255.255.0
+# ifconfig eth0 up
+# route add default gw 192.168.10.1
+
+if [ "$#" -ne 2 ]; then
+    echo "You have input $# arguments."
+    echo "You must enter \$DIR_TO_ADI_LINUX_KERNEL and \$BOARD_NAME as argument"
+    exit 1
+fi
+
+DIR_TO_ADI_LINUX_KERNEL=$1
+BOARD_NAME=$2
+
+if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ]; then
+    echo "\$BOARD_NAME is not correct. Please check!"
+    exit 1
+else
+    echo "\$BOARD_NAME is found!"
+fi
+
+if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
+    LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm64/boot/Image
+else
+    LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm/boot/uImage
+fi
+
+mkdir -p kernel_modules
+rm -rf ./kernel_modules/*
+find $DIR_TO_ADI_LINUX_KERNEL/ -name \*.ko -exec cp {} ./kernel_modules/ \;
+
+cp $DIR_TO_ADI_LINUX_KERNEL/Module.symvers ./kernel_modules/
+cp $DIR_TO_ADI_LINUX_KERNEL/modules.builtin ./kernel_modules/
+cp $DIR_TO_ADI_LINUX_KERNEL/modules.builtin.modinfo ./kernel_modules/
+cp $DIR_TO_ADI_LINUX_KERNEL/modules.order ./kernel_modules/
+
+if test -f "$LINUX_KERNEL_IMAGE"; then
+    cp $LINUX_KERNEL_IMAGE ./kernel_modules/
+fi
+
+if test -f "../kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN"; then
+    cp ../kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN ./kernel_modules/
+fi
+tar -zcvf kernel_modules.tar.gz kernel_modules
+
+scp kernel_modules.tar.gz root@192.168.10.122:
+
+# scp $LINUX_KERNEL_IMAGE root@192.168.10.122:
+
+scp populate_kernel_image_module_reboot.sh root@192.168.10.122:
--- a/user_space/update_sdcard.sh
+++ b/user_space/update_sdcard.sh
@ -5,21 +5,35 @@
 # SPDX-FileCopyrightText: 2019 UGent
 # SPDX-License-Identifier: AGPL-3.0-or-later

-if [ "$#" -ne 4 ]; then
+# Only put BOOT partition (BOOT.BIN devicetree kernel) and kernel modules drivers on the SD card, but not populate them
+
+if [ "$#" -lt 3 ]; then
    echo "You have input $# arguments."
-    echo "You must enter exactly 4 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME \$SDCARD_DIR"
+    echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_IMG_DIR \$XILINX_DIR \$SDCARD_DIR"
    exit 1
 fi

-OPENWIFI_HW_DIR=$1
+SKIP_KERNEL_BUILD=0
+SKIP_BOOT=0
+SKIP_rootfs=0
+if [ "$#" -eq 4 ]; then
+    SKIP_KERNEL_BUILD=$(( ($4 >> 0) & 1 ))
+    SKIP_BOOT=$(( ($4 >> 1) & 1 ))
+    SKIP_rootfs=$(( ($4 >> 2) & 1 ))
+    echo $4
+    echo SKIP_KERNEL_BUILD $SKIP_KERNEL_BUILD
+    echo SKIP_BOOT $SKIP_BOOT
+    echo SKIP_rootfs $SKIP_rootfs
+fi
+
+OPENWIFI_HW_IMG_DIR=$1
 XILINX_DIR=$2
-BOARD_NAME=$3
-SDCARD_DIR=$4
+SDCARD_DIR=$3

 OPENWIFI_DIR=$(pwd)/../

 echo OPENWIFI_DIR $OPENWIFI_DIR
-echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
+echo OPENWIFI_HW_IMG_DIR $OPENWIFI_HW_IMG_DIR

 if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
    echo "\$OPENWIFI_DIR is found!"
@ -28,32 +42,27 @@ else
    exit 1
 fi

-if [ -d "$XILINX_DIR/SDK" ]; then
+if [ -d "$XILINX_DIR/Vitis" ]; then
    echo "\$XILINX_DIR is found!"
 else
    echo "\$XILINX_DIR is not correct. Please check!"
    exit 1
 fi

-if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
-    echo "\$BOARD_NAME is not correct. Please check!"
-    exit 1
+if [ -d "$OPENWIFI_HW_IMG_DIR/boards/" ]; then
+    echo "\$OPENWIFI_HW_IMG_DIR is found!"
 else
-    echo "\$BOARD_NAME is found!"
-fi
-
-if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
-    echo "\$OPENWIFI_HW_DIR is found!"
-else
-    echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
+    echo "\$OPENWIFI_HW_IMG_DIR is not correct. Please check!"
    exit 1
 fi

 # detect SD card mounting status
 if [ -d "$SDCARD_DIR/BOOT/" ]; then
    echo "$SDCARD_DIR/BOOT/"
-    sudo mkdir $SDCARD_DIR/BOOT/openwifi
-    sudo rm -rf $SDCARD_DIR/BOOT/README.txt
+    sudo rm -f $SDCARD_DIR/BOOT/README.txt
+    # to save some space
+    sudo rm -rf $SDCARD_DIR/BOOT/socfpga_*
+    sudo rm -rf $SDCARD_DIR/BOOT/versal-*
 else
    echo "$SDCARD_DIR/BOOT/ does not exist!"
    exit 1
@ -66,16 +75,6 @@ else
    exit 1
 fi

-if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
-    dtb_filename="system.dtb"
-    dts_filename="system.dts"
-else
-    dtb_filename="devicetree.dtb"
-    dts_filename="devicetree.dts"
-fi
-echo $dtb_filename
-echo $dts_filename
-
 sudo true

 home_dir=$(pwd)
@ -85,109 +84,98 @@ set -x
 LINUX_KERNEL_SRC_DIR_NAME32=adi-linux
 LINUX_KERNEL_SRC_DIR_NAME64=adi-linux-64

-cd $OPENWIFI_DIR/user_space/
-./prepare_kernel.sh $XILINX_DIR 32 build
-sudo true
-./prepare_kernel.sh $XILINX_DIR 64 build
-sudo true
-
-BOARD_NAME_ALL="sdrpi antsdr antsdr_e200 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9364z7020 zcu102_fmcs2 zcu102_9371"
-# BOARD_NAME_ALL="zcu102_fmcs2"
-# BOARD_NAME_ALL="adrv9361z7035"
-for BOARD_NAME_TMP in $BOARD_NAME_ALL
-do
-    if [ "$BOARD_NAME_TMP" == "zcu102_fmcs2" ] || [ "$BOARD_NAME_TMP" == "zcu102_9371" ]; then
-        dtb_filename_tmp="system.dtb"
-        dts_filename_tmp="system.dts"
-        ./boot_bin_gen_zynqmp.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME_TMP
-    else
-        dtb_filename_tmp="devicetree.dtb"
-        dts_filename_tmp="devicetree.dts"
-        ./boot_bin_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME_TMP
-    fi
-    echo $dtb_filename_tmp
-    echo $dts_filename_tmp
-
-    dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dts_filename_tmp
-    mkdir $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
-    sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
-    sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
-    sudo true
-done
-
-sudo mkdir $SDCARD_DIR/BOOT/openwifi/zynq-common
-sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage  $SDCARD_DIR/BOOT/openwifi/zynq-common/
-sudo mkdir $SDCARD_DIR/BOOT/openwifi/zynqmp-common
-sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/openwifi/zynqmp-common/
-
-sudo mkdir $SDCARD_DIR/rootfs/root/openwifi
-
-# Copy uImage BOOT.BIN and devicetree to SD card BOOT partition and backup at rootfs/root/openwifi
-sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/$dtb_filename $SDCARD_DIR/BOOT/
-sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/$dtb_filename $SDCARD_DIR/rootfs/root/openwifi/ -rf
-sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/
-sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN $SDCARD_DIR/rootfs/root/openwifi/ -rf
-if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
-    sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/
-    sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/rootfs/root/openwifi/ -rf
-else
-    sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/BOOT/
-    sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/rootfs/root/openwifi/ -rf
+if [ "$SKIP_KERNEL_BUILD" == "0" ]; then
+  cd $OPENWIFI_DIR/user_space/
+  ./prepare_kernel.sh $XILINX_DIR 32
+  sudo true
+  ./prepare_kernel.sh $XILINX_DIR 64
+  sudo true
 fi

-sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf
-sudo mv $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin.bak
-sudo wget -P $SDCARD_DIR/rootfs/root/openwifi/webserver/ https://users.ugent.be/~xjiao/openwifi-low-aac.mp4
+if [ "$SKIP_BOOT" == "0" ]; then
+  sudo rm -rf $SDCARD_DIR/BOOT/openwifi/
+  sudo mkdir -p $SDCARD_DIR/BOOT/openwifi
+  BOARD_NAME_ALL="sdrpi antsdr antsdr_e200 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9364z7020 zcu102_fmcs2 neptunesdr"
+  for BOARD_NAME_TMP in $BOARD_NAME_ALL
+  do
+      if [ "$BOARD_NAME_TMP" == "zcu102_fmcs2" ] || [ "$BOARD_NAME_TMP" == "zcu102_9371" ]; then
+          dtb_filename_tmp="system.dtb"
+          dts_filename_tmp="system.dts"
+      else
+          dtb_filename_tmp="devicetree.dtb"
+          dts_filename_tmp="devicetree.dts"
+          kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage
+      fi
+      ./boot_bin_gen.sh $XILINX_DIR $BOARD_NAME_TMP $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME_TMP/sdk/system_top.xsa
+      echo $dtb_filename_tmp
+      echo $dts_filename_tmp

-# build openwifi driver
-saved_dir=$(pwd)
-cd $OPENWIFI_DIR/driver
-./make_all.sh $XILINX_DIR 32
-cd $OPENWIFI_DIR/driver/side_ch
-./make_driver.sh $XILINX_DIR 32
-cd $saved_dir
+      dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dts_filename_tmp
+      sudo mkdir -p $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
+      sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP/
+      sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP/
+      sudo true
+  done

-# Copy files to SD card rootfs partition
-sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv32
-sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv32 \;
+  kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image
+  sudo cp $kernel_img_filename_tmp $SDCARD_DIR/BOOT/
+  kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage
+  sudo cp $kernel_img_filename_tmp $SDCARD_DIR/BOOT/
+fi

-# build openwifi driver
-saved_dir=$(pwd)
-cd $OPENWIFI_DIR/driver
-./make_all.sh $XILINX_DIR 64
-cd $OPENWIFI_DIR/driver/side_ch
-./make_driver.sh $XILINX_DIR 64
-cd $saved_dir
+if [ "$SKIP_rootfs" == "0" ]; then
+  sudo rm -rf $SDCARD_DIR/rootfs/root/openwifi/
+  sudo mkdir -p $SDCARD_DIR/rootfs/root/openwifi

-# Copy files to SD card rootfs partition
-sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv64
-sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv64 \;
+  saved_dir=$(pwd)
+  cd $OPENWIFI_DIR/user_space/
+  git clean -dxf ./
+  cd $saved_dir
+  sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf
+  sudo mv $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin.bak
+  sudo wget -P $SDCARD_DIR/rootfs/root/openwifi/webserver/ https://users.ugent.be/~xjiao/openwifi-low-aac.mp4

-sudo mkdir $SDCARD_DIR/rootfs/lib/modules
+  ARCH_OPTION_ALL="32 64"
+  for ARCH_OPTION_TMP in $ARCH_OPTION_ALL
+  do
+    # build openwifi driver
+    saved_dir=$(pwd)
+    cd $OPENWIFI_DIR/driver/
+    git clean -dxf ./
+    sync
+    ./make_all.sh $XILINX_DIR $ARCH_OPTION_TMP
+    cd $saved_dir

-sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32
-sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/ \;
-sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/xilinx_dma.ko $SDCARD_DIR/rootfs/root/openwifi/drv32
-sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/ad9361_drv.ko $SDCARD_DIR/rootfs/root/openwifi/drv32
-sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/{axidmatest.ko,adi_axi_hdmi.ko} -f
+    # Copy files to SD card rootfs partition
+    sudo rm -rf $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP/
+    sudo mkdir -p $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP
+    sudo find $OPENWIFI_DIR/driver/ -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP \;

-sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64
-sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/ \;
-sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/xilinx_dma.ko $SDCARD_DIR/rootfs/root/openwifi/drv64
-sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/ad9361_drv.ko $SDCARD_DIR/rootfs/root/openwifi/drv64
-sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/{axidmatest.ko,adi_axi_hdmi.ko} -f
+    sudo rm -rf $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+    sudo mkdir -p $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP

-sudo rm $SDCARD_DIR/rootfs/etc/udev/rules.d/70-persistent-net.rules
-sudo cp $OPENWIFI_DIR/kernel_boot/70-persistent-net.rules $SDCARD_DIR/rootfs/etc/udev/rules.d/
-sudo mv $SDCARD_DIR/rootfs/lib/udev/rules.d/75-persistent-net-generator.rules $SDCARD_DIR/rootfs/lib/udev/rules.d/75-persistent-net-generator.rules.bak
+    if [ "$ARCH_OPTION_TMP" == "32" ]; then
+      sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/ \;
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/Module.symvers $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.builtin $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.builtin.modinfo $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.order $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+    else
+      sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/ \;
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/Module.symvers $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.builtin $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.builtin.modinfo $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+      sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.order $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
+    fi

-# Some setup
-sudo echo -e "\nauto lo eth0\niface lo inet loopback\niface eth0 inet static\naddress 192.168.10.122\nnetmask 255.255.255.0\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/network/interfaces
-sudo echo -e "\nnameserver 8.8.8.8\nnameserver 4.4.4.4\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/resolv.conf
-sudo echo -e "\nUseDNS no\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/ssh/sshd_config
-sudo echo -e "\nnet.ipv4.ip_forward=1\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/sysctl.conf
-sudo chmod -x $SDCARD_DIR/rootfs/etc/update-motd.d/90-updates-available
-sudo chmod -x $SDCARD_DIR/rootfs/etc/update-motd.d/91-release-upgrade
+    sudo rm -rf $SDCARD_DIR/rootfs/lib/modules/*dirty*
+    sudo rm -rf $SDCARD_DIR/rootfs/root/kernel_modules
+
+    # sudo rm $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/axidmatest.ko -f
+    # sudo rm $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/adi_axi_hdmi.ko -f
+  done
+
+fi

 cd $SDCARD_DIR/BOOT
 sync
--- a/user_space/wgd.sh
+++ b/user_space/wgd.sh
@ -64,6 +64,13 @@ insert_check_module () {

 print_usage

+insmod ad9361_drv.ko
+insmod xilinx_dma.ko
+# modprobe ad9361_drv
+# modprobe xilinx_dma
+modprobe mac80211
+lsmod
+
 TARGET_DIR=./
 DOWNLOAD_FLAG=0
 test_mode=0
@ -125,10 +132,14 @@ fi

 echo " "

-service network-manager stop
+killall hostapd
+service dhcpcd stop #dhcp client. it will get secondary ip for sdr0 which causes trouble
+killall dhcpd 
+killall wpa_supplicant
+#service network-manager stop
+ifconfig sdr0 down

 rmmod sdr
-insert_check_module ./ ad9361_drv

 if [ $DOWNLOAD_FLAG -eq 1 ]; then
  download_module fpga $TARGET_DIR
@ -142,11 +153,6 @@ else
 fi

 ./rf_init_11n.sh
-insert_check_module ./ xilinx_dma
-
-depmod
-modprobe mac80211
-lsmod

 MODULE_ALL="tx_intf rx_intf openofdm_tx openofdm_rx xpu sdr"
 for MODULE in $MODULE_ALL
@ -161,8 +167,8 @@ do
  fi
 done

-[ -e /tmp/check_calib_inf.pid ] && kill -0 $(</tmp/check_calib_inf.pid)
-./check_calib_inf.sh
+# [ -e /tmp/check_calib_inf.pid ] && kill -0 $(</tmp/check_calib_inf.pid)
+# ./check_calib_inf.sh

 echo the end
 # dmesg
				`@ -0,0 +1 @@`
				`SUBSYSTEM=="net", ACTION=="add", ATTR{address}=="66:55:44:33:22:*", NAME="sdr0"`