mirror of
https://github.com/open-sdr/openwifi.git
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add support of adrv9361z7035 SOM
This commit is contained in:
Xianjun Jiao
parent
0cf4af1492
commit
89e3e0fbda
59
README.md
59
README.md
@ -36,33 +36,32 @@ Openwifi was born in [ORCA project](https://www.orca-project.eu/) (EU's Horizon2
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board_name|actual boards used|status
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-------|-------|----
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zc706_fmcs2|Xilinx ZC706 dev board + FMCOMMS2/3/4|done
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adrv9361z7035|ADRV9361Z7035 SOM + ADRV1CRR-BOB carrier board|ongoing
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adrv9361z7035_fmc|ADRV9361Z7035 SOM + ADRV1CRR-FMC carrier board|ongoing
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adrv9361z7035|ADRV9361Z7035 SOM + ADRV1CRR-BOB carrier board|done. wait for test
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adrv9361z7035_fmc|ADRV9361Z7035 SOM + ADRV1CRR-FMC carrier board|done
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adrv9364z7020|ADRV9364Z7020 SOM + ADRV1CRR-BOB carrier board|future
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zcu102_fmcs2|Xilinx ZCU102 dev board + FMCOMMS2/3/4|future
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zcu102_9371|Xilinx ZCU102 dev board + ADRV9371|future
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* board_name is used to identify FPGA design in openwifi-hw/boards/
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* board_name is used to identify FPGA design in openwifi-hw/boards/ and rf script in user_space/rf_init_board_name.sh
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* Don't have any boards? Or you like JTAG boot instead of SD card? Check our test bed [w-iLab.t](https://doc.ilabt.imec.be/ilabt/wilab/tutorials/openwifi.html) tutorial.
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* zc706_fmcs2 is taken as example for following operations.
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**Quick start:** (Example instructions are verified on Ubuntu 16/18)
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* Download pre-built [openwifi Linux img file](https://users.ugent.be/~xjiao/openwifi-1.0.0-ghent.zip). Burn the img file to a 16G SD card:
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* Download pre-built [openwifi Linux img file](https://users.ugent.be/~xjiao/openwifi-1.0.0-ghent.zip) (depends on board_name as well). Burn the img file to a 16G SD card:
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```
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sudo dd bs=4M if=openwifi-1.0.0-ghent.img of=/dev/mmcblk0
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(mmcblk0 is the dev name of sdcard in Linux. Make sure you use the correct one in your situation!)
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(Above command takes a while)
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```
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* Connect RX/TX antenna to RX1A/TX2A ports of fmcomms2/3(For fmcomms4/ad9364, you may connect antennas to TXA/RXA), and make two antennas orthogonal to each other for good isolation. Config the board to SD card boot mode by switches (Read the board spec on internet). Insert the SD card to the board.
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* Connect RX/TX antenna to RX1A/TX2A ports(For fmcomms4/ad9364, you may connect antennas to TXA/RXA), and make two antennas orthogonal to each other for good isolation. Config the board to SD card boot mode by switches (Read the board spec on internet). Insert the SD card to the board.
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* Connect the board to PC. (PC IP address should be 192.168.10.1). Power on the board. Then from PC:
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```
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ssh root@192.168.10.122
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(password: openwifi)
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cd openwifi
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cp rf_init_board_name.sh rf_init.sh
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(If there isn't rf_init.sh, rename your board rf script, such as rf_init_adrv9361z7035.sh, to rf_init.sh for wgd.sh to call)
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service network-manager stop
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./wgd.sh
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(For fmcomms4, you need an extra command: ./set_ant.sh rx1 tx1)
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@ -93,7 +92,7 @@ iwlist sdr0 scan
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dhclient sdr0
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(Wait for its done, then you should have connection)
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* Real-time control/config via sdrctl (time slice config, etc), please go to openwifi/doc.
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* Real-time control/config via "sdrctl" (register, time slice config, etc), please go to openwifi/doc.
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* ***Note***: The files (BOOT.BIN, drivers, etc) in pre-built SD card img might not have the latest bug-fixes/features. Check related section in this README on how to generate them and update them if needed.
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@ -108,7 +107,6 @@ iwlist sdr0 scan
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* Install Vivado/SDK 2017.4.1 (If you don't need to re-compile FPGA, WebPack version without license is enough)
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* Get pre-built FPGA files from openwifi-hw repository.
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```
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git submodule init openwifi-hw
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git submodule update openwifi-hw
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@ -117,7 +115,6 @@ git checkout master
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git pull
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```
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* Build Linux kernel and modules:
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```
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export XILINX_DIR=your_Xilinx_directory
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cd openwifi
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@ -135,32 +132,37 @@ make -j12 UIMAGE_LOADADDR=0x8000 uImage
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make modules
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```
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* Build openwifi Linux driver modules:
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```
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export OPENWIFI_DIR=your_openwifi_directory
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cd $OPENWIFI_DIR/driver
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./make_all.sh $XILINX_DIR/SDK/2017.4/ $OPENWIFI_DIR/adi-linux/
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```
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* Build openwifi Linux devicetree:
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```
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cd $OPENWIFI_DIR/kernel_boot
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export BOARD_NAME=your_board_name
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(Check the board_name in the table of supported SDR platforms)
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cd $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME
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dtc -I dts -O dtb -o devicetree.dtb devicetree.dts
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cp devicetree.dtb $OPENWIFI_DIR/kernel_boot/
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```
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* Build openwifi BOOT.BIN based on FPGA files generated in openwifi-hw:
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```
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cd $OPENWIFI_DIR/kernel_boot
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source $XILINX_DIR/SDK/2017.4/settings64.sh
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./build_boot_bin.sh ../openwifi-hw/boards/zc706_fmcs2/sdk/system_top_hw_platform_0/system.hdf u-boot-zc70x.elf
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(u-boot-zc70x.elf is included in the original Analog Devices Linux img)
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./build_boot_bin.sh ../openwifi-hw/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf ./boards/$BOARD_NAME/u-boot.elf
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(u-boot.elf is renamed from the compressed file in the board directory of original Analog Devices SD card boot partition)
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```
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* Prepare correct rf_init.sh in host openwifi/user_space
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```
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cd $OPENWIFI_DIR/user_space
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cp rf_init_board_name.sh rf_init.sh
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(If there isn't rf_init.sh, rename your board rf script, such as rf_init_adrv9361z7035.sh, to rf_init.sh for "wgd.sh remote" to download)
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```
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* Download [2017_R1-2018_01_29.img.xz](http://swdownloads.analog.com/cse/2017_R1-2018_01_29.img.xz) from [Analog Devices Wiki](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images). Burn it into a SD card via your PC.
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* Mount SD card BOOT/rootfs partitions to SDCARD_DIR directory of your PC (If it is mounted automatically, find the directory). Then copy built files to SD card via your PC. (You can also update files over ftp/ssh after your full system runs. Please check next section. Read carefully user_space/sdcard_boot_update.sh and set your ftp root directory to $OPENWIFI_DIR in your PC):
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```
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export SDCARD_DIR=sdcard_mount_point
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cp $OPENWIFI_DIR/kernel_boot/devicetree.dtb $SDCARD_DIR/BOOT
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cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/devicetree.dtb $SDCARD_DIR/BOOT
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cp $OPENWIFI_DIR/kernel_boot/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT
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cp $OPENWIFI_DIR/adi-linux/arch/arm/boot/uImage $SDCARD_DIR/BOOT
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cd $SDCARD_DIR/BOOT
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@ -168,12 +170,12 @@ sync
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sudo mkdir $SDCARD_DIR/rootfs/root/openwifi
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sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/ \;
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sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/
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sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf
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sudo mkdir $SDCARD_DIR/rootfs/lib/modules
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sudo mkdir $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d24c6c
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sudo find $OPENWIFI_DIR/adi-linux -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d24c6c/ \;
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sudo rm $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d24c6c/{axidmatest.ko,xilinx_dma.ko,adi_axi_hdmi.ko,ad9361_drv.ko} -f
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sudo mkdir $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d
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sudo find $OPENWIFI_DIR/adi-linux -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d/ \;
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sudo rm $SDCARD_DIR/rootfs/lib/modules/4.14.0-g4220d5d/{axidmatest.ko,xilinx_dma.ko,adi_axi_hdmi.ko,ad9361_drv.ko} -f
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sudo rm $SDCARD_DIR/rootfs/etc/udev/rules.d/70-persistent-net.rules
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sudo cp $OPENWIFI_DIR/kernel_boot/70-persistent-net.rules $SDCARD_DIR/rootfs/etc/udev/rules.d/
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@ -184,17 +186,18 @@ sync
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**Run Linux and do some post-config:**
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* Insert the SD card to the board, power on and run serial console (such as minicom) from a PC via USB-UART cable to the board. After booting completes, in the PC serial console:
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```
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depmod
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(Ignore the error messages)
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modprobe mac80211
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(if you get error like: could not open moddep file 'lib/modules/4.14.0XXXYYYZZZ/modules.dep.bin', you could make a symbol link and modprobe again)
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ln -s /lib/modules/4.14.0-g4220d5d24c6c /lib/modules/4.14.0XXXYYYZZZ
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ln -s /lib/modules/4.14.0-g4220d5d /lib/modules/4.14.0XXXYYYZZZ
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depmod
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modprobe mac80211
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cd openwifi
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cp rf_init_board_name.sh rf_init.sh
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(rename your board rf script, such as rf_init_adrv9361z7035.sh, to rf_init.sh for wgd.sh to call)
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./wgd.sh
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(For fmcomms4, you need an extra command: ./set_ant.sh rx1 tx1)
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(Wait for the completion)
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@ -204,7 +207,6 @@ iwlist sdr0 scan
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(You should see the Wi-Fi scan results)
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```
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* Config ssh server and ethernet IP address of the board. In the PC serial console:
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```
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passwd
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(ssh server needs a password, such as "openwifi")
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@ -248,7 +250,6 @@ ssh roo@192.168.10.122
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(For fmcomms4, you need an extra command: ./set_ant.sh rx1 tx1)
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**Compile sdrctl on the board** ("On the board" means that you login to the board via ssh)
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```
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sudo apt-get install libnl-3-dev
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sudo apt-get install libnl-genl-3-dev
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@ -275,7 +276,6 @@ make
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```
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* Setup AP for Wi-Fi client. Topology: client -- (sdr0)|board|(eth0) -- (***ethX***)|PC|(***ethY***) -- internet
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* On board: Install dhcp server preparing for serving your openwifi clients via hostapd.
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```
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sudo apt-get install isc-dhcp-server
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sudo apt-get install Haveged
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@ -283,7 +283,6 @@ make
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```
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* Put user_space/dhcpd.conf into (overwrite) /etc/dhcp/dhcpd.conf on board.
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* On board:
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```
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cd openwifi
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service network-manager stop
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@ -296,7 +295,6 @@ make
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hostapd hostapd-openwifi.conf
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```
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* On PC:
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```
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sudo ip route add 192.168.13.0/24 via 192.168.10.122 dev ethX
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```
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@ -311,7 +309,6 @@ As a solution to this problem, openwifi can be fully controlled only if communic
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For hostapd program, 802.11b rates can be suppressed using configuration commands (i.e. supported_rates, basic_rates) and an example configuration file is provided (i.e. hostapd-openwifi.conf). One small caveat to this one comes from fullMAC Wi-Fi cards as they must implement the *NL80211_TXRATE_LEGACY* NetLink handler at the device driver level.
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On the other hand, the wpa_supplicant program on the client side (commercial Wi-Fi dongle/board) cannot suppress 802.11b rates out of the box in 2.4GHz band, so there will be an issue when connecting openwifi (OFDM only). A patched wpa_supplicant should be used at the client side.
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```
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cd openwifi/user_space
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wget http://w1.fi/releases/wpa_supplicant-2.1.tar.gz
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942
kernel_boot/boards/adrv9361z7035/devicetree.dts
Normal file
942
kernel_boot/boards/adrv9361z7035/devicetree.dts
Normal file
@ -0,0 +1,942 @@
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/dts-v1/;
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/ {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "xlnx,zynq-7000";
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interrupt-parent = <0x1>;
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model = "Analog Devices ADRV9361-Z7035 (Z7035/AD9361)";
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cpus {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0x0>;
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clocks = <0x2 0x3>;
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clock-latency = <0x3e8>;
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cpu0-supply = <0x3>;
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operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0x1>;
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clocks = <0x2 0x3>;
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};
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};
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fpga-full {
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compatible = "fpga-region";
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fpga-mgr = <0x4>;
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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ranges;
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};
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pmu@f8891000 {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
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interrupt-parent = <0x1>;
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reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
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};
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fixedregulator {
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compatible = "regulator-fixed";
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regulator-name = "VCCPINT";
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regulator-min-microvolt = <0xf4240>;
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regulator-max-microvolt = <0xf4240>;
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regulator-boot-on;
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regulator-always-on;
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linux,phandle = <0x3>;
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phandle = <0x3>;
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};
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amba {
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u-boot,dm-pre-reloc;
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compatible = "simple-bus";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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interrupt-parent = <0x1>;
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ranges;
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adc@f8007100 {
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compatible = "xlnx,zynq-xadc-1.00.a";
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reg = <0xf8007100 0x20>;
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interrupts = <0x0 0x7 0x4>;
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interrupt-parent = <0x1>;
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clocks = <0x2 0xc>;
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};
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can@e0008000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <0x2 0x13 0x2 0x24>;
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clock-names = "can_clk", "pclk";
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reg = <0xe0008000 0x1000>;
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interrupts = <0x0 0x1c 0x4>;
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interrupt-parent = <0x1>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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};
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can@e0009000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <0x2 0x14 0x2 0x25>;
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clock-names = "can_clk", "pclk";
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reg = <0xe0009000 0x1000>;
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interrupts = <0x0 0x33 0x4>;
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interrupt-parent = <0x1>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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};
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gpio@e000a000 {
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compatible = "xlnx,zynq-gpio-1.0";
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#gpio-cells = <0x2>;
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clocks = <0x2 0x2a>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <0x2>;
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interrupt-parent = <0x1>;
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interrupts = <0x0 0x14 0x4>;
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reg = <0xe000a000 0x1000>;
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linux,phandle = <0x6>;
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phandle = <0x6>;
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};
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i2c@e0004000 {
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compatible = "cdns,i2c-r1p10";
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status = "disabled";
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clocks = <0x2 0x26>;
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interrupt-parent = <0x1>;
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interrupts = <0x0 0x19 0x4>;
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reg = <0xe0004000 0x1000>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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};
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i2c@e0005000 {
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compatible = "cdns,i2c-r1p10";
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status = "disabled";
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clocks = <0x2 0x27>;
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interrupt-parent = <0x1>;
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interrupts = <0x0 0x30 0x4>;
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reg = <0xe0005000 0x1000>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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};
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interrupt-controller@f8f01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <0x3>;
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interrupt-controller;
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reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
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linux,phandle = <0x1>;
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phandle = <0x1>;
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};
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cache-controller@f8f02000 {
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compatible = "arm,pl310-cache";
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reg = <0xf8f02000 0x1000>;
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interrupts = <0x0 0x2 0x4>;
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arm,data-latency = <0x3 0x2 0x2>;
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arm,tag-latency = <0x2 0x2 0x2>;
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cache-unified;
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cache-level = <0x2>;
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};
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = <0xf8006000 0x1000>;
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};
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ocmc@f800c000 {
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compatible = "xlnx,zynq-ocmc-1.0";
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interrupt-parent = <0x1>;
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interrupts = <0x0 0x3 0x4>;
|
||||
reg = <0xf800c000 0x1000>;
|
||||
};
|
||||
|
||||
serial@e0000000 {
|
||||
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
|
||||
status = "disabled";
|
||||
clocks = <0x2 0x17 0x2 0x28>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
reg = <0xe0000000 0x1000>;
|
||||
interrupts = <0x0 0x1b 0x4>;
|
||||
};
|
||||
|
||||
serial@e0001000 {
|
||||
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
|
||||
status = "okay";
|
||||
clocks = <0x2 0x18 0x2 0x29>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
reg = <0xe0001000 0x1000>;
|
||||
interrupts = <0x0 0x32 0x4>;
|
||||
};
|
||||
|
||||
spi@e0006000 {
|
||||
compatible = "xlnx,zynq-spi-r1p6";
|
||||
reg = <0xe0006000 0x1000>;
|
||||
status = "okay";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x1a 0x4>;
|
||||
clocks = <0x2 0x19 0x2 0x22>;
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
ad9361-phy@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
#clock-cells = <0x1>;
|
||||
compatible = "adi,ad9361";
|
||||
reg = <0x0>;
|
||||
spi-cpha;
|
||||
spi-max-frequency = <0x989680>;
|
||||
clocks = <0x5 0x0>;
|
||||
clock-names = "ad9361_ext_refclk";
|
||||
clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
|
||||
adi,digital-interface-tune-skip-mode = <0x0>;
|
||||
adi,pp-tx-swap-enable;
|
||||
adi,pp-rx-swap-enable;
|
||||
adi,rx-frame-pulse-mode-enable;
|
||||
adi,lvds-mode-enable;
|
||||
adi,lvds-bias-mV = <0x96>;
|
||||
adi,lvds-rx-onchip-termination-enable;
|
||||
adi,rx-data-delay = <0x4>;
|
||||
adi,tx-fb-clock-delay = <0x7>;
|
||||
adi,xo-disable-use-ext-refclk-enable;
|
||||
adi,2rx-2tx-mode-enable;
|
||||
adi,frequency-division-duplex-mode-enable;
|
||||
adi,rx-rf-port-input-select = <0x0>;
|
||||
adi,tx-rf-port-input-select = <0x0>;
|
||||
adi,tx-attenuation-mdB = <0x2710>;
|
||||
adi,rf-rx-bandwidth-hz = <0x112a880>;
|
||||
adi,rf-tx-bandwidth-hz = <0x112a880>;
|
||||
adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>;
|
||||
adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>;
|
||||
adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
|
||||
adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
|
||||
adi,gc-rx1-mode = <0x2>;
|
||||
adi,gc-rx2-mode = <0x2>;
|
||||
adi,gc-adc-ovr-sample-size = <0x4>;
|
||||
adi,gc-adc-small-overload-thresh = <0x2f>;
|
||||
adi,gc-adc-large-overload-thresh = <0x3a>;
|
||||
adi,gc-lmt-overload-high-thresh = <0x320>;
|
||||
adi,gc-lmt-overload-low-thresh = <0x2c0>;
|
||||
adi,gc-dec-pow-measurement-duration = <0x2000>;
|
||||
adi,gc-low-power-thresh = <0x18>;
|
||||
adi,mgc-inc-gain-step = <0x2>;
|
||||
adi,mgc-dec-gain-step = <0x2>;
|
||||
adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>;
|
||||
adi,agc-attack-delay-extra-margin-us = <0x1>;
|
||||
adi,agc-outer-thresh-high = <0x5>;
|
||||
adi,agc-outer-thresh-high-dec-steps = <0x2>;
|
||||
adi,agc-inner-thresh-high = <0xa>;
|
||||
adi,agc-inner-thresh-high-dec-steps = <0x1>;
|
||||
adi,agc-inner-thresh-low = <0xc>;
|
||||
adi,agc-inner-thresh-low-inc-steps = <0x1>;
|
||||
adi,agc-outer-thresh-low = <0x12>;
|
||||
adi,agc-outer-thresh-low-inc-steps = <0x2>;
|
||||
adi,agc-adc-small-overload-exceed-counter = <0xa>;
|
||||
adi,agc-adc-large-overload-exceed-counter = <0xa>;
|
||||
adi,agc-adc-large-overload-inc-steps = <0x2>;
|
||||
adi,agc-lmt-overload-large-exceed-counter = <0xa>;
|
||||
adi,agc-lmt-overload-small-exceed-counter = <0xa>;
|
||||
adi,agc-lmt-overload-large-inc-steps = <0x2>;
|
||||
adi,agc-gain-update-interval-us = <0x3e8>;
|
||||
adi,fagc-dec-pow-measurement-duration = <0x40>;
|
||||
adi,fagc-lp-thresh-increment-steps = <0x1>;
|
||||
adi,fagc-lp-thresh-increment-time = <0x5>;
|
||||
adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>;
|
||||
adi,fagc-final-overrange-count = <0x3>;
|
||||
adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>;
|
||||
adi,fagc-lmt-final-settling-steps = <0x1>;
|
||||
adi,fagc-lock-level = <0xa>;
|
||||
adi,fagc-lock-level-gain-increase-upper-limit = <0x5>;
|
||||
adi,fagc-lock-level-lmt-gain-increase-enable;
|
||||
adi,fagc-lpf-final-settling-steps = <0x1>;
|
||||
adi,fagc-optimized-gain-offset = <0x5>;
|
||||
adi,fagc-power-measurement-duration-in-state5 = <0x40>;
|
||||
adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
|
||||
adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>;
|
||||
adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
|
||||
adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>;
|
||||
adi,fagc-rst-gla-large-adc-overload-enable;
|
||||
adi,fagc-rst-gla-large-lmt-overload-enable;
|
||||
adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>;
|
||||
adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
|
||||
adi,fagc-state-wait-time-ns = <0x104>;
|
||||
adi,fagc-use-last-lock-level-for-set-gain-enable;
|
||||
adi,rssi-restart-mode = <0x3>;
|
||||
adi,rssi-delay = <0x1>;
|
||||
adi,rssi-wait = <0x1>;
|
||||
adi,rssi-duration = <0x3e8>;
|
||||
adi,ctrl-outs-index = <0x0>;
|
||||
adi,ctrl-outs-enable-mask = <0xff>;
|
||||
adi,temp-sense-measurement-interval-ms = <0x3e8>;
|
||||
adi,temp-sense-offset-signed = <0xce>;
|
||||
adi,temp-sense-periodic-measurement-enable;
|
||||
adi,aux-dac-manual-mode-enable;
|
||||
adi,aux-dac1-default-value-mV = <0x0>;
|
||||
adi,aux-dac1-rx-delay-us = <0x0>;
|
||||
adi,aux-dac1-tx-delay-us = <0x0>;
|
||||
adi,aux-dac2-default-value-mV = <0x0>;
|
||||
adi,aux-dac2-rx-delay-us = <0x0>;
|
||||
adi,aux-dac2-tx-delay-us = <0x0>;
|
||||
en_agc-gpios = <0x6 0x62 0x0>;
|
||||
sync-gpios = <0x6 0x63 0x0>;
|
||||
reset-gpios = <0x6 0x64 0x0>;
|
||||
enable-gpios = <0x6 0x65 0x0>;
|
||||
txnrx-gpios = <0x6 0x66 0x0>;
|
||||
linux,phandle = <0xc>;
|
||||
phandle = <0xc>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@e0007000 {
|
||||
compatible = "xlnx,zynq-spi-r1p6";
|
||||
reg = <0xe0007000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x31 0x4>;
|
||||
clocks = <0x2 0x1a 0x2 0x23>;
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
};
|
||||
|
||||
spi@e000d000 {
|
||||
clock-names = "ref_clk", "pclk";
|
||||
clocks = <0x2 0xa 0x2 0x2b>;
|
||||
compatible = "xlnx,zynq-qspi-1.0";
|
||||
status = "okay";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x13 0x4>;
|
||||
reg = <0xe000d000 0x1000>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
is-dual = <0x0>;
|
||||
num-cs = <0x1>;
|
||||
|
||||
ps7-qspi@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
spi-tx-bus-width = <0x1>;
|
||||
spi-rx-bus-width = <0x4>;
|
||||
compatible = "n25q256a", "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <0x2faf080>;
|
||||
|
||||
partition@qspi-fsbl-uboot {
|
||||
label = "qspi-fsbl-uboot";
|
||||
reg = <0x0 0xe0000>;
|
||||
};
|
||||
|
||||
partition@qspi-uboot-env {
|
||||
label = "qspi-uboot-env";
|
||||
reg = <0xe0000 0x20000>;
|
||||
};
|
||||
|
||||
partition@qspi-linux {
|
||||
label = "qspi-linux";
|
||||
reg = <0x100000 0x500000>;
|
||||
};
|
||||
|
||||
partition@qspi-device-tree {
|
||||
label = "qspi-device-tree";
|
||||
reg = <0x600000 0x20000>;
|
||||
};
|
||||
|
||||
partition@qspi-rootfs {
|
||||
label = "qspi-rootfs";
|
||||
reg = <0x620000 0xce0000>;
|
||||
};
|
||||
|
||||
partition@qspi-bitstream {
|
||||
label = "qspi-bitstream";
|
||||
reg = <0x1300000 0xd00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
memory-controller@e000e000 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
status = "disabled";
|
||||
clock-names = "memclk", "aclk";
|
||||
clocks = <0x2 0xb 0x2 0x2c>;
|
||||
compatible = "arm,pl353-smc-r2p1";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x12 0x4>;
|
||||
ranges;
|
||||
reg = <0xe000e000 0x1000>;
|
||||
|
||||
flash@e1000000 {
|
||||
status = "disabled";
|
||||
compatible = "arm,pl353-nand-r2p1";
|
||||
reg = <0xe1000000 0x1000000>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
};
|
||||
|
||||
flash@e2000000 {
|
||||
status = "disabled";
|
||||
compatible = "cfi-flash";
|
||||
reg = <0xe2000000 0x2000000>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@e000b000 {
|
||||
compatible = "cdns,zynq-gem", "cdns,gem";
|
||||
reg = <0xe000b000 0x1000>;
|
||||
status = "okay";
|
||||
interrupts = <0x0 0x16 0x4>;
|
||||
clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>;
|
||||
clock-names = "pclk", "hclk", "tx_clk";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
phy-handle = <0x7>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
phy@0 {
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x0>;
|
||||
marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0x0>;
|
||||
linux,phandle = <0x7>;
|
||||
phandle = <0x7>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@e000c000 {
|
||||
compatible = "cdns,zynq-gem", "cdns,gem";
|
||||
reg = <0xe000c000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0x0 0x2d 0x4>;
|
||||
clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
|
||||
clock-names = "pclk", "hclk", "tx_clk";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
};
|
||||
|
||||
sdhci@e0100000 {
|
||||
compatible = "arasan,sdhci-8.9a";
|
||||
status = "okay";
|
||||
clock-names = "clk_xin", "clk_ahb";
|
||||
clocks = <0x2 0x15 0x2 0x20>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x18 0x4>;
|
||||
reg = <0xe0100000 0x1000>;
|
||||
broken-adma2;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
sdhci@e0101000 {
|
||||
compatible = "arasan,sdhci-8.9a";
|
||||
status = "disabled";
|
||||
clock-names = "clk_xin", "clk_ahb";
|
||||
clocks = <0x2 0x16 0x2 0x21>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x2f 0x4>;
|
||||
reg = <0xe0101000 0x1000>;
|
||||
broken-adma2;
|
||||
};
|
||||
|
||||
slcr@f8000000 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
|
||||
reg = <0xf8000000 0x1000>;
|
||||
ranges;
|
||||
linux,phandle = <0x8>;
|
||||
phandle = <0x8>;
|
||||
|
||||
clkc@100 {
|
||||
#clock-cells = <0x1>;
|
||||
compatible = "xlnx,ps7-clkc";
|
||||
fclk-enable = <0xf>;
|
||||
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
|
||||
reg = <0x100 0x100>;
|
||||
ps-clk-frequency = <0x1fca055>;
|
||||
linux,phandle = <0x2>;
|
||||
phandle = <0x2>;
|
||||
};
|
||||
|
||||
rstc@200 {
|
||||
compatible = "xlnx,zynq-reset";
|
||||
reg = <0x200 0x48>;
|
||||
#reset-cells = <0x1>;
|
||||
syscon = <0x8>;
|
||||
};
|
||||
|
||||
pinctrl@700 {
|
||||
compatible = "xlnx,pinctrl-zynq";
|
||||
reg = <0x700 0x200>;
|
||||
syscon = <0x8>;
|
||||
};
|
||||
};
|
||||
|
||||
dmac@f8003000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0xf8003000 0x1000>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
|
||||
interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
|
||||
#dma-cells = <0x1>;
|
||||
#dma-channels = <0x8>;
|
||||
#dma-requests = <0x4>;
|
||||
clocks = <0x2 0x1b>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
devcfg@f8007000 {
|
||||
compatible = "xlnx,zynq-devcfg-1.0";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x8 0x4>;
|
||||
reg = <0xf8007000 0x100>;
|
||||
clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>;
|
||||
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
|
||||
syscon = <0x8>;
|
||||
linux,phandle = <0x4>;
|
||||
phandle = <0x4>;
|
||||
};
|
||||
|
||||
efuse@f800d000 {
|
||||
compatible = "xlnx,zynq-efuse";
|
||||
reg = <0xf800d000 0x20>;
|
||||
};
|
||||
|
||||
timer@f8f00200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0xf8f00200 0x20>;
|
||||
interrupts = <0x1 0xb 0x301>;
|
||||
interrupt-parent = <0x1>;
|
||||
clocks = <0x2 0x4>;
|
||||
};
|
||||
|
||||
timer@f8001000 {
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
|
||||
compatible = "cdns,ttc";
|
||||
clocks = <0x2 0x6>;
|
||||
reg = <0xf8001000 0x1000>;
|
||||
};
|
||||
|
||||
timer@f8002000 {
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
|
||||
compatible = "cdns,ttc";
|
||||
clocks = <0x2 0x6>;
|
||||
reg = <0xf8002000 0x1000>;
|
||||
};
|
||||
|
||||
timer@f8f00600 {
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x1 0xd 0x301>;
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xf8f00600 0x20>;
|
||||
clocks = <0x2 0x4>;
|
||||
};
|
||||
|
||||
usb@e0002000 {
|
||||
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
|
||||
status = "okay";
|
||||
clocks = <0x2 0x1c>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x15 0x4>;
|
||||
reg = <0xe0002000 0x1000>;
|
||||
phy_type = "ulpi";
|
||||
dr_mode = "host";
|
||||
xlnx,phy-reset-gpio = <0x6 0x7 0x0>;
|
||||
};
|
||||
|
||||
usb@e0003000 {
|
||||
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
|
||||
status = "disabled";
|
||||
clocks = <0x2 0x1d>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x2c 0x4>;
|
||||
reg = <0xe0003000 0x1000>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
watchdog@f8005000 {
|
||||
clocks = <0x2 0x2d>;
|
||||
compatible = "cdns,wdt-r1p2";
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x9 0x1>;
|
||||
reg = <0xf8005000 0x1000>;
|
||||
timeout-sec = <0xa>;
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = "/amba/ethernet@e000b000";
|
||||
serial0 = "/amba/serial@e0001000";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x40000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = "/amba@0/uart@E0001000";
|
||||
};
|
||||
|
||||
clocks {
|
||||
|
||||
clock@0 {
|
||||
#clock-cells = <0x0>;
|
||||
compatible = "adjustable-clock";
|
||||
clock-frequency = <0x2625a00>;
|
||||
clock-accuracy = <0x30d40>;
|
||||
clock-output-names = "XO_40MHz";
|
||||
linux,phandle = <0x9>;
|
||||
phandle = <0x9>;
|
||||
};
|
||||
|
||||
clock@2 {
|
||||
#clock-cells = <0x0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0x16e3600>;
|
||||
clock-output-names = "24MHz";
|
||||
linux,phandle = <0xa>;
|
||||
phandle = <0xa>;
|
||||
};
|
||||
};
|
||||
|
||||
ad9361-refclk-gpio-gate@0 {
|
||||
#clock-cells = <0x0>;
|
||||
compatible = "gpio-gate-clock";
|
||||
clocks = <0x9>;
|
||||
enable-gpios = <0x6 0x69 0x0>;
|
||||
clk-set-rate-parent-enable;
|
||||
clock-output-names = "ad9361_ext_refclk";
|
||||
linux,phandle = <0x5>;
|
||||
phandle = <0x5>;
|
||||
};
|
||||
|
||||
usb-ulpe-gpio-gate@0 {
|
||||
#clock-cells = <0x0>;
|
||||
compatible = "gpio-gate-clock";
|
||||
clocks = <0xa>;
|
||||
enable-gpios = <0x6 0x9 0x1>;
|
||||
};
|
||||
|
||||
fpga-axi@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
ranges;
|
||||
|
||||
i2c@41600000 {
|
||||
compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
|
||||
reg = <0x41600000 0x10000>;
|
||||
interrupt-parent = <0x1>;
|
||||
interrupts = <0x0 0x3a 0x4>;
|
||||
clocks = <0x2 0xf>;
|
||||
clock-names = "pclk";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
adm1166@68 {
|
||||
compatible = "adi,adm1166";
|
||||
reg = <0x68>;
|
||||
};
|
||||
|
||||
ad7291-bob@2f {
|
||||
compatible = "adi,ad7291";
|
||||
reg = <0x2f>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "at24,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@7c400000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c400000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0 57 4>;
|
||||
clocks = <0x2 0xf 0xf>;
|
||||
linux,phandle = <0xb>;
|
||||
phandle = <0xb>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x2>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x0>;
|
||||
adi,length-width = <0x18>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dma@7c420000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c420000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0 56 4>;
|
||||
clocks = <0x2 0xf 0xf>;
|
||||
linux,phandle = <0xd>;
|
||||
phandle = <0xd>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x0>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x2>;
|
||||
adi,length-width = <0x18>;
|
||||
adi,cyclic;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sdr: sdr {
|
||||
compatible ="sdr,sdr";
|
||||
dmas = <&rx_dma 0
|
||||
&rx_dma 1
|
||||
&tx_dma 0
|
||||
&tx_dma 1>;
|
||||
dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm";
|
||||
interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1";
|
||||
interrupt-parent = <1>;
|
||||
interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>;
|
||||
} ;
|
||||
|
||||
axidmatest_1: axidmatest@1 {
|
||||
compatible ="xlnx,axi-dma-test-1.00.a";
|
||||
dmas = <&rx_dma 0
|
||||
&rx_dma 1>;
|
||||
dma-names = "axidma0", "axidma1";
|
||||
} ;
|
||||
|
||||
tx_dma: dma@80400000 {
|
||||
#dma-cells = <1>;
|
||||
clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
|
||||
clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
|
||||
compatible = "xlnx,axi-dma-1.00.a";
|
||||
interrupt-names = "mm2s_introut", "s2mm_introut";
|
||||
interrupt-parent = <1>;
|
||||
interrupts = <0 35 4 0 36 4>;
|
||||
reg = <0x80400000 0x10000>;
|
||||
xlnx,addrwidth = <0x20>;
|
||||
xlnx,include-sg ;
|
||||
xlnx,sg-length-width = <0xe>;
|
||||
dma-channel@80400000 {
|
||||
compatible = "xlnx,axi-dma-mm2s-channel";
|
||||
dma-channels = <0x1>;
|
||||
interrupts = <0 35 4>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x0>;
|
||||
};
|
||||
dma-channel@80400030 {
|
||||
compatible = "xlnx,axi-dma-s2mm-channel";
|
||||
dma-channels = <0x1>;
|
||||
interrupts = <0 36 4>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
rx_dma: dma@80410000 {
|
||||
#dma-cells = <1>;
|
||||
clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
|
||||
clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
|
||||
compatible = "xlnx,axi-dma-1.00.a";
|
||||
//dma-coherent ;
|
||||
interrupt-names = "mm2s_introut", "s2mm_introut";
|
||||
interrupt-parent = <1>;
|
||||
interrupts = <0 31 4 0 32 4>;
|
||||
reg = <0x80410000 0x10000>;
|
||||
xlnx,addrwidth = <0x20>;
|
||||
xlnx,include-sg ;
|
||||
xlnx,sg-length-width = <0xe>;
|
||||
dma-channel@80410000 {
|
||||
compatible = "xlnx,axi-dma-mm2s-channel";
|
||||
dma-channels = <0x1>;
|
||||
interrupts = <0 31 4>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x1>;
|
||||
};
|
||||
dma-channel@80410030 {
|
||||
compatible = "xlnx,axi-dma-s2mm-channel";
|
||||
dma-channels = <0x1>;
|
||||
interrupts = <0 32 4>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
tx_intf_0: tx_intf@83c00000 {
|
||||
clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk";
|
||||
clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
|
||||
compatible = "sdr,tx_intf";
|
||||
interrupt-names = "tx_itrpt0", "tx_itrpt1";
|
||||
interrupt-parent = <1>;
|
||||
interrupts = <0 33 1 0 34 1>;
|
||||
reg = <0x83c00000 0x10000>;
|
||||
xlnx,s00-axi-addr-width = <0x7>;
|
||||
xlnx,s00-axi-data-width = <0x20>;
|
||||
};
|
||||
|
||||
rx_intf_0: rx_intf@83c20000 {
|
||||
clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk";
|
||||
clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
|
||||
compatible = "sdr,rx_intf";
|
||||
interrupt-names = "not_valid_anymore", "rx_pkt_intr";
|
||||
interrupt-parent = <1>;
|
||||
interrupts = <0 29 1 0 30 1>;
|
||||
reg = <0x83c20000 0x10000>;
|
||||
xlnx,s00-axi-addr-width = <0x7>;
|
||||
xlnx,s00-axi-data-width = <0x20>;
|
||||
};
|
||||
|
||||
openofdm_tx_0: openofdm_tx@83c10000 {
|
||||
clock-names = "clk";
|
||||
clocks = <0x2 0x10>;
|
||||
compatible = "sdr,openofdm_tx";
|
||||
reg = <0x83c10000 0x10000>;
|
||||
};
|
||||
|
||||
openofdm_rx_0: openofdm_rx@83c30000 {
|
||||
clock-names = "clk";
|
||||
clocks = <0x2 0x10>;
|
||||
compatible = "sdr,openofdm_rx";
|
||||
reg = <0x83c30000 0x10000>;
|
||||
};
|
||||
|
||||
xpu_0: xpu@83c40000 {
|
||||
clock-names = "s00_axi_aclk";
|
||||
clocks = <0x2 0x10>;
|
||||
compatible = "sdr,xpu";
|
||||
reg = <0x83c40000 0x10000>;
|
||||
};
|
||||
|
||||
cf-ad9361-lpc@79020000 {
|
||||
compatible = "adi,axi-ad9361-6.00.a";
|
||||
reg = <0x79020000 0x6000>;
|
||||
dmas = <0xb 0x0>;
|
||||
dma-names = "rx";
|
||||
spibus-connected = <0xc>;
|
||||
};
|
||||
|
||||
cf-ad9361-dds-core-lpc@79024000 {
|
||||
compatible = "adi,axi-ad9361-dds-6.00.a";
|
||||
reg = <0x79024000 0x1000>;
|
||||
clocks = <0xc 0xd>;
|
||||
clock-names = "sampl_clk";
|
||||
dmas = <0xd 0x0>;
|
||||
dma-names = "tx";
|
||||
};
|
||||
|
||||
mwipcore@43c00000 {
|
||||
compatible = "mathworks,mwipcore-axi4lite-v1.00";
|
||||
reg = <0x43c00000 0xffff>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "led0:green";
|
||||
gpios = <0x6 0x3a 0x0>;
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "led1:green";
|
||||
gpios = <0x6 0x3b 0x0>;
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "led2:green";
|
||||
gpios = <0x6 0x3c 0x0>;
|
||||
};
|
||||
|
||||
led3 {
|
||||
label = "led3:green";
|
||||
gpios = <0x6 0x3d 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
autorepeat;
|
||||
|
||||
pb0 {
|
||||
label = "Left";
|
||||
linux,code = <0x69>;
|
||||
gpios = <0x6 0x36 0x0>;
|
||||
};
|
||||
|
||||
pb1 {
|
||||
label = "Right";
|
||||
linux,code = <0x6a>;
|
||||
gpios = <0x6 0x37 0x0>;
|
||||
};
|
||||
|
||||
pb2 {
|
||||
label = "Up";
|
||||
linux,code = <0x67>;
|
||||
gpios = <0x6 0x38 0x0>;
|
||||
};
|
||||
|
||||
pb3 {
|
||||
label = "Down";
|
||||
linux,code = <0x6c>;
|
||||
gpios = <0x6 0x39 0x0>;
|
||||
};
|
||||
|
||||
sw0 {
|
||||
label = "SW0";
|
||||
linux,input-type = <0x5>;
|
||||
linux,code = <0x0>;
|
||||
gpios = <0x6 0x3e 0x0>;
|
||||
};
|
||||
|
||||
sw1 {
|
||||
label = "SW1";
|
||||
linux,input-type = <0x5>;
|
||||
linux,code = <0x1>;
|
||||
gpios = <0x6 0x3f 0x0>;
|
||||
};
|
||||
|
||||
sw2 {
|
||||
label = "SW2";
|
||||
linux,input-type = <0x5>;
|
||||
linux,code = <0x2>;
|
||||
gpios = <0x6 0x40 0x0>;
|
||||
};
|
||||
|
||||
sw3 {
|
||||
label = "SW3";
|
||||
linux,input-type = <0x5>;
|
||||
linux,code = <0x3>;
|
||||
gpios = <0x6 0x41 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
BIN
kernel_boot/boards/adrv9361z7035/u-boot.elf
Normal file
BIN
kernel_boot/boards/adrv9361z7035/u-boot.elf
Normal file
Binary file not shown.
1212
kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts
Normal file
1212
kernel_boot/boards/adrv9361z7035_fmc/devicetree.dts
Normal file
File diff suppressed because it is too large
Load Diff
BIN
kernel_boot/boards/adrv9361z7035_fmc/u-boot.elf
Normal file
BIN
kernel_boot/boards/adrv9361z7035_fmc/u-boot.elf
Normal file
Binary file not shown.
100
user_space/rf_init_adrv9361z7035.sh
Executable file
100
user_space/rf_init_adrv9361z7035.sh
Executable file
@ -0,0 +1,100 @@
|
||||
#!/bin/sh
|
||||
|
||||
home_dir=$(pwd)
|
||||
|
||||
cd /sys/bus/iio/devices/iio:device3
|
||||
|
||||
echo "rx bw"
|
||||
cat in_voltage_rf_bandwidth
|
||||
#echo 37500000 > in_voltage_rf_bandwidth
|
||||
echo 17500000 > in_voltage_rf_bandwidth
|
||||
cat in_voltage_rf_bandwidth
|
||||
sync
|
||||
|
||||
echo "tx_bw"
|
||||
cat out_voltage_rf_bandwidth
|
||||
echo 37500000 > out_voltage_rf_bandwidth
|
||||
#echo 40000000 > out_voltage_rf_bandwidth
|
||||
#echo 20000000 > out_voltage_rf_bandwidth
|
||||
cat out_voltage_rf_bandwidth
|
||||
sync
|
||||
#sleep 0.5
|
||||
|
||||
echo "rx rate"
|
||||
cat in_voltage_sampling_frequency
|
||||
echo 40000000 > in_voltage_sampling_frequency
|
||||
#echo 20000000 > in_voltage_sampling_frequency
|
||||
cat in_voltage_sampling_frequency
|
||||
sync
|
||||
|
||||
echo "tx rate"
|
||||
cat out_voltage_sampling_frequency
|
||||
echo 40000000 > out_voltage_sampling_frequency
|
||||
#echo 20000000 > out_voltage_sampling_frequency
|
||||
cat out_voltage_sampling_frequency
|
||||
sync
|
||||
sleep 1
|
||||
|
||||
echo "rx lo"
|
||||
cat out_altvoltage0_RX_LO_frequency
|
||||
#echo 2427000000 > out_altvoltage0_RX_LO_frequency
|
||||
echo 5240000000 > out_altvoltage0_RX_LO_frequency
|
||||
#echo 2320000000 > out_altvoltage0_RX_LO_frequency
|
||||
cat out_altvoltage0_RX_LO_frequency
|
||||
sync
|
||||
|
||||
echo "tx lo"
|
||||
cat out_altvoltage1_TX_LO_frequency
|
||||
#echo 2447000000 > out_altvoltage1_TX_LO_frequency
|
||||
echo 5250000000 > out_altvoltage1_TX_LO_frequency
|
||||
#echo 2320000000 > out_altvoltage1_TX_LO_frequency
|
||||
cat out_altvoltage1_TX_LO_frequency
|
||||
sync
|
||||
#sleep 1
|
||||
|
||||
echo "rx0 agc fast_attack"
|
||||
#echo "rx0 agc manual"
|
||||
cat in_voltage0_gain_control_mode
|
||||
echo fast_attack > in_voltage0_gain_control_mode
|
||||
#echo manual > in_voltage0_gain_control_mode
|
||||
cat in_voltage0_gain_control_mode
|
||||
sync
|
||||
|
||||
echo "rx1 agc fast_attack"
|
||||
#echo "rx1 agc manual"
|
||||
cat in_voltage1_gain_control_mode
|
||||
echo fast_attack > in_voltage1_gain_control_mode
|
||||
#echo manual > in_voltage1_gain_control_mode
|
||||
cat in_voltage1_gain_control_mode
|
||||
sync
|
||||
sleep 1
|
||||
|
||||
echo "rx0 gain to 70" # this set gain is gpio gain - 5dB (test with agc and read back gpio in driver)
|
||||
cat in_voltage0_hardwaregain
|
||||
echo 70 > in_voltage0_hardwaregain
|
||||
cat in_voltage0_hardwaregain
|
||||
sync
|
||||
|
||||
echo "rx1 gain to 70"
|
||||
cat in_voltage1_hardwaregain
|
||||
echo 70 > in_voltage1_hardwaregain
|
||||
cat in_voltage1_hardwaregain
|
||||
sync
|
||||
|
||||
echo "tx0 gain -89dB"
|
||||
cat out_voltage0_hardwaregain
|
||||
echo -89 > out_voltage0_hardwaregain
|
||||
cat out_voltage0_hardwaregain
|
||||
sync
|
||||
|
||||
echo "tx1 gain 0dB"
|
||||
cat out_voltage1_hardwaregain
|
||||
echo 0 > out_voltage1_hardwaregain
|
||||
cat out_voltage1_hardwaregain
|
||||
sync
|
||||
|
||||
echo "rssi"
|
||||
cat in_voltage0_rssi
|
||||
cat in_voltage1_rssi
|
||||
|
||||
cd $home_dir
|
||||
Loading…
x
Reference in New Issue
Block a user