From 4bdc210e861d67483517f169618380d248a347ee Mon Sep 17 00:00:00 2001 From: Xianjun Jiao Date: Tue, 29 Mar 2022 10:13:16 +0200 Subject: [PATCH] Open the 4 queue gates all the time during xpu initialization --- driver/xpu/xpu.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/driver/xpu/xpu.c b/driver/xpu/xpu.c index 87463f0..00636b7 100644 --- a/driver/xpu/xpu.c +++ b/driver/xpu/xpu.c @@ -440,6 +440,36 @@ static inline u32 hw_init(enum xpu_mode mode){ xpu_api->XPU_REG_DIFS_ADVANCE_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|2); //us. bit31~16 max pkt length threshold + // setup time schedule of 4 slices + // slice 0 + xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms + xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms + xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms + + // slice 1 + xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms + xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms + //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms + xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms + + // slice 2 + xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms + //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms + xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms + //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms + xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms + + // slice 3 + xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms + //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms + xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms + //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms + xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms + + // all slice sync rest + xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time + xpu_api->XPU_REG_MULTI_RST_write(0<<7); + printk("%s hw_init err %d\n", xpu_compatible_str, err); return(err); }