diff --git a/kernel_boot/boards/adrv9364z7020/devicetree.dtb b/kernel_boot/boards/adrv9364z7020/devicetree.dtb
index ee77db3..ca88668 100644
Binary files a/kernel_boot/boards/adrv9364z7020/devicetree.dtb and b/kernel_boot/boards/adrv9364z7020/devicetree.dtb differ
diff --git a/kernel_boot/boards/adrv9364z7020/devicetree.dts b/kernel_boot/boards/adrv9364z7020/devicetree.dts
index aba3d6b..e06de8b 100644
--- a/kernel_boot/boards/adrv9364z7020/devicetree.dts
+++ b/kernel_boot/boards/adrv9364z7020/devicetree.dts
@@ -1,46 +1,49 @@
 /dts-v1/;
 
 / {
-	#address-cells = <0x1>;
-	#size-cells = <0x1>;
+	#address-cells = <0x01>;
+	#size-cells = <0x01>;
 	compatible = "xlnx,zynq-7000";
-	interrupt-parent = <0x1>;
+	interrupt-parent = <0x01>;
 	model = "Analog Devices ADRV9364-Z7020 (Z7020/AD9364)";
 
 	cpus {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
 
 		cpu@0 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <0x0>;
-			clocks = <0x2 0x3>;
+			reg = <0x00>;
+			clocks = <0x02 0x03>;
 			clock-latency = <0x3e8>;
-			cpu0-supply = <0x3>;
+			cpu0-supply = <0x03>;
 			operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
+			phandle = <0x11>;
 		};
 
 		cpu@1 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <0x1>;
-			clocks = <0x2 0x3>;
+			reg = <0x01>;
+			clocks = <0x02 0x03>;
+			phandle = <0x13>;
 		};
 	};
 
 	fpga-full {
 		compatible = "fpga-region";
-		fpga-mgr = <0x4>;
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
+		fpga-mgr = <0x04>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
 		ranges;
+		phandle = <0x19>;
 	};
 
 	pmu@f8891000 {
 		compatible = "arm,cortex-a9-pmu";
-		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
-		interrupt-parent = <0x1>;
+		interrupts = <0x00 0x05 0x04 0x00 0x06 0x04>;
+		interrupt-parent = <0x01>;
 		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
 	};
 
@@ -51,145 +54,194 @@
 		regulator-max-microvolt = <0xf4240>;
 		regulator-boot-on;
 		regulator-always-on;
-		linux,phandle = <0x3>;
-		phandle = <0x3>;
+		phandle = <0x03>;
 	};
 
-	amba {
+	replicator {
+		compatible = "arm,coresight-static-replicator";
+		clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+		clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+
+		out-ports {
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+
+			port@0 {
+				reg = <0x00>;
+
+				endpoint {
+					remote-endpoint = <0x05>;
+					phandle = <0x0d>;
+				};
+			};
+
+			port@1 {
+				reg = <0x01>;
+
+				endpoint {
+					remote-endpoint = <0x06>;
+					phandle = <0x0c>;
+				};
+			};
+		};
+
+		in-ports {
+
+			port {
+
+				endpoint {
+					remote-endpoint = <0x07>;
+					phandle = <0x0e>;
+				};
+			};
+		};
+	};
+
+	axi {
 		u-boot,dm-pre-reloc;
 		compatible = "simple-bus";
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
-		interrupt-parent = <0x1>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
+		interrupt-parent = <0x01>;
 		ranges;
+		phandle = <0x1a>;
 
 		adc@f8007100 {
 			compatible = "xlnx,zynq-xadc-1.00.a";
 			reg = <0xf8007100 0x20>;
-			interrupts = <0x0 0x7 0x4>;
-			interrupt-parent = <0x1>;
-			clocks = <0x2 0xc>;
+			interrupts = <0x00 0x07 0x04>;
+			interrupt-parent = <0x01>;
+			clocks = <0x02 0x0c>;
+			phandle = <0x1b>;
 		};
 
 		can@e0008000 {
 			compatible = "xlnx,zynq-can-1.0";
 			status = "disabled";
-			clocks = <0x2 0x13 0x2 0x24>;
-			clock-names = "can_clk", "pclk";
+			clocks = <0x02 0x13 0x02 0x24>;
+			clock-names = "can_clk\0pclk";
 			reg = <0xe0008000 0x1000>;
-			interrupts = <0x0 0x1c 0x4>;
-			interrupt-parent = <0x1>;
+			interrupts = <0x00 0x1c 0x04>;
+			interrupt-parent = <0x01>;
 			tx-fifo-depth = <0x40>;
 			rx-fifo-depth = <0x40>;
+			phandle = <0x1c>;
 		};
 
 		can@e0009000 {
 			compatible = "xlnx,zynq-can-1.0";
 			status = "disabled";
-			clocks = <0x2 0x14 0x2 0x25>;
-			clock-names = "can_clk", "pclk";
+			clocks = <0x02 0x14 0x02 0x25>;
+			clock-names = "can_clk\0pclk";
 			reg = <0xe0009000 0x1000>;
-			interrupts = <0x0 0x33 0x4>;
-			interrupt-parent = <0x1>;
+			interrupts = <0x00 0x33 0x04>;
+			interrupt-parent = <0x01>;
 			tx-fifo-depth = <0x40>;
 			rx-fifo-depth = <0x40>;
+			phandle = <0x1d>;
 		};
 
 		gpio@e000a000 {
 			compatible = "xlnx,zynq-gpio-1.0";
-			#gpio-cells = <0x2>;
-			clocks = <0x2 0x2a>;
+			#gpio-cells = <0x02>;
+			clocks = <0x02 0x2a>;
 			gpio-controller;
 			interrupt-controller;
-			#interrupt-cells = <0x2>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x14 0x4>;
+			#interrupt-cells = <0x02>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x14 0x04>;
 			reg = <0xe000a000 0x1000>;
-			linux,phandle = <0x6>;
-			phandle = <0x6>;
+			phandle = <0x09>;
 		};
 
 		i2c@e0004000 {
 			compatible = "cdns,i2c-r1p10";
 			status = "disabled";
-			clocks = <0x2 0x26>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x19 0x4>;
+			clocks = <0x02 0x26>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x19 0x04>;
 			reg = <0xe0004000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x1e>;
 		};
 
 		i2c@e0005000 {
 			compatible = "cdns,i2c-r1p10";
 			status = "disabled";
-			clocks = <0x2 0x27>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x30 0x4>;
+			clocks = <0x02 0x27>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x30 0x04>;
 			reg = <0xe0005000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x1f>;
 		};
 
 		interrupt-controller@f8f01000 {
 			compatible = "arm,cortex-a9-gic";
-			#interrupt-cells = <0x3>;
+			#interrupt-cells = <0x03>;
 			interrupt-controller;
 			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
-			linux,phandle = <0x1>;
-			phandle = <0x1>;
+			phandle = <0x01>;
 		};
 
 		cache-controller@f8f02000 {
 			compatible = "arm,pl310-cache";
 			reg = <0xf8f02000 0x1000>;
-			interrupts = <0x0 0x2 0x4>;
-			arm,data-latency = <0x3 0x2 0x2>;
-			arm,tag-latency = <0x2 0x2 0x2>;
+			interrupts = <0x00 0x02 0x04>;
+			arm,data-latency = <0x03 0x02 0x02>;
+			arm,tag-latency = <0x02 0x02 0x02>;
 			cache-unified;
-			cache-level = <0x2>;
+			cache-level = <0x02>;
+			phandle = <0x20>;
 		};
 
 		memory-controller@f8006000 {
 			compatible = "xlnx,zynq-ddrc-a05";
 			reg = <0xf8006000 0x1000>;
+			phandle = <0x21>;
 		};
 
 		ocmc@f800c000 {
 			compatible = "xlnx,zynq-ocmc-1.0";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x3 0x4>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x03 0x04>;
 			reg = <0xf800c000 0x1000>;
+			phandle = <0x22>;
 		};
 
 		serial@e0000000 {
-			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
+			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
 			status = "disabled";
-			clocks = <0x2 0x17 0x2 0x28>;
-			clock-names = "uart_clk", "pclk";
+			clocks = <0x02 0x17 0x02 0x28>;
+			clock-names = "uart_clk\0pclk";
 			reg = <0xe0000000 0x1000>;
-			interrupts = <0x0 0x1b 0x4>;
+			interrupts = <0x00 0x1b 0x04>;
+			phandle = <0x23>;
 		};
 
 		serial@e0001000 {
-			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
+			compatible = "xlnx,xuartps\0cdns,uart-r1p8";
 			status = "okay";
-			clocks = <0x2 0x18 0x2 0x29>;
-			clock-names = "uart_clk", "pclk";
+			clocks = <0x02 0x18 0x02 0x29>;
+			clock-names = "uart_clk\0pclk";
 			reg = <0xe0001000 0x1000>;
-			interrupts = <0x0 0x32 0x4>;
+			interrupts = <0x00 0x32 0x04>;
+			phandle = <0x24>;
 		};
 
 		spi@e0006000 {
 			compatible = "xlnx,zynq-spi-r1p6";
 			reg = <0xe0006000 0x1000>;
 			status = "okay";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x1a 0x4>;
-			clocks = <0x2 0x19 0x2 0x22>;
-			clock-names = "ref_clk", "pclk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x1a 0x04>;
+			clocks = <0x02 0x19 0x02 0x22>;
+			clock-names = "ref_clk\0pclk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x25>;
 
 			ad9361-phy@0 {
 				#address-cells = <0x1>;
@@ -199,8 +251,8 @@
 				reg = <0x0>;
 				spi-cpha;
 				spi-max-frequency = <0x989680>;
-				clocks = <0x5 0x0>;
-				clock-names = "ad9364_ext_refclk";
+				clocks = <0x08 0x00>;
+				clock-names = "ad9361_ext_refclk";
 				clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
 				adi,digital-interface-tune-skip-mode = <0x0>;
 				adi,pp-tx-swap-enable;
@@ -291,13 +343,12 @@
 				adi,aux-dac2-default-value-mV = <0x0>;
 				adi,aux-dac2-rx-delay-us = <0x0>;
 				adi,aux-dac2-tx-delay-us = <0x0>;
-				en_agc-gpios = <0x6 0x62 0x0>;
-				sync-gpios = <0x6 0x63 0x0>;
-				reset-gpios = <0x6 0x64 0x0>;
-				enable-gpios = <0x6 0x65 0x0>;
-				txnrx-gpios = <0x6 0x66 0x0>;
-				linux,phandle = <0xb>;
-				phandle = <0xb>;
+				en_agc-gpios = <0x09 0x62 0x0>;
+				sync-gpios = <0x09 0x63 0x0>;
+				reset-gpios = <0x09 0x64 0x0>;
+				enable-gpios = <0x09 0x65 0x0>;
+				txnrx-gpios = <0x09 0x66 0x0>;
+				phandle = <0x17>;
 			};
 		};
 
@@ -305,39 +356,42 @@
 			compatible = "xlnx,zynq-spi-r1p6";
 			reg = <0xe0007000 0x1000>;
 			status = "disabled";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x31 0x4>;
-			clocks = <0x2 0x1a 0x2 0x23>;
-			clock-names = "ref_clk", "pclk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x31 0x04>;
+			clocks = <0x02 0x1a 0x02 0x23>;
+			clock-names = "ref_clk\0pclk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x26>;
 		};
 
 		spi@e000d000 {
-			clock-names = "ref_clk", "pclk";
-			clocks = <0x2 0xa 0x2 0x2b>;
+			clock-names = "ref_clk\0pclk";
+			clocks = <0x02 0x0a 0x02 0x2b>;
 			compatible = "xlnx,zynq-qspi-1.0";
 			status = "okay";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x13 0x4>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x13 0x04>;
 			reg = <0xe000d000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-			is-dual = <0x0>;
-			num-cs = <0x1>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			is-dual = <0x00>;
+			num-cs = <0x01>;
+			phandle = <0x27>;
 
 			ps7-qspi@0 {
-				#address-cells = <0x1>;
-				#size-cells = <0x1>;
-				spi-tx-bus-width = <0x1>;
-				spi-rx-bus-width = <0x4>;
-				compatible = "n25q256a", "jedec,spi-nor";
-				reg = <0x0>;
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+				spi-tx-bus-width = <0x01>;
+				spi-rx-bus-width = <0x04>;
+				compatible = "n25q256a\0jedec,spi-nor";
+				reg = <0x00>;
 				spi-max-frequency = <0x2faf080>;
+				phandle = <0x28>;
 
 				partition@qspi-fsbl-uboot {
 					label = "qspi-fsbl-uboot";
-					reg = <0x0 0xe0000>;
+					reg = <0x00 0xe0000>;
 				};
 
 				partition@qspi-uboot-env {
@@ -368,275 +422,414 @@
 		};
 
 		memory-controller@e000e000 {
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
+			#address-cells = <0x01>;
+			#size-cells = <0x01>;
 			status = "disabled";
-			clock-names = "memclk", "aclk";
-			clocks = <0x2 0xb 0x2 0x2c>;
-			compatible = "arm,pl353-smc-r2p1";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x12 0x4>;
+			clock-names = "memclk\0apb_pclk";
+			clocks = <0x02 0x0b 0x02 0x2c>;
+			compatible = "arm,pl353-smc-r2p1\0arm,primecell";
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x12 0x04>;
 			ranges;
 			reg = <0xe000e000 0x1000>;
+			phandle = <0x29>;
 
 			flash@e1000000 {
 				status = "disabled";
 				compatible = "arm,pl353-nand-r2p1";
 				reg = <0xe1000000 0x1000000>;
-				#address-cells = <0x1>;
-				#size-cells = <0x1>;
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+				phandle = <0x2a>;
 			};
 
 			flash@e2000000 {
 				status = "disabled";
 				compatible = "cfi-flash";
 				reg = <0xe2000000 0x2000000>;
-				#address-cells = <0x1>;
-				#size-cells = <0x1>;
+				#address-cells = <0x01>;
+				#size-cells = <0x01>;
+				phandle = <0x2b>;
 			};
 		};
 
 		ethernet@e000b000 {
-			compatible = "cdns,zynq-gem", "cdns,gem";
+			compatible = "cdns,zynq-gem\0cdns,gem";
 			reg = <0xe000b000 0x1000>;
 			status = "okay";
-			interrupts = <0x0 0x16 0x4>;
-			clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>;
-			clock-names = "pclk", "hclk", "tx_clk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-			phy-handle = <0x7>;
+			interrupts = <0x00 0x16 0x04>;
+			clocks = <0x02 0x1e 0x02 0x1e 0x02 0x0d>;
+			clock-names = "pclk\0hclk\0tx_clk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phy-handle = <0x0a>;
 			phy-mode = "rgmii-id";
+			phandle = <0x2c>;
 
 			phy@0 {
 				device_type = "ethernet-phy";
-				reg = <0x0>;
-				marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0x0>;
-				linux,phandle = <0x7>;
-				phandle = <0x7>;
+				reg = <0x00>;
+				marvell,reg-init = <0x03 0x10 0xff00 0x1e 0x03 0x11 0xfff0 0x00>;
+				phandle = <0x0a>;
 			};
 		};
 
 		ethernet@e000c000 {
-			compatible = "cdns,zynq-gem", "cdns,gem";
+			compatible = "cdns,zynq-gem\0cdns,gem";
 			reg = <0xe000c000 0x1000>;
 			status = "disabled";
-			interrupts = <0x0 0x2d 0x4>;
-			clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
-			clock-names = "pclk", "hclk", "tx_clk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			interrupts = <0x00 0x2d 0x04>;
+			clocks = <0x02 0x1f 0x02 0x1f 0x02 0x0e>;
+			clock-names = "pclk\0hclk\0tx_clk";
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x2d>;
 		};
 
 		mmc@e0100000 {
 			compatible = "arasan,sdhci-8.9a";
 			status = "okay";
-			clock-names = "clk_xin", "clk_ahb";
-			clocks = <0x2 0x15 0x2 0x20>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x18 0x4>;
+			clock-names = "clk_xin\0clk_ahb";
+			clocks = <0x02 0x15 0x02 0x20>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x18 0x04>;
 			reg = <0xe0100000 0x1000>;
 			disable-wp;
+			phandle = <0x2e>;
 		};
 
 		mmc@e0101000 {
 			compatible = "arasan,sdhci-8.9a";
 			status = "disabled";
-			clock-names = "clk_xin", "clk_ahb";
-			clocks = <0x2 0x16 0x2 0x21>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x2f 0x4>;
+			clock-names = "clk_xin\0clk_ahb";
+			clocks = <0x02 0x16 0x02 0x21>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x2f 0x04>;
 			reg = <0xe0101000 0x1000>;
+			phandle = <0x2f>;
 		};
 
 		slcr@f8000000 {
 			u-boot,dm-pre-reloc;
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
-			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
+			#address-cells = <0x01>;
+			#size-cells = <0x01>;
+			compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd";
 			reg = <0xf8000000 0x1000>;
 			ranges;
-			linux,phandle = <0x8>;
-			phandle = <0x8>;
+			phandle = <0x0b>;
 
 			clkc@100 {
 				u-boot,dm-pre-reloc;
-				#clock-cells = <0x1>;
+				#clock-cells = <0x01>;
 				compatible = "xlnx,ps7-clkc";
-				fclk-enable = <0xf>;
-				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
+				fclk-enable = <0x0f>;
+				clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb";
 				reg = <0x100 0x100>;
 				ps-clk-frequency = <0x1fca055>;
-				linux,phandle = <0x2>;
-				phandle = <0x2>;
+				phandle = <0x02>;
 			};
 
 			rstc@200 {
 				compatible = "xlnx,zynq-reset";
 				reg = <0x200 0x48>;
-				#reset-cells = <0x1>;
-				syscon = <0x8>;
+				#reset-cells = <0x01>;
+				syscon = <0x0b>;
+				phandle = <0x30>;
 			};
 
 			pinctrl@700 {
 				compatible = "xlnx,pinctrl-zynq";
 				reg = <0x700 0x200>;
-				syscon = <0x8>;
+				syscon = <0x0b>;
+				phandle = <0x31>;
 			};
 		};
 
 		dmac@f8003000 {
-			compatible = "arm,pl330", "arm,primecell";
+			compatible = "arm,pl330\0arm,primecell";
 			reg = <0xf8003000 0x1000>;
-			interrupt-parent = <0x1>;
-			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
-			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
-			#dma-cells = <0x1>;
-			#dma-channels = <0x8>;
-			#dma-requests = <0x4>;
-			clocks = <0x2 0x1b>;
+			interrupt-parent = <0x01>;
+			interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7";
+			interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04>;
+			#dma-cells = <0x01>;
+			#dma-channels = <0x08>;
+			#dma-requests = <0x04>;
+			clocks = <0x02 0x1b>;
 			clock-names = "apb_pclk";
+			phandle = <0x32>;
 		};
 
 		devcfg@f8007000 {
 			compatible = "xlnx,zynq-devcfg-1.0";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x8 0x4>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x08 0x04>;
 			reg = <0xf8007000 0x100>;
-			clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>;
-			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
-			syscon = <0x8>;
-			linux,phandle = <0x4>;
-			phandle = <0x4>;
+			clocks = <0x02 0x0c 0x02 0x0f 0x02 0x10 0x02 0x11 0x02 0x12>;
+			clock-names = "ref_clk\0fclk0\0fclk1\0fclk2\0fclk3";
+			syscon = <0x0b>;
+			phandle = <0x04>;
 		};
 
 		efuse@f800d000 {
 			compatible = "xlnx,zynq-efuse";
 			reg = <0xf800d000 0x20>;
+			phandle = <0x33>;
 		};
 
 		timer@f8f00200 {
 			compatible = "arm,cortex-a9-global-timer";
 			reg = <0xf8f00200 0x20>;
-			interrupts = <0x1 0xb 0x301>;
-			interrupt-parent = <0x1>;
-			clocks = <0x2 0x4>;
+			interrupts = <0x01 0x0b 0x301>;
+			interrupt-parent = <0x01>;
+			clocks = <0x02 0x04>;
+			phandle = <0x34>;
 		};
 
 		timer@f8001000 {
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>;
 			compatible = "cdns,ttc";
-			clocks = <0x2 0x6>;
+			clocks = <0x02 0x06>;
 			reg = <0xf8001000 0x1000>;
+			phandle = <0x35>;
 		};
 
 		timer@f8002000 {
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04>;
 			compatible = "cdns,ttc";
-			clocks = <0x2 0x6>;
+			clocks = <0x02 0x06>;
 			reg = <0xf8002000 0x1000>;
+			phandle = <0x36>;
 		};
 
 		timer@f8f00600 {
-			interrupt-parent = <0x1>;
-			interrupts = <0x1 0xd 0x301>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x01 0x0d 0x301>;
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0xf8f00600 0x20>;
-			clocks = <0x2 0x4>;
+			clocks = <0x02 0x04>;
+			phandle = <0x37>;
 		};
 
 		usb@e0002000 {
-			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
 			status = "okay";
-			clocks = <0x2 0x1c>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x15 0x4>;
+			clocks = <0x02 0x1c>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x15 0x04>;
 			reg = <0xe0002000 0x1000>;
 			phy_type = "ulpi";
 			dr_mode = "host";
-			xlnx,phy-reset-gpio = <0x6 0x7 0x0>;
+			xlnx,phy-reset-gpio = <0x09 0x07 0x00>;
+			phandle = <0x38>;
 		};
 
 		usb@e0003000 {
-			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+			compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
 			status = "disabled";
-			clocks = <0x2 0x1d>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x2c 0x4>;
+			clocks = <0x02 0x1d>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x2c 0x04>;
 			reg = <0xe0003000 0x1000>;
 			phy_type = "ulpi";
+			phandle = <0x39>;
 		};
 
 		watchdog@f8005000 {
-			clocks = <0x2 0x2d>;
+			clocks = <0x02 0x2d>;
 			compatible = "cdns,wdt-r1p2";
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x9 0x1>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x09 0x01>;
 			reg = <0xf8005000 0x1000>;
-			timeout-sec = <0xa>;
+			timeout-sec = <0x0a>;
+			phandle = <0x3a>;
+		};
+
+		etb@f8801000 {
+			compatible = "arm,coresight-etb10\0arm,primecell";
+			reg = <0xf8801000 0x1000>;
+			clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+
+			in-ports {
+
+				port {
+
+					endpoint {
+						remote-endpoint = <0x0c>;
+						phandle = <0x06>;
+					};
+				};
+			};
+		};
+
+		tpiu@f8803000 {
+			compatible = "arm,coresight-tpiu\0arm,primecell";
+			reg = <0xf8803000 0x1000>;
+			clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+
+			in-ports {
+
+				port {
+
+					endpoint {
+						remote-endpoint = <0x0d>;
+						phandle = <0x05>;
+					};
+				};
+			};
+		};
+
+		funnel@f8804000 {
+			compatible = "arm,coresight-static-funnel\0arm,primecell";
+			reg = <0xf8804000 0x1000>;
+			clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+
+			out-ports {
+
+				port {
+
+					endpoint {
+						remote-endpoint = <0x0e>;
+						phandle = <0x07>;
+					};
+				};
+			};
+
+			in-ports {
+				#address-cells = <0x01>;
+				#size-cells = <0x00>;
+
+				port@0 {
+					reg = <0x00>;
+
+					endpoint {
+						remote-endpoint = <0x0f>;
+						phandle = <0x12>;
+					};
+				};
+
+				port@1 {
+					reg = <0x01>;
+
+					endpoint {
+						remote-endpoint = <0x10>;
+						phandle = <0x14>;
+					};
+				};
+
+				port@2 {
+					reg = <0x02>;
+
+					endpoint {
+						phandle = <0x3b>;
+					};
+				};
+			};
+		};
+
+		ptm@f889c000 {
+			compatible = "arm,coresight-etm3x\0arm,primecell";
+			reg = <0xf889c000 0x1000>;
+			clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+			cpu = <0x11>;
+
+			out-ports {
+
+				port {
+
+					endpoint {
+						remote-endpoint = <0x12>;
+						phandle = <0x0f>;
+					};
+				};
+			};
+		};
+
+		ptm@f889d000 {
+			compatible = "arm,coresight-etm3x\0arm,primecell";
+			reg = <0xf889d000 0x1000>;
+			clocks = <0x02 0x1b 0x02 0x2e 0x02 0x2f>;
+			clock-names = "apb_pclk\0dbg_trc\0dbg_apb";
+			cpu = <0x13>;
+
+			out-ports {
+
+				port {
+
+					endpoint {
+						remote-endpoint = <0x14>;
+						phandle = <0x10>;
+					};
+				};
+			};
 		};
 	};
 
 	aliases {
-		ethernet0 = "/amba/ethernet@e000b000";
-		serial0 = "/amba/serial@e0001000";
+		ethernet0 = "/axi/ethernet@e000b000";
+		serial0 = "/axi/serial@e0001000";
+		phandle = <0x3c>;
 	};
 
 	memory {
 		device_type = "memory";
-		reg = <0x0 0x40000000>;
+		reg = <0x00 0x40000000>;
 	};
 
 	chosen {
-		linux,stdout-path = "/amba@0/uart@E0001000";
+		stdout-path = "/amba@0/uart@E0001000";
 	};
 
 	clocks {
 
 		clock@0 {
-			#clock-cells = <0x0>;
+			#clock-cells = <0x00>;
 			compatible = "adjustable-clock";
 			clock-frequency = <0x2625a00>;
 			clock-accuracy = <0x30d40>;
 			clock-output-names = "ad9364_ext_refclk";
-			linux,phandle = <0x5>;
-			phandle = <0x5>;
+			phandle = <0x08>;
 		};
 
 		clock@1 {
-			#clock-cells = <0x0>;
+			#clock-cells = <0x00>;
 			compatible = "fixed-clock";
 			clock-frequency = <0x16e3600>;
 			clock-output-names = "24MHz";
-			linux,phandle = <0x9>;
-			phandle = <0x9>;
+			phandle = <0x15>;
 		};
 	};
 
 	usb-ulpi-gpio-gate@0 {
 		compatible = "gpio-gate-clock";
-		clocks = <0x9>;
-		#clock-cells = <0x0>;
-		enable-gpios = <0x6 0x9 0x1>;
+		clocks = <0x15>;
+		#clock-cells = <0x00>;
+		enable-gpios = <0x09 0x09 0x01>;
+		phandle = <0x3d>;
 	};
 
 	fpga-axi@0 {
 		compatible = "simple-bus";
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
+		#address-cells = <0x01>;
+		#size-cells = <0x01>;
 		ranges;
+		phandle = <0x3e>;
 
 		i2c@41600000 {
-			compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
+			compatible = "xlnx,axi-iic-1.02.a\0xlnx,xps-iic-2.00.a";
 			reg = <0x41600000 0x10000>;
-			interrupt-parent = <0x1>;
-			interrupts = <0x0 0x3a 0x4>;
-			clocks = <0x2 0xf>;
+			interrupt-parent = <0x01>;
+			interrupts = <0x00 0x3a 0x04>;
+			clocks = <0x02 0x0f>;
 			clock-names = "pclk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
+			#address-cells = <0x01>;
+			#size-cells = <0x00>;
+			phandle = <0x3f>;
 
 			ad7291@20 {
 				compatible = "adi,ad7291";
@@ -657,22 +850,21 @@
 		// dma@7c400000 {
 		// 	compatible = "adi,axi-dmac-1.00.a";
 		// 	reg = <0x7c400000 0x10000>;
-		// 	#dma-cells = <0x1>;
-		// 	interrupts = <0x0 0x39 0x0>;
-		// 	clocks = <0x2 0x10>;
-		// 	linux,phandle = <0xa>;
-		// 	phandle = <0xa>;
+		// 	#dma-cells = <0x01>;
+		// 	interrupts = <0x00 0x39 0x04>;
+		// 	clocks = <0x02 0x10>;
+		// 	phandle = <0x16>;
 
 		// 	adi,channels {
-		// 		#size-cells = <0x0>;
-		// 		#address-cells = <0x1>;
+		// 		#size-cells = <0x00>;
+		// 		#address-cells = <0x01>;
 
 		// 		dma-channel@0 {
-		// 			reg = <0x0>;
+		// 			reg = <0x00>;
 		// 			adi,source-bus-width = <0x40>;
-		// 			adi,source-bus-type = <0x2>;
+		// 			adi,source-bus-type = <0x02>;
 		// 			adi,destination-bus-width = <0x40>;
-		// 			adi,destination-bus-type = <0x0>;
+		// 			adi,destination-bus-type = <0x00>;
 		// 		};
 		// 	};
 		// };
@@ -680,22 +872,21 @@
 		// dma@7c420000 {
 		// 	compatible = "adi,axi-dmac-1.00.a";
 		// 	reg = <0x7c420000 0x10000>;
-		// 	#dma-cells = <0x1>;
-		// 	interrupts = <0x0 0x38 0x0>;
-		// 	clocks = <0x2 0x10>;
-		// 	linux,phandle = <0xc>;
-		// 	phandle = <0xc>;
+		// 	#dma-cells = <0x01>;
+		// 	interrupts = <0x00 0x38 0x04>;
+		// 	clocks = <0x02 0x10>;
+		// 	phandle = <0x18>;
 
 		// 	adi,channels {
-		// 		#size-cells = <0x0>;
-		// 		#address-cells = <0x1>;
+		// 		#size-cells = <0x00>;
+		// 		#address-cells = <0x01>;
 
 		// 		dma-channel@0 {
-		// 			reg = <0x0>;
+		// 			reg = <0x00>;
 		// 			adi,source-bus-width = <0x40>;
-		// 			adi,source-bus-type = <0x0>;
+		// 			adi,source-bus-type = <0x00>;
 		// 			adi,destination-bus-width = <0x40>;
-		// 			adi,destination-bus-type = <0x2>;
+		// 			adi,destination-bus-type = <0x02>;
 		// 		};
 		// 	};
 		// };
@@ -710,12 +901,12 @@
 			interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>;
 		} ;
 
-		axidmatest_1: axidmatest@1 {
-			compatible ="xlnx,axi-dma-test-1.00.a";
-			dmas = <&rx_dma 0
-				&rx_dma 1>;
-			dma-names = "axidma0", "axidma1";
-		} ;
+		// axidmatest_1: axidmatest@1 {
+		// 	compatible ="xlnx,axi-dma-test-1.00.a";
+		// 	dmas = <&rx_dma 0
+		// 		&rx_dma 1>;
+		// 	dma-names = "axidma0", "axidma1";
+		// } ;
 
 		tx_dma: dma@80400000 {
 			#dma-cells = <1>;
@@ -832,18 +1023,20 @@
 		cf-ad9361-lpc@79020000 {
 			compatible = "adi,axi-ad9361-6.00.a";
 			reg = <0x79020000 0x6000>;
-			// dmas = <0xa 0x0>;
+			// dmas = <0x16 0x00>;
 			// dma-names = "rx";
-			spibus-connected = <0xb>;
+			spibus-connected = <0x17>;
+			phandle = <0x40>;
 		};
 
 		cf-ad9361-dds-core-lpc@79024000 {
 			compatible = "adi,axi-ad9361-dds-6.00.a";
 			reg = <0x79024000 0x1000>;
-			clocks = <0xb 0xd>;
+			clocks = <0x17 0x0d>;
 			clock-names = "sampl_clk";
-			// dmas = <0xc 0x0>;
+			// dmas = <0x18 0x00>;
 			// dma-names = "tx";
+			phandle = <0x41>;
 		};
 
 		mwipcore@43c00000 {
@@ -851,10 +1044,11 @@
 			reg = <0x43c00000 0xffff>;
 		};
 
-		/*axi-sysid-0@45000000 {
-			compatible = "adi,axi-sysid-1.00.a";
-			reg = <0x45000000 0x10000>;
-		};*/
+		// axi-sysid-0@45000000 {
+		// 	compatible = "adi,axi-sysid-1.00.a";
+		// 	reg = <0x45000000 0x10000>;
+		// 	phandle = <0x42>;
+		// };
 	};
 
 	leds {
@@ -862,81 +1056,81 @@
 
 		led0 {
 			label = "led0:green";
-			gpios = <0x6 0x3a 0x0>;
+			gpios = <0x09 0x3a 0x00>;
 		};
 
 		led1 {
 			label = "led1:green";
-			gpios = <0x6 0x3b 0x0>;
+			gpios = <0x09 0x3b 0x00>;
 		};
 
 		led2 {
 			label = "led2:green";
-			gpios = <0x6 0x3c 0x0>;
+			gpios = <0x09 0x3c 0x00>;
 		};
 
 		led3 {
 			label = "led3:green";
-			gpios = <0x6 0x3d 0x0>;
+			gpios = <0x09 0x3d 0x00>;
 		};
 	};
 
 	gpio_keys {
 		compatible = "gpio-keys";
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
 		autorepeat;
 
 		pb0 {
 			label = "Left";
 			linux,code = <0x69>;
-			gpios = <0x6 0x36 0x0>;
+			gpios = <0x09 0x36 0x00>;
 		};
 
 		pb1 {
 			label = "Right";
 			linux,code = <0x6a>;
-			gpios = <0x6 0x37 0x0>;
+			gpios = <0x09 0x37 0x00>;
 		};
 
 		pb2 {
 			label = "Up";
 			linux,code = <0x67>;
-			gpios = <0x6 0x38 0x0>;
+			gpios = <0x09 0x38 0x00>;
 		};
 
 		pb3 {
 			label = "Down";
 			linux,code = <0x6c>;
-			gpios = <0x6 0x39 0x0>;
+			gpios = <0x09 0x39 0x00>;
 		};
 
 		sw0 {
 			label = "SW0";
-			linux,input-type = <0x5>;
-			linux,code = <0x0>;
-			gpios = <0x6 0x3e 0x0>;
+			linux,input-type = <0x05>;
+			linux,code = <0x0d>;
+			gpios = <0x09 0x3e 0x00>;
 		};
 
 		sw1 {
 			label = "SW1";
-			linux,input-type = <0x5>;
-			linux,code = <0x1>;
-			gpios = <0x6 0x3f 0x0>;
+			linux,input-type = <0x05>;
+			linux,code = <0x01>;
+			gpios = <0x09 0x3f 0x00>;
 		};
 
 		sw2 {
 			label = "SW2";
-			linux,input-type = <0x5>;
-			linux,code = <0x2>;
-			gpios = <0x6 0x40 0x0>;
+			linux,input-type = <0x05>;
+			linux,code = <0x02>;
+			gpios = <0x09 0x40 0x00>;
 		};
 
 		sw3 {
 			label = "SW3";
-			linux,input-type = <0x5>;
-			linux,code = <0x3>;
-			gpios = <0x6 0x41 0x0>;
+			linux,input-type = <0x05>;
+			linux,code = <0x03>;
+			gpios = <0x09 0x41 0x00>;
 		};
 	};
 };